From: Serge Semin <fancer.lancer@gmail.com>
To: Cai Huoqing <cai.huoqing@linux.dev>
Cc: Sergey.Semin@baikalelectronics.ru,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 1/4] dmaengine: dw-edma: Rename dw_edma_core_ops structure to dw_edma_plat_ops
Date: Thu, 16 Feb 2023 16:41:56 +0300 [thread overview]
Message-ID: <20230216134156.enjanyzwfhamve6q@mobilestation> (raw)
In-Reply-To: <20230213132411.65524-2-cai.huoqing@linux.dev>
On Mon, Feb 13, 2023 at 09:24:06PM +0800, Cai Huoqing wrote:
> From: Cai huoqing <cai.huoqing@linux.dev>
>
> Rename dw_edma_core_ops structure to dw_edma_plat_ops, the ops is platform
> specific operations: the DMA device environment configs like IRQs,
> address translation, etc.
>
> The dw_edma_pcie_plat_ops name was supposed to refer to the platform which
s/dw_edma_pcie_plat_ops/dw_edma_plat_ops
* The main goal is to update the structure name.
> the DW eDMA engine is embedded to, like PCIe end-point (accessible via
> the PCIe bus) or a PCIe root port (directly accessible by CPU).
> Needless to say that for them the IRQ-vector and PCI-addresses are
> differently determined. The suggested name has a connection with the
> kernel platform device only as a private case of the eDMA/hDMA embedded
> into the DW PCI Root ports, though basically it was supposed to refer to
> any platform in which the DMA hardware lives.
>
> Anyway the renaming was necessary to distinguish two types of
> the implementation callbacks:
> 1. DW eDMA/hDMA IP-core specific operations: device-specific CSR
> setups in one or another aspect of the DMA-engine initialization.
> 2. DW eDMA/hDMA platform specific operations: the DMA device
> environment configs like IRQs, address translation, etc.
>
> dw_edma_pcie_core_ops is supposed to be used for the case 1, and
> dw_edma_pcie_plat_ops - for the case 2.
ditto
>
> Signed-off-by: Cai huoqing <cai.huoqing@linux.dev>
> ---
> drivers/dma/dw-edma/dw-edma-pcie.c | 4 ++--
> drivers/pci/controller/dwc/pcie-designware.c | 2 +-
> include/linux/dma/edma.h | 7 ++++---
> 3 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
> index 2b40f2b44f5e..1c6043751dc9 100644
> --- a/drivers/dma/dw-edma/dw-edma-pcie.c
> +++ b/drivers/dma/dw-edma/dw-edma-pcie.c
> @@ -109,7 +109,7 @@ static u64 dw_edma_pcie_address(struct device *dev, phys_addr_t cpu_addr)
> return region.start;
> }
>
> -static const struct dw_edma_core_ops dw_edma_pcie_core_ops = {
> +static const struct dw_edma_plat_ops dw_edma_pcie_plat_ops = {
> .irq_vector = dw_edma_pcie_irq_vector,
> .pci_address = dw_edma_pcie_address,
> };
> @@ -225,7 +225,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
>
> chip->mf = vsec_data.mf;
> chip->nr_irqs = nr_irqs;
> - chip->ops = &dw_edma_pcie_core_ops;
> + chip->ops = &dw_edma_pcie_plat_ops;
>
> chip->ll_wr_cnt = vsec_data.wr_ch_cnt;
> chip->ll_rd_cnt = vsec_data.rd_ch_cnt;
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 53a16b8b6ac2..44e90b71d429 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -828,7 +828,7 @@ static int dw_pcie_edma_irq_vector(struct device *dev, unsigned int nr)
> return platform_get_irq_byname_optional(pdev, name);
> }
>
> -static struct dw_edma_core_ops dw_pcie_edma_ops = {
> +static struct dw_edma_plat_ops dw_pcie_edma_ops = {
> .irq_vector = dw_pcie_edma_irq_vector,
> };
>
> diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h
> index d2638d9259dc..b2f3dd5e7e1a 100644
> --- a/include/linux/dma/edma.h
> +++ b/include/linux/dma/edma.h
> @@ -40,7 +40,7 @@ struct dw_edma_region {
> * iATU windows. That will be done by the controller
> * automatically.
> */
> -struct dw_edma_core_ops {
> +struct dw_edma_plat_ops {
> int (*irq_vector)(struct device *dev, unsigned int nr);
> u64 (*pci_address)(struct device *dev, phys_addr_t cpu_addr);
> };
> @@ -48,7 +48,8 @@ struct dw_edma_core_ops {
> enum dw_edma_map_format {
> EDMA_MF_EDMA_LEGACY = 0x0,
> EDMA_MF_EDMA_UNROLL = 0x1,
> - EDMA_MF_HDMA_COMPAT = 0x5
> + EDMA_MF_HDMA_COMPAT = 0x5,
> + EDMA_MF_HDMA_NATIVE = 0x7
^
Please add a comma here ---------+
Thus if there is a new entry is added to the enum list in future the
update will consist of a single-line change. It's a common practice in
kernel to terminate the last entry in enums or struct initializers if
there is a possibility to add new entries to the list afterwards.
> };
>
> /**
> @@ -80,7 +81,7 @@ enum dw_edma_chip_flags {
> struct dw_edma_chip {
> struct device *dev;
> int nr_irqs;
> - const struct dw_edma_core_ops *ops;
> + const struct dw_edma_plat_ops *ops;
\ /
^
These are just three white-spaces ----+
Please replace them with either a tab or with a single space.
-Serge(y)
> u32 flags;
>
> void __iomem *reg_base;
> --
> 2.34.1
>
next prev parent reply other threads:[~2023-02-16 13:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-13 13:24 [PATCH v3 0/4] dmaengine: dw-edma: Add support for native HDMA Cai Huoqing
2023-02-13 13:24 ` [PATCH v3 1/4] dmaengine: dw-edma: Rename dw_edma_core_ops structure to dw_edma_plat_ops Cai Huoqing
2023-02-16 13:41 ` Serge Semin [this message]
2023-02-13 13:24 ` [PATCH v3 2/4] dmaengine: dw-edma: Create a new dw_edma_core_ops structure to abstract controller operation Cai Huoqing
2023-02-16 16:17 ` Serge Semin
2023-02-20 6:01 ` Cai Huoqing
2023-02-20 10:52 ` Serge Semin
2023-02-16 16:25 ` Serge Semin
2023-02-13 13:24 ` [PATCH v3 3/4] dmaengine: dw-edma: Add support for native HDMA Cai Huoqing
2023-02-13 15:20 ` kernel test robot
2023-02-14 2:00 ` Cai Huoqing
2023-02-13 20:59 ` Bjorn Helgaas
2023-02-14 2:03 ` Cai Huoqing
2023-02-16 16:38 ` Serge Semin
2023-02-16 16:41 ` Serge Semin
2023-02-13 13:24 ` [PATCH v3 4/4] dmaengine: dw-edma: Add HDMA DebugFS support Cai Huoqing
2023-02-16 17:10 ` Serge Semin
2023-02-16 2:08 ` [PATCH v3 0/4] dmaengine: dw-edma: Add support for native HDMA Cai Huoqing
2023-02-16 8:56 ` Serge Semin
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