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From: Josh Poimboeuf <jpoimboe@kernel.org>
To: Borislav Petkov <bp@alien8.de>
Cc: Kim Phillips <kim.phillips@amd.com>,
	x86@kernel.org, Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
	Joao Martins <joao.m.martins@oracle.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Sean Christopherson <seanjc@google.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	David Woodhouse <dwmw@amazon.co.uk>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Juergen Gross <jgross@suse.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Tony Luck <tony.luck@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Alexey Kardashevskiy <aik@amd.com>,
	kvm@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 7/8] x86/cpu: Support AMD Automatic IBRS
Date: Fri, 24 Feb 2023 16:09:31 -0800	[thread overview]
Message-ID: <20230225000931.wrednfun4jifkqau@treble> (raw)
In-Reply-To: <Y/k/ZXUXOFiBhOiI@zn.tnic>

On Fri, Feb 24, 2023 at 11:51:17PM +0100, Borislav Petkov wrote:
> On Fri, Feb 24, 2023 at 10:08:32PM +0100, Borislav Petkov wrote:
> > On Fri, Feb 24, 2023 at 10:52:57AM -0800, Josh Poimboeuf wrote:
> > > Doesn't this only enable it on the boot CPU?
> > 
> > Whoops, you might be right.
> 
> Actually, we stick that MSR - EFER - into the trampoline header and then
> each AP gets it written to in arch/x86/realmode/rm/trampoline_64.S
> 
> But this is only from code staring - I'll confirm this tomorrow.

Ah, I had to stare it that for a bit to figure out how it works.
setup_real_mode() reads MSR_EFER from the boot CPU and stores it in
trampoline_header->efer.  Then the other CPUs read that stored value in
startup_32() and write it into their MSR.

> And if so, we should at least put comments in that trampoline code so
> that people do not remove the MSR writes.
> 
> Or, actually, we should simply write it again because it is the init
> path and not really a hot path but it should damn well make sure that
> that bit gets set.

Yeah, I think that would be good.  Otherwise it's rather magical.  That
EFER MSR is a surprising place to put that bit.

-- 
Josh

  parent reply	other threads:[~2023-02-25  0:09 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-24 16:33 [PATCH v9 0/8] x86/cpu, kvm: Support AMD Automatic IBRS Kim Phillips
2023-01-24 16:33 ` [PATCH v9 1/8] x86/cpu, kvm: Add support for CPUID_80000021_EAX Kim Phillips
2023-01-26 10:12   ` [tip: x86/cpu] " tip-bot2 for Kim Phillips
2023-01-24 16:33 ` [PATCH v9 2/8] KVM: x86: Move open-coded cpuid leaf 0x80000021 EAX bit propagation code Kim Phillips
2023-01-26 10:12   ` [tip: x86/cpu] KVM: x86: Move open-coded CPUID " tip-bot2 for Kim Phillips
2023-01-24 16:33 ` [PATCH v9 3/8] x86/cpu, kvm: Add the NO_NESTED_DATA_BP feature Kim Phillips
2023-01-26 10:12   ` [tip: x86/cpu] " tip-bot2 for Kim Phillips
2023-01-24 16:33 ` [PATCH v9 4/8] x86/cpu, kvm: Move X86_FEATURE_LFENCE_RDTSC to its native leaf Kim Phillips
2023-01-24 21:32   ` Sean Christopherson
2023-01-25 12:09     ` Borislav Petkov
2023-01-26 10:12   ` [tip: x86/cpu] " tip-bot2 for Kim Phillips
2023-01-24 16:33 ` [PATCH v9 5/8] x86/cpu, kvm: Add the Null Selector Clears Base feature Kim Phillips
2023-01-26 10:12   ` [tip: x86/cpu] " tip-bot2 for Kim Phillips
2023-01-24 16:33 ` [PATCH v9 6/8] x86/cpu, kvm: Add the SMM_CTL MSR not present feature Kim Phillips
2023-01-26 10:12   ` [tip: x86/cpu] " tip-bot2 for Kim Phillips
2023-01-24 16:33 ` [PATCH v9 7/8] x86/cpu: Support AMD Automatic IBRS Kim Phillips
2023-01-26 10:12   ` [tip: x86/cpu] " tip-bot2 for Kim Phillips
2023-02-24 18:52   ` [PATCH v9 7/8] " Josh Poimboeuf
2023-02-24 21:08     ` Borislav Petkov
2023-02-24 21:35       ` Josh Poimboeuf
2023-02-24 21:59         ` Borislav Petkov
2023-02-24 22:03           ` Luck, Tony
2023-02-24 22:12             ` Borislav Petkov
2023-02-24 23:30               ` pawan.kumar.gupta
2023-03-10 10:23         ` [tip: x86/misc] MAINTAINERS: Add x86 hardware vulnerabilities section tip-bot2 for Josh Poimboeuf
2023-02-24 22:51       ` [PATCH v9 7/8] x86/cpu: Support AMD Automatic IBRS Borislav Petkov
2023-02-24 23:23         ` Borislav Petkov
2023-02-25  0:09         ` Josh Poimboeuf [this message]
2023-02-25  0:20           ` [PATCH] x86/CPU/AMD: Make sure EFER[AIBRSE] is set Borislav Petkov
2023-02-25  0:52             ` Pawan Gupta
2023-02-25  1:32               ` Josh Poimboeuf
2023-02-25 12:21                 ` Borislav Petkov
2023-02-25 17:28                   ` Josh Poimboeuf
2023-02-25 22:56                     ` Borislav Petkov
2023-02-25 23:43                       ` Josh Poimboeuf
2023-02-26 11:18                         ` Borislav Petkov
2023-02-26 17:27                           ` Josh Poimboeuf
2023-02-26 18:44                             ` Borislav Petkov
2023-02-27 15:25                   ` Dave Hansen
2023-02-27 15:40                     ` Borislav Petkov
2023-02-27 16:39                       ` Dave Hansen
2023-03-10 16:22                         ` [PATCH -v2] " Borislav Petkov
2023-03-13 15:42                           ` Dave Hansen
2023-03-16 11:04     ` [tip: x86/cpu] " tip-bot2 for Borislav Petkov (AMD)
2023-01-24 16:33 ` [PATCH v9 8/8] KVM: x86: Propagate the AMD Automatic IBRS feature to the guest Kim Phillips
2023-01-26 10:12   ` [tip: x86/cpu] " tip-bot2 for Kim Phillips
2023-01-24 21:37 ` [PATCH v9 0/8] x86/cpu, kvm: Support AMD Automatic IBRS Sean Christopherson

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