From: Maxime Ripard <maxime@cerno.tech>
To: Frank Oltmanns <frank@oltmanns.dev>
Cc: Roman Beranek <romanberanek@icloud.com>,
Chen-Yu Tsai <wens@csie.org>, David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/sun4i: uncouple DSI dotclock divider from TCON0_DCLK_REG
Date: Wed, 29 Mar 2023 21:56:39 +0200 [thread overview]
Message-ID: <20230329195639.iep4rv5rcigu3gj2@penduick> (raw)
In-Reply-To: <87bkkc3bzc.fsf@oltmanns.dev>
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Hi,
On Tue, Mar 28, 2023 at 09:28:19PM +0200, Frank Oltmanns wrote:
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -819,6 +819,34 @@ static void sun6i_dsi_encoder_disable(struct drm_encoder *encoder)
> regulator_disable(dsi->regulator);
> }
>
> +static bool sun6i_dsi_encoder_mode_fixup(
> + struct drm_encoder *encoder,
> + const struct drm_display_mode *mode,
> + struct drm_display_mode *adjusted_mode)
So, mode_fixup is kind of deprecated in favour of atomic_check
> +{
> + if (encoder->encoder_type == DRM_MODE_ENCODER_DSI) {
> + /*
> + * For DSI the PLL rate has to respect the bits per pixel and
> + * number of lanes.
> + *
> + * According to the BSP code:
> + * PLL rate = DOTCLOCK * bpp / lanes
> + *
> + * Therefore, the clock has to be adjusted in order to set the
> + * correct PLL rate when actually setting the clock.
> + */
> + struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder);
> + struct mipi_dsi_device *device = dsi->device;
> + u8 bpp = mipi_dsi_pixel_format_to_bpp(device->format);
> + u8 lanes = device->lanes;
> +
> + adjusted_mode->crtc_clock = mode->crtc_clock
> + * bpp / (lanes * SUN6I_DSI_TCON_DIV);
And that's visible to the userspace, so it's not where we should store
that value. I guess the best way to do something similar would be to
store it into crtc_state, and then reuse it there. But it starts to make
a lot of rather complicated code compared to your previous patch.
Maxime
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next prev parent reply other threads:[~2023-03-29 19:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-20 16:16 [PATCH] drm/sun4i: uncouple DSI dotclock divider from TCON0_DCLK_REG Roman Beranek
2023-03-21 14:56 ` Maxime Ripard
2023-03-21 16:50 ` Roman Beranek
2023-03-21 20:53 ` Roman Beranek
2023-03-27 20:21 ` Maxime Ripard
2023-03-25 11:40 ` Frank Oltmanns
2023-03-27 20:20 ` Maxime Ripard
2023-03-27 23:48 ` Roman Beranek
2023-03-29 19:58 ` Maxime Ripard
2023-03-30 4:45 ` Frank Oltmanns
2023-03-31 5:36 ` Roman Beranek
2023-04-05 12:34 ` Roman Beranek
2023-04-05 15:03 ` Maxime Ripard
2023-04-12 7:14 ` Roman Beranek
2023-04-12 14:09 ` Maxime Ripard
2023-04-08 7:07 ` Jernej Škrabec
2023-04-12 1:22 ` Roman Beranek
2023-03-28 19:28 ` Frank Oltmanns
2023-03-29 19:56 ` Maxime Ripard [this message]
2023-03-30 4:41 ` Frank Oltmanns
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