From: Conor Dooley <conor@kernel.org>
To: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Cc: kernel@esmil.dk, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, krzk@kernel.org,
conor+dt@kernel.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu,
daniel.lezcano@linaro.org, tglx@linutronix.de,
anup@brainfault.org, gregkh@linuxfoundation.org,
jirislaby@kernel.org, michal.simek@amd.com,
michael.zhu@starfivetech.com, drew@beagleboard.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, leyfoon.tan@starfivetech.com
Subject: Re: [PATCH v3 0/6] Initial device tree support for StarFive JH8100 SoC
Date: Wed, 6 Dec 2023 16:45:18 +0000 [thread overview]
Message-ID: <20231206-sizzling-whoopee-9e2a6755cd05@spud> (raw)
In-Reply-To: <20231201121410.95298-1-jeeheng.sia@starfivetech.com>
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On Fri, Dec 01, 2023 at 08:14:04PM +0800, Sia Jee Heng wrote:
> StarFive JH8100 SoC consists of 4 RISC-V performance Cores (Dubhe-90) and
> 2 RISC-V energy efficient cores (Dubhe-80). It also features various
> interfaces such as DDR4, Gbit-Ether, CAN, USB 3.2, SD/MMC, etc., making it
> ideal for high-performance computing scenarios.
>
> This patch series introduces initial SoC DTSI support for the StarFive
> JH8100 SoC. The relevant dt-binding documentation has been updated
> accordingly. Below is the list of IP blocks added in the initial SoC DTSI,
> which can be used for booting via initramfs on FPGA:
This all seems okay to me. I'll need an ack from Emil though before I
can pick it up.
Thanks,
Conor.
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prev parent reply other threads:[~2023-12-06 16:45 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-01 12:14 [PATCH v3 0/6] Initial device tree support for StarFive JH8100 SoC Sia Jee Heng
2023-12-01 12:14 ` [PATCH v3 1/6] dt-bindings: riscv: Add StarFive Dubhe compatibles Sia Jee Heng
2023-12-01 12:14 ` [PATCH v3 2/6] dt-bindings: riscv: Add StarFive JH8100 SoC Sia Jee Heng
2023-12-13 12:43 ` Conor Dooley
2023-12-13 13:24 ` Leyfoon Tan
2023-12-14 0:36 ` JeeHeng Sia
2023-12-14 16:22 ` Conor Dooley
2023-12-14 17:20 ` Palmer Dabbelt
2023-12-15 1:49 ` JeeHeng Sia
2023-12-16 12:06 ` Conor Dooley
2023-12-01 12:14 ` [PATCH v3 3/6] dt-bindings: timer: Add StarFive JH8100 clint Sia Jee Heng
2023-12-04 17:36 ` Daniel Lezcano
2024-01-18 19:23 ` [tip: timers/core] " tip-bot2 for Sia Jee Heng
2023-12-01 12:14 ` [PATCH v3 4/6] dt-bindings: interrupt-controller: Add StarFive JH8100 plic Sia Jee Heng
2023-12-01 12:14 ` [PATCH v3 5/6] dt-bindings: serial: cdns: Add new compatible string for StarFive JH8100 UART Sia Jee Heng
2023-12-01 15:46 ` Conor Dooley
2023-12-01 12:14 ` [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Sia Jee Heng
2023-12-08 12:08 ` Shengyu Qu
2023-12-11 1:38 ` JeeHeng Sia
2023-12-11 7:58 ` Conor Dooley
2023-12-11 9:38 ` JeeHeng Sia
2023-12-11 17:43 ` Conor Dooley
2023-12-08 16:05 ` Emil Renner Berthing
2023-12-13 12:39 ` Emil Renner Berthing
2023-12-14 0:34 ` JeeHeng Sia
2023-12-06 16:45 ` Conor Dooley [this message]
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