* [PATCH 1/6] dt-bindings: Add vendor prefix for Shiratech Solutions
2020-04-20 17:31 [PATCH 0/6] Add Stinger96 and IoT Box board support mani
@ 2020-04-20 17:31 ` mani
2020-04-20 17:31 ` [PATCH 2/6] ARM: dts: Add missing pinctrl entries for STM32MP15 mani
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: mani @ 2020-04-20 17:31 UTC (permalink / raw)
To: robh+dt, mcoquelin.stm32, alexandre.torgue
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
From: Manivannan Sadhasivam <mani@kernel.org>
This commit adds devicetree vendor prefix for Shiratech solutions,
a SOM/embedded board manufacturing company.
https://www.shiratech-solutions.com/
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index e3f1b06d12ae..48ad8f954f33 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -902,6 +902,8 @@ patternProperties:
description: Sharp Corporation
"^shimafuji,.*":
description: Shimafuji Electric, Inc.
+ "^shiratech,.*":
+ description: Shiratech Solutions
"^si-en,.*":
description: Si-En Technology Ltd.
"^si-linux,.*":
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/6] ARM: dts: Add missing pinctrl entries for STM32MP15
2020-04-20 17:31 [PATCH 0/6] Add Stinger96 and IoT Box board support mani
2020-04-20 17:31 ` [PATCH 1/6] dt-bindings: Add vendor prefix for Shiratech Solutions mani
@ 2020-04-20 17:31 ` mani
2020-04-21 11:16 ` Alexandre Torgue
2020-04-20 17:31 ` [PATCH 3/6] dt-bindings: arm: stm32: Document Stinger96 compatible mani
` (3 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: mani @ 2020-04-20 17:31 UTC (permalink / raw)
To: robh+dt, mcoquelin.stm32, alexandre.torgue
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
From: Manivannan Sadhasivam <mani@kernel.org>
These pinctrl definitions will be used by Stinger96/IoTBox boards
from Shiratech.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 64 ++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index aeddcaadb829..858c83038e5a 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -1519,6 +1519,30 @@
};
};
+ usart2_pins_b: usart2-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
+ <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
+ <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
+ bias-disable;
+ };
+ };
+
+ usart2_sleep_pins_b: usart2-sleep-1 {
+ pins {
+ pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
+ <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
+ <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
+ <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
+ };
+ };
+
usart3_pins_a: usart3-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
@@ -1558,6 +1582,19 @@
};
};
+ uart4_pins_c: uart4-2 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+ bias-disable;
+ };
+ };
+
uart7_pins_a: uart7-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
@@ -1573,6 +1610,19 @@
};
};
+ uart7_pins_b: uart7-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
+ bias-disable;
+ };
+ };
+
uart8_pins_a: uart8-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
@@ -1647,4 +1697,18 @@
bias-disable;
};
};
+
+ spi4_pins_a: spi4-0 {
+ pins {
+ pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
+ <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
+ bias-disable;
+ };
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 2/6] ARM: dts: Add missing pinctrl entries for STM32MP15
2020-04-20 17:31 ` [PATCH 2/6] ARM: dts: Add missing pinctrl entries for STM32MP15 mani
@ 2020-04-21 11:16 ` Alexandre Torgue
0 siblings, 0 replies; 9+ messages in thread
From: Alexandre Torgue @ 2020-04-21 11:16 UTC (permalink / raw)
To: mani, robh+dt, mcoquelin.stm32
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel
Hi Mani
Commit title should be ARM: dts: stm32 ...
otherwise it's good.
regards
alex
On 4/20/20 7:31 PM, mani@kernel.org wrote:
> From: Manivannan Sadhasivam <mani@kernel.org>
>
> These pinctrl definitions will be used by Stinger96/IoTBox boards
> from Shiratech.
>
> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
> ---
> arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 64 ++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> index aeddcaadb829..858c83038e5a 100644
> --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> @@ -1519,6 +1519,30 @@
> };
> };
>
> + usart2_pins_b: usart2-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
> + <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
> + <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
> + bias-disable;
> + };
> + };
> +
> + usart2_sleep_pins_b: usart2-sleep-1 {
> + pins {
> + pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
> + <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
> + <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
> + <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
> + };
> + };
> +
> usart3_pins_a: usart3-0 {
> pins1 {
> pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
> @@ -1558,6 +1582,19 @@
> };
> };
>
> + uart4_pins_c: uart4-2 {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
> + bias-disable;
> + };
> + };
> +
> uart7_pins_a: uart7-0 {
> pins1 {
> pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
> @@ -1573,6 +1610,19 @@
> };
> };
>
> + uart7_pins_b: uart7-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
> + bias-disable;
> + };
> + };
> +
> uart8_pins_a: uart8-0 {
> pins1 {
> pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
> @@ -1647,4 +1697,18 @@
> bias-disable;
> };
> };
> +
> + spi4_pins_a: spi4-0 {
> + pins {
> + pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
> + <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <1>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
> + bias-disable;
> + };
> + };
> };
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/6] dt-bindings: arm: stm32: Document Stinger96 compatible
2020-04-20 17:31 [PATCH 0/6] Add Stinger96 and IoT Box board support mani
2020-04-20 17:31 ` [PATCH 1/6] dt-bindings: Add vendor prefix for Shiratech Solutions mani
2020-04-20 17:31 ` [PATCH 2/6] ARM: dts: Add missing pinctrl entries for STM32MP15 mani
@ 2020-04-20 17:31 ` mani
2020-04-20 17:31 ` [PATCH 4/6] ARM: dts: stm32mp1: Add Stinger96 board support mani
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: mani @ 2020-04-20 17:31 UTC (permalink / raw)
To: robh+dt, mcoquelin.stm32, alexandre.torgue
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
From: Manivannan Sadhasivam <mani@kernel.org>
Document devicetree compatible of Shiratech Stinger96 board.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
---
Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
index 71ea3f04ab9c..3849f1d0e03e 100644
--- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
@@ -39,6 +39,7 @@ properties:
- enum:
- arrow,stm32mp157a-avenger96 # Avenger96
- lxa,stm32mp157c-mc1
+ - shiratech,stm32mp157a-stinger96 # Stinger96
- st,stm32mp157c-ed1
- st,stm32mp157a-dk1
- st,stm32mp157c-dk2
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 4/6] ARM: dts: stm32mp1: Add Stinger96 board support
2020-04-20 17:31 [PATCH 0/6] Add Stinger96 and IoT Box board support mani
` (2 preceding siblings ...)
2020-04-20 17:31 ` [PATCH 3/6] dt-bindings: arm: stm32: Document Stinger96 compatible mani
@ 2020-04-20 17:31 ` mani
2020-04-20 17:31 ` [PATCH 5/6] dt-bindings: arm: stm32: Document IoT Box compatible mani
2020-04-20 17:31 ` [PATCH 6/6] ARM: dts: stm32mp1: Add IoT Box board support mani
5 siblings, 0 replies; 9+ messages in thread
From: mani @ 2020-04-20 17:31 UTC (permalink / raw)
To: robh+dt, mcoquelin.stm32, alexandre.torgue
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
From: Manivannan Sadhasivam <mani@kernel.org>
Stinger96 is a 96Boards IoT Extended edition board designed and
manufactured by Shiratech solutions based on STM32MP1 SoC. Following
are the features of this board:
* 256MB DDR
* 125MB NAND Flash
* Onboard BG96 modem
* 1x uSD
* 2x USB (1 available as external connector and another connected to BG96)
* 1x SPI
* 1x PCM
* 2x UART (apart from serial console)
* 2x I2C (apart from one connected to PMIC)
Following peripherals are tested and known to work:
* BG96 modem
* 1x I2C (LS-I2C0)
* 1x SPI
* 1x UART (LS-UART0)
* USB (Only Gadget mode)
* uSD
More information about this board can be found in Shiratech website:
https://www.shiratech-solutions.com/products/stinger96/
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/stm32mp157a-stinger96.dts | 12 +
arch/arm/boot/dts/stm32mp157a-stinger96.dtsi | 342 +++++++++++++++++++
3 files changed, 355 insertions(+)
create mode 100644 arch/arm/boot/dts/stm32mp157a-stinger96.dts
create mode 100644 arch/arm/boot/dts/stm32mp157a-stinger96.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f43467b02bcd..966b81dfffd6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1030,6 +1030,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32h743i-disco.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dk1.dtb \
+ stm32mp157a-stinger96.dtb \
stm32mp157c-dhcom-pdk2.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
diff --git a/arch/arm/boot/dts/stm32mp157a-stinger96.dts b/arch/arm/boot/dts/stm32mp157a-stinger96.dts
new file mode 100644
index 000000000000..249a53877512
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157a-stinger96.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2020 Manivannan Sadhasivam
+ */
+
+/dts-v1/;
+#include "stm32mp157a-stinger96.dtsi"
+
+/ {
+ model = "Shiratech STM32MP157A Stinger96 board";
+ compatible = "shiratech,stm32mp157a-stinger96", "st,stm32mp157";
+};
diff --git a/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi b/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi
new file mode 100644
index 000000000000..58275bcf9e26
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi
@@ -0,0 +1,342 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2020 Manivannan Sadhasivam
+ */
+
+/dts-v1/;
+
+#include "stm32mp157.dtsi"
+#include "stm32mp15-pinctrl.dtsi"
+#include "stm32mp15xxac-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/st,stpmic1.h>
+
+/ {
+ aliases {
+ mmc0 = &sdmmc1;
+ serial0 = &uart4;
+ serial1 = &uart7;
+ serial2 = &usart2;
+ spi0 = &spi4;
+ };
+
+ chosen {
+ stdout-path = "serial1:115200n8";
+ };
+
+ memory@c0000000 {
+ device_type = "memory";
+ reg = <0xc0000000 0x10000000>;
+ };
+
+ led {
+ compatible = "gpio-leds";
+
+ led1 {
+ label = "green:user1";
+ gpios = <&gpioa 13 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led2 {
+ label = "green:user2";
+ gpios = <&gpioh 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led3 {
+ label = "green:user3";
+ gpios = <&gpioh 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+
+ led4 {
+ label = "green:user4";
+ gpios = <&gpiof 12 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ default-state = "off";
+ panic-indicator;
+ };
+ };
+
+ sd_switch: regulator-sd_switch {
+ compatible = "regulator-gpio";
+ regulator-name = "sd_switch";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-type = "voltage";
+ regulator-always-on;
+
+ gpios = <&gpioa 8 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+ states = <1800000 0x1>,
+ <2900000 0x0>;
+ };
+};
+
+/* Only headless mode is supported */
+&gpu {
+ status = "disabled";
+};
+
+/* LS-I2C0 */
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_a>;
+ i2c-scl-rising-time-ns = <1000>;
+ i2c-scl-falling-time-ns = <300>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_pins_a>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ pmic: stpmic@33 {
+ compatible = "st,stpmic1";
+ reg = <0x33>;
+ interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ status = "okay";
+
+ regulators {
+ compatible = "st,stpmic1-regulators";
+
+ ldo1-supply = <&v3v3>;
+ ldo2-supply = <&v3v3>;
+ ldo3-supply = <&vdd_ddr>;
+ ldo5-supply = <&v3v3>;
+ ldo6-supply = <&v3v3>;
+ pwr_sw1-supply = <&bst_out>;
+ pwr_sw2-supply = <&bst_out>;
+
+ vddcore: buck1 {
+ regulator-name = "vddcore";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ vdd_ddr: buck2 {
+ regulator-name = "vdd_ddr";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ vdd: buck3 {
+ regulator-name = "vdd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ st,mask-reset;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ v3v3: buck4 {
+ regulator-name = "v3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-over-current-protection;
+ regulator-initial-mode = <0>;
+ };
+
+ vdda: ldo1 {
+ regulator-name = "vdda";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ interrupts = <IT_CURLIM_LDO1 0>;
+ };
+
+ v2v9: ldo2 {
+ regulator-name = "v2v9";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-always-on;
+ interrupts = <IT_CURLIM_LDO2 0>;
+ };
+
+ vtt_ddr: ldo3 {
+ regulator-name = "vtt_ddr";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <750000>;
+ regulator-always-on;
+ regulator-over-current-protection;
+ };
+
+ vdd_usb: ldo4 {
+ regulator-name = "vdd_usb";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ interrupts = <IT_CURLIM_LDO4 0>;
+ };
+
+ vdd_sd: ldo5 {
+ regulator-name = "vdd_sd";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ interrupts = <IT_CURLIM_LDO5 0>;
+ regulator-boot-on;
+ };
+
+ v1v8: ldo6 {
+ regulator-name = "v1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ interrupts = <IT_CURLIM_LDO6 0>;
+ };
+
+ vref_ddr: vref_ddr {
+ regulator-name = "vref_ddr";
+ regulator-always-on;
+ regulator-over-current-protection;
+ };
+
+ bst_out: boost {
+ regulator-name = "bst_out";
+ interrupts = <IT_OCP_BOOST 0>;
+ };
+
+ vbus_otg: pwr_sw1 {
+ regulator-name = "vbus_otg";
+ interrupts = <IT_OCP_OTG 0>;
+ regulator-active-discharge;
+ };
+
+ vbus_sw: pwr_sw2 {
+ regulator-name = "vbus_sw";
+ interrupts = <IT_OCP_SWOUT 0>;
+ regulator-active-discharge;
+ };
+ };
+
+ onkey {
+ compatible = "st,stpmic1-onkey";
+ interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
+ interrupt-names = "onkey-falling", "onkey-rising";
+ status = "okay";
+ };
+
+ watchdog {
+ compatible = "st,stpmic1-wdt";
+ status = "disabled";
+ };
+ };
+};
+
+&iwdg2 {
+ timeout-sec = <32>;
+ status = "okay";
+};
+
+&pwr_regulators {
+ vdd-supply = <&vdd>;
+ vdd_3v3_usbfs-supply = <&vdd_usb>;
+};
+
+&rng1 {
+ status = "okay";
+};
+
+&rtc {
+ status = "okay";
+};
+
+&sdmmc1 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
+ pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
+ pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
+ broken-cd;
+ disable-wp;
+ st,sig-dir;
+ st,neg-edge;
+ st,use-ckin;
+ bus-width = <4>;
+ vmmc-supply = <&vdd_sd>;
+ vqmmc-supply = <&sd_switch>;
+ status = "okay";
+};
+
+/* LS-SPI0 */
+&spi4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_pins_a>;
+ cs-gpios = <&gpioe 11 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+/* BG96 */
+&usart2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&usart2_pins_b>;
+ pinctrl-1 = <&usart2_sleep_pins_b>;
+ st,hw-flow-ctrl;
+ status = "okay";
+};
+
+/* LS-UART0 */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins_c>;
+ st,hw-flow-ctrl;
+ status = "okay";
+};
+
+/* Debug console */
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart7_pins_b>;
+ status = "okay";
+};
+
+&usbh_ehci {
+ phys = <&usbphyc_port0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+&usbotg_hs {
+ dr_mode = "peripheral";
+ pinctrl-0 = <&usbotg_hs_pins_a>;
+ pinctrl-names = "default";
+ phy-names = "usb2-phy";
+ phys = <&usbphyc_port1 0>;
+ vbus-supply = <&vbus_otg>;
+ status = "okay";
+};
+
+&usbphyc {
+ status = "okay";
+};
+
+&usbphyc_port0 {
+ phy-supply = <&vdd_usb>;
+ vdda1v1-supply = <®11>;
+ vdda1v8-supply = <®18>;
+};
+
+&usbphyc_port1 {
+ phy-supply = <&vdd_usb>;
+ vdda1v1-supply = <®11>;
+ vdda1v8-supply = <®18>;
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 5/6] dt-bindings: arm: stm32: Document IoT Box compatible
2020-04-20 17:31 [PATCH 0/6] Add Stinger96 and IoT Box board support mani
` (3 preceding siblings ...)
2020-04-20 17:31 ` [PATCH 4/6] ARM: dts: stm32mp1: Add Stinger96 board support mani
@ 2020-04-20 17:31 ` mani
2020-04-20 17:31 ` [PATCH 6/6] ARM: dts: stm32mp1: Add IoT Box board support mani
5 siblings, 0 replies; 9+ messages in thread
From: mani @ 2020-04-20 17:31 UTC (permalink / raw)
To: robh+dt, mcoquelin.stm32, alexandre.torgue
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
From: Manivannan Sadhasivam <mani@kernel.org>
Document devicetree compatible of Shiratech IoT Box.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
---
Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
index 3849f1d0e03e..790e6dd48e34 100644
--- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
@@ -39,6 +39,7 @@ properties:
- enum:
- arrow,stm32mp157a-avenger96 # Avenger96
- lxa,stm32mp157c-mc1
+ - shiratech,stm32mp157a-iot-box # IoT Box
- shiratech,stm32mp157a-stinger96 # Stinger96
- st,stm32mp157c-ed1
- st,stm32mp157a-dk1
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 6/6] ARM: dts: stm32mp1: Add IoT Box board support
2020-04-20 17:31 [PATCH 0/6] Add Stinger96 and IoT Box board support mani
` (4 preceding siblings ...)
2020-04-20 17:31 ` [PATCH 5/6] dt-bindings: arm: stm32: Document IoT Box compatible mani
@ 2020-04-20 17:31 ` mani
2020-04-29 8:02 ` Alexandre Torgue
5 siblings, 1 reply; 9+ messages in thread
From: mani @ 2020-04-20 17:31 UTC (permalink / raw)
To: robh+dt, mcoquelin.stm32, alexandre.torgue
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
From: Manivannan Sadhasivam <mani@kernel.org>
IoT Box is an IoT gateway device based on Stinger96 board powered by
STM32MP1 SoC, designed and manufactured by Shiratech Solutions. This
device makes use of Stinger96 board by having it as a base board with
one additional mezzanine on top.
Following are the features exposed by this device in addition to the
Stinger96 board:
* WiFi/BT
* CCS811 VOC sensor
* 2x Digital microphones IM69D130
* 12x WS2812B LEDs
Following peripherals are tested and known to work:
* WiFi/BT
* CCS811
More information about this device can be found in Shiratech website:
https://www.shiratech-solutions.com/products/iot-box/
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/stm32mp157a-iot-box.dts | 92 +++++++++++++++++++++++
2 files changed, 93 insertions(+)
create mode 100644 arch/arm/boot/dts/stm32mp157a-iot-box.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 966b81dfffd6..455ec6eb6303 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1030,6 +1030,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32h743i-disco.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dk1.dtb \
+ stm32mp157a-iot-box.dtb \
stm32mp157a-stinger96.dtb \
stm32mp157c-dhcom-pdk2.dtb \
stm32mp157c-dk2.dtb \
diff --git a/arch/arm/boot/dts/stm32mp157a-iot-box.dts b/arch/arm/boot/dts/stm32mp157a-iot-box.dts
new file mode 100644
index 000000000000..fa1c006ce531
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157a-iot-box.dts
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2020 Manivannan Sadhasivam
+ */
+
+/dts-v1/;
+#include "stm32mp157a-stinger96.dtsi"
+
+/ {
+ model = "Shiratech STM32MP157A IoT Box";
+ compatible = "shiratech,stm32mp157a-iot-box", "st,stm32mp157";
+
+ wlan_pwr: regulator-wlan {
+ compatible = "regulator-fixed";
+
+ regulator-name = "wl-reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&i2c2 {
+ ccs811@5b {
+ compatible = "ams,ccs811";
+ reg = <0x5b>;
+ wakeup-gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ /*
+ * Note: The SDMMC2 pins lack external pullups on data lines. Hence,
+ * we need to enable it in the SoC.
+ */
+ sdmmc2_b4_pins_pull: sdmmc2-b4-pull {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
+ <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
+ <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
+ <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
+ <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
+ slew-rate = <1>;
+ bias-pull-up;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
+ slew-rate = <2>;
+ drive-push-pull;
+ bias-disable;
+ };
+ };
+};
+
+/* WiFi */
+&sdmmc2 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc2_b4_pins_pull>;
+ pinctrl-1 = <&sdmmc2_b4_od_pins_b>;
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
+ broken-cd;
+ non-removable;
+ st,neg-edge;
+ bus-width = <1>;
+ vmmc-supply = <&wlan_pwr>;
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* Bluetooth */
+&uart4 {
+ /* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
+ /delete-property/st,hw-flow-ctrl;
+ cts-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
+ rts-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ bluetooth {
+ shutdown-gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <115200>;
+ };
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 6/6] ARM: dts: stm32mp1: Add IoT Box board support
2020-04-20 17:31 ` [PATCH 6/6] ARM: dts: stm32mp1: Add IoT Box board support mani
@ 2020-04-29 8:02 ` Alexandre Torgue
0 siblings, 0 replies; 9+ messages in thread
From: Alexandre Torgue @ 2020-04-29 8:02 UTC (permalink / raw)
To: mani, robh+dt, mcoquelin.stm32
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel
Hi Mani
On 4/20/20 7:31 PM, mani@kernel.org wrote:
> From: Manivannan Sadhasivam <mani@kernel.org>
>
> IoT Box is an IoT gateway device based on Stinger96 board powered by
> STM32MP1 SoC, designed and manufactured by Shiratech Solutions. This
> device makes use of Stinger96 board by having it as a base board with
> one additional mezzanine on top.
>
> Following are the features exposed by this device in addition to the
> Stinger96 board:
>
> * WiFi/BT
> * CCS811 VOC sensor
> * 2x Digital microphones IM69D130
> * 12x WS2812B LEDs
>
> Following peripherals are tested and known to work:
>
> * WiFi/BT
> * CCS811
>
> More information about this device can be found in Shiratech website:
> https://www.shiratech-solutions.com/products/iot-box/
>
> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/stm32mp157a-iot-box.dts | 92 +++++++++++++++++++++++
> 2 files changed, 93 insertions(+)
> create mode 100644 arch/arm/boot/dts/stm32mp157a-iot-box.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 966b81dfffd6..455ec6eb6303 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1030,6 +1030,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
> stm32h743i-disco.dtb \
> stm32mp157a-avenger96.dtb \
> stm32mp157a-dk1.dtb \
> + stm32mp157a-iot-box.dtb \
> stm32mp157a-stinger96.dtb \
> stm32mp157c-dhcom-pdk2.dtb \
> stm32mp157c-dk2.dtb \
> diff --git a/arch/arm/boot/dts/stm32mp157a-iot-box.dts b/arch/arm/boot/dts/stm32mp157a-iot-box.dts
> new file mode 100644
> index 000000000000..fa1c006ce531
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157a-iot-box.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2020 Manivannan Sadhasivam
> + */
> +
> +/dts-v1/;
> +#include "stm32mp157a-stinger96.dtsi"
> +
> +/ {
> + model = "Shiratech STM32MP157A IoT Box";
> + compatible = "shiratech,stm32mp157a-iot-box", "st,stm32mp157";
> +
> + wlan_pwr: regulator-wlan {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "wl-reg";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +};
> +
> +&i2c2 {
> + ccs811@5b {
> + compatible = "ams,ccs811";
> + reg = <0x5b>;
> + wakeup-gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
> + reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&pinctrl {
Currently all pinmux definition are done in stm32mp15-pinctrl.dtsi file.
Can you move it ?
Otherwise (except commit title) it is ok for me.
thanks
alex
> + /*
> + * Note: The SDMMC2 pins lack external pullups on data lines. Hence,
> + * we need to enable it in the SoC.
> + */
> + sdmmc2_b4_pins_pull: sdmmc2-b4-pull {
> + pins1 {
> + pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
> + <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
> + <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
> + <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
> + <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
> + slew-rate = <1>;
> + bias-pull-up;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
> + slew-rate = <2>;
> + drive-push-pull;
> + bias-disable;
> + };
> + };
> +};
> +
> +/* WiFi */
> +&sdmmc2 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc2_b4_pins_pull>;
> + pinctrl-1 = <&sdmmc2_b4_od_pins_b>;
> + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
> + broken-cd;
> + non-removable;
> + st,neg-edge;
> + bus-width = <1>;
> + vmmc-supply = <&wlan_pwr>;
> + status = "okay";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + brcmf: bcrmf@1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + };
> +};
> +
> +/* Bluetooth */
> +&uart4 {
> + /* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
> + /delete-property/st,hw-flow-ctrl;
> + cts-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
> + rts-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +
> + bluetooth {
> + shutdown-gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
> + compatible = "brcm,bcm43438-bt";
> + max-speed = <115200>;
> + };
> +};
>
^ permalink raw reply [flat|nested] 9+ messages in thread