commit 271e1b86e691 is breaking DMA uart on SoCFPGA

commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Dinh Nguyen]

Hi Vinod,

It appears that commit 271e1b86e691 "dmaengine: pl330: add quirk for
broken no flushp" is breaking uart dma on SoCFPGA. This commit is in
linux-next(next-20160210).

Doing a bisect pointed to commit 271e1b86e691, but I had to also revert
the following commits (86a8ce7d4103 "dmaengine: pl330: add max burst for
dmaengine") and (848e9776fee4 "dmaengine: pl330: support burst mode for
dev-to-mem and mem-to-dev transmit") as well because the build would
fail if I only revert 271e1b86e691.

The SoCFPGA platform is being tested on Olof's board farm and is failing
multi_v7_defconfig build because the PL330 DMA is enabled in this defconfig.

After doing reverts of those 3 commits, the socfpga platform is able
boot completely again with multi_v7_defconfig.

Dinh

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Vinod Koul]

On Wed, Feb 10, 2016 at 03:56:17PM -0600, Dinh Nguyen wrote:
> Hi Vinod,
> 
> It appears that commit 271e1b86e691 "dmaengine: pl330: add quirk for
> broken no flushp" is breaking uart dma on SoCFPGA. This commit is in
> linux-next(next-20160210).
> 
> Doing a bisect pointed to commit 271e1b86e691, but I had to also revert
> the following commits (86a8ce7d4103 "dmaengine: pl330: add max burst for
> dmaengine") and (848e9776fee4 "dmaengine: pl330: support burst mode for
> dev-to-mem and mem-to-dev transmit") as well because the build would
> fail if I only revert 271e1b86e691.
> 
> The SoCFPGA platform is being tested on Olof's board farm and is failing
> multi_v7_defconfig build because the PL330 DMA is enabled in this defconfig.
> 
> After doing reverts of those 3 commits, the socfpga platform is able
> boot completely again with multi_v7_defconfig.

Okay I am removing this topic from next. Also I can drop the series unless
someone sends me a fix in couple of days..

Thanks
-- 
~Vinod

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Bartlomiej Zolnierkiewicz]

Hi,

On Thursday, February 11, 2016 02:27:51 PM Vinod Koul wrote:
> On Wed, Feb 10, 2016 at 03:56:17PM -0600, Dinh Nguyen wrote:
> > Hi Vinod,
> > 
> > It appears that commit 271e1b86e691 "dmaengine: pl330: add quirk for
> > broken no flushp" is breaking uart dma on SoCFPGA. This commit is in
> > linux-next(next-20160210).
> > 
> > Doing a bisect pointed to commit 271e1b86e691, but I had to also revert
> > the following commits (86a8ce7d4103 "dmaengine: pl330: add max burst for
> > dmaengine") and (848e9776fee4 "dmaengine: pl330: support burst mode for
> > dev-to-mem and mem-to-dev transmit") as well because the build would
> > fail if I only revert 271e1b86e691.
> > 
> > The SoCFPGA platform is being tested on Olof's board farm and is failing
> > multi_v7_defconfig build because the PL330 DMA is enabled in this defconfig.
> > 
> > After doing reverts of those 3 commits, the socfpga platform is able
> > boot completely again with multi_v7_defconfig.
> 
> Okay I am removing this topic from next. Also I can drop the series unless
> someone sends me a fix in couple of days..

I've noticed that these commits also break UART DMA on Samsung Exynos4412
SoCs (I got similar bisection results as Dinh when I've noticed issue
with next-20160211 kernel).

Caesar, please keep me on Cc: for potential fix(es) / revised patches
(I'll be happy to test them).

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Alexander Kochetkov]

Hello!

Bartlomiej, could you please tell what uart driver is used on Samsung
Exynos4412?
Dinh, could you please tell what uart driver is used on SoCFPGA?

Could you make two test?

1) Checkout tree at commit 848e9776fee4 "dmaengine: pl330: support
burst mode for
 dev-to-mem and mem-to-dev transmit", make it buildable and see is it
works. In order to make in buildable remove bursts argument from the
line:

    if (*bursts == 1)
    - return _bursts(pl330, dry_run, buf, pxs, 1);
    + return _bursts(dry_run, buf, pxs, 1);

2) Checkout next-20160211 kernel tree and set src_maxburst and
dst_maxburst to 1 inside UART driver to see is it works?

Regards,
Alexander.

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Alexander Kochetkov]

Hello, here comments from Shawn Lin:

19 февр. 2016 г., в 9:46, Shawn Lin <shawn.lin@kernel-upstream.org> написал(а):

Seriously review the patch again, commit 271e1b86e691 "dmaengine:
pl330: add quirk for broken no flushp" has not chance to break
the platforms which don't add quirk inside the dts stuff.
as well as the other works from rockchip.

But refer to Boojin Kim's patch,
dmaengine: pl330: support burst mode for dev-to-mem and mem-to-dev transmit

may some platforms can't support multi-burst? If that's the case,
the been-broken driver should limit the maxburst.

2016-02-17 14:12 GMT+03:00 Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>:
>
> Hi,
>
> On Thursday, February 11, 2016 02:27:51 PM Vinod Koul wrote:
>> On Wed, Feb 10, 2016 at 03:56:17PM -0600, Dinh Nguyen wrote:
>> > Hi Vinod,
>> >
>> > It appears that commit 271e1b86e691 "dmaengine: pl330: add quirk for
>> > broken no flushp" is breaking uart dma on SoCFPGA. This commit is in
>> > linux-next(next-20160210).
>> >
>> > Doing a bisect pointed to commit 271e1b86e691, but I had to also revert
>> > the following commits (86a8ce7d4103 "dmaengine: pl330: add max burst for
>> > dmaengine") and (848e9776fee4 "dmaengine: pl330: support burst mode for
>> > dev-to-mem and mem-to-dev transmit") as well because the build would
>> > fail if I only revert 271e1b86e691.
>> >
>> > The SoCFPGA platform is being tested on Olof's board farm and is failing
>> > multi_v7_defconfig build because the PL330 DMA is enabled in this defconfig.
>> >
>> > After doing reverts of those 3 commits, the socfpga platform is able
>> > boot completely again with multi_v7_defconfig.
>>
>> Okay I am removing this topic from next. Also I can drop the series unless
>> someone sends me a fix in couple of days..
>
> I've noticed that these commits also break UART DMA on Samsung Exynos4412
> SoCs (I got similar bisection results as Dinh when I've noticed issue
> with next-20160211 kernel).
>
> Caesar, please keep me on Cc: for potential fix(es) / revised patches
> (I'll be happy to test them).
>
> Best regards,
> --
> Bartlomiej Zolnierkiewicz
> Samsung R&D Institute Poland
> Samsung Electronics
>

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Dinh Nguyen]

Hi,

Sorry that I couldn't get to this sooner.

On 02/18/2016 10:07 AM, Alexander Kochetkov wrote:
> Hello!
> 
> Bartlomiej, could you please tell what uart driver is used on Samsung
> Exynos4412?
> Dinh, could you please tell what uart driver is used on SoCFPGA?
> 

SoCFPGA is using the 8250_dw.c uart driver.

> Could you make two test?
> 
> 1) Checkout tree at commit 848e9776fee4 "dmaengine: pl330: support
> burst mode for
>  dev-to-mem and mem-to-dev transmit", make it buildable and see is it
> works. In order to make in buildable remove bursts argument from the
> line:
> 
>     if (*bursts == 1)
>     - return _bursts(pl330, dry_run, buf, pxs, 1);
>     + return _bursts(dry_run, buf, pxs, 1);
> 

This case still fails for me.

> 2) Checkout next-20160211 kernel tree and set src_maxburst and
> dst_maxburst to 1 inside UART driver to see is it works?
> 

This case works and the UART is able to operate in DMA mode.

Dinh

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Caesar Wang]

Hi,

Thanks Dinh & Alexander for the intergration testing.

---

@Dinh,

Can you test it again with the patch[0]?

patch[0]:
https://patchwork.kernel.org/patch/8398511/



-
Caesar
在 2016年02月23日 23:14, Dinh Nguyen 写道:
> Hi,
>
> Sorry that I couldn't get to this sooner.
>
> On 02/18/2016 10:07 AM, Alexander Kochetkov wrote:
>> Hello!
>>
>> Bartlomiej, could you please tell what uart driver is used on Samsung
>> Exynos4412?
>> Dinh, could you please tell what uart driver is used on SoCFPGA?
>>
> SoCFPGA is using the 8250_dw.c uart driver.
>
>> Could you make two test?
>>
>> 1) Checkout tree at commit 848e9776fee4 "dmaengine: pl330: support
>> burst mode for
>>   dev-to-mem and mem-to-dev transmit", make it buildable and see is it
>> works. In order to make in buildable remove bursts argument from the
>> line:
>>
>>      if (*bursts == 1)
>>      - return _bursts(pl330, dry_run, buf, pxs, 1);
>>      + return _bursts(dry_run, buf, pxs, 1);
>>
> This case still fails for me.
>
>> 2) Checkout next-20160211 kernel tree and set src_maxburst and
>> dst_maxburst to 1 inside UART driver to see is it works?
>>
> This case works and the UART is able to operate in DMA mode.
>
> Dinh
>
>
>
>
> -- 
> Thanks,
> Caesar

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Bartlomiej Zolnierkiewicz]

Hi,

On Thursday, February 18, 2016 07:07:28 PM Alexander Kochetkov wrote:
> Hello!
> 
> Bartlomiej, could you please tell what uart driver is used on Samsung
> Exynos4412?
> Dinh, could you please tell what uart driver is used on SoCFPGA?

drivers/tty/serial/samsung.c

> Could you make two test?
> 
> 1) Checkout tree at commit 848e9776fee4 "dmaengine: pl330: support
> burst mode for
>  dev-to-mem and mem-to-dev transmit", make it buildable and see is it
> works. In order to make in buildable remove bursts argument from the
> line:
> 
>     if (*bursts == 1)
>     - return _bursts(pl330, dry_run, buf, pxs, 1);
>     + return _bursts(dry_run, buf, pxs, 1);

This fails (UART DMA doesn't work).

> 2) Checkout next-20160211 kernel tree and set src_maxburst and
> dst_maxburst to 1 inside UART driver to see is it works?

This succeeds (UART DMA works fine).

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Bartlomiej Zolnierkiewicz]

Hi,

On Wednesday, February 24, 2016 02:01:59 PM Caesar Wang wrote:
> Hi,
> 
> Thanks Dinh & Alexander for the intergration testing.
> 
> ---
> 
> @Dinh,
> 
> Can you test it again with the patch[0]?
> 
> patch[0]:
> https://patchwork.kernel.org/patch/8398511/

This fixes the problem for me (tested on Samsung Exynos4412 SoC
based Trats2 board).

You may add:

Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>

to your patch.

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics

> -
> Caesar
> 在 2016年02月23日 23:14, Dinh Nguyen 写道:
> > Hi,
> >
> > Sorry that I couldn't get to this sooner.
> >
> > On 02/18/2016 10:07 AM, Alexander Kochetkov wrote:
> >> Hello!
> >>
> >> Bartlomiej, could you please tell what uart driver is used on Samsung
> >> Exynos4412?
> >> Dinh, could you please tell what uart driver is used on SoCFPGA?
> >>
> > SoCFPGA is using the 8250_dw.c uart driver.
> >
> >> Could you make two test?
> >>
> >> 1) Checkout tree at commit 848e9776fee4 "dmaengine: pl330: support
> >> burst mode for
> >>   dev-to-mem and mem-to-dev transmit", make it buildable and see is it
> >> works. In order to make in buildable remove bursts argument from the
> >> line:
> >>
> >>      if (*bursts == 1)
> >>      - return _bursts(pl330, dry_run, buf, pxs, 1);
> >>      + return _bursts(dry_run, buf, pxs, 1);
> >>
> > This case still fails for me.
> >
> >> 2) Checkout next-20160211 kernel tree and set src_maxburst and
> >> dst_maxburst to 1 inside UART driver to see is it works?
> >>
> > This case works and the UART is able to operate in DMA mode.
> >
> > Dinh

Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

[Caesar Wang]

在 2016年02月24日 21:24, Bartlomiej Zolnierkiewicz 写道:
> Hi,
>
> On Wednesday, February 24, 2016 02:01:59 PM Caesar Wang wrote:
>> Hi,
>>
>> Thanks Dinh & Alexander for the intergration testing.
>>
>> ---
>>
>> @Dinh,
>>
>> Can you test it again with the patch[0]?
>>
>> patch[0]:
>> https://patchwork.kernel.org/patch/8398511/
> This fixes the problem for me (tested on Samsung Exynos4412 SoC
> based Trats2 board).
>
> You may add:
>
> Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>


Thanks Bartlomiej for sharing the test result.:-)


-
Caesar
>
> to your patch.
>
> Best regards,
> --
> Bartlomiej Zolnierkiewicz
> Samsung R&D Institute Poland
> Samsung Electronics
>
>> -
>> Caesar
>> 在 2016年02月23日 23:14, Dinh Nguyen 写道:
>>> Hi,
>>>
>>> Sorry that I couldn't get to this sooner.
>>>
>>> On 02/18/2016 10:07 AM, Alexander Kochetkov wrote:
>>>> Hello!
>>>>
>>>> Bartlomiej, could you please tell what uart driver is used on Samsung
>>>> Exynos4412?
>>>> Dinh, could you please tell what uart driver is used on SoCFPGA?
>>>>
>>> SoCFPGA is using the 8250_dw.c uart driver.
>>>
>>>> Could you make two test?
>>>>
>>>> 1) Checkout tree at commit 848e9776fee4 "dmaengine: pl330: support
>>>> burst mode for
>>>>    dev-to-mem and mem-to-dev transmit", make it buildable and see is it
>>>> works. In order to make in buildable remove bursts argument from the
>>>> line:
>>>>
>>>>       if (*bursts == 1)
>>>>       - return _bursts(pl330, dry_run, buf, pxs, 1);
>>>>       + return _bursts(dry_run, buf, pxs, 1);
>>>>
>>> This case still fails for me.
>>>
>>>> 2) Checkout next-20160211 kernel tree and set src_maxburst and
>>>> dst_maxburst to 1 inside UART driver to see is it works?
>>>>
>>> This case works and the UART is able to operate in DMA mode.
>>>
>>> Dinh
>

-- 
Thanks,
Caesar