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From: Dave Hansen <dave.hansen@intel.com>
To: "Kirill A. Shutemov" <kirill@shutemov.name>
Cc: Andy Lutomirski <luto@amacapital.net>,
	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	X86 ML <x86@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
	"H. Peter Anvin" <hpa@zytor.com>, Andi Kleen <ak@linux.intel.com>,
	linux-arch <linux-arch@vger.kernel.org>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Linux API <linux-api@vger.kernel.org>
Subject: Re: [RFC, PATCHv2 29/29] mm, x86: introduce RLIMIT_VADDR
Date: Wed, 11 Jan 2017 10:26:03 -0800	[thread overview]
Message-ID: <3c886ad1-6c70-5875-1e69-4bcef4dbd881@intel.com> (raw)
In-Reply-To: <20170111142904.GD4895@node.shutemov.name>

On 01/11/2017 06:29 AM, Kirill A. Shutemov wrote:
> +#define mmap_max_addr() \
> +({									\
> +	unsigned long max_addr = min(TASK_SIZE, rlimit(RLIMIT_VADDR));	\
> +	/* At the moment, MPX cannot handle addresses above 47-bits */	\
> +	if (max_addr > USER_VADDR_LIM &&				\
> +			kernel_managing_mpx_tables(current->mm))	\
> + 		max_addr = USER_VADDR_LIM;				\
> + 	max_addr;							\
> +})

The bad part about this is that it adds code to a relatively fast path,
and the check that it's doing will not change its result for basically
the entire life of the process.

I'd much rather see this checking done at the point that MPX is enabled
and at the point the limit is changed.  Those are both super-rare paths.

>  extern u16 amd_get_nb_id(int cpu);
>  extern u32 amd_get_nodes_per_socket(void);
>  
> diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c
> index 324e5713d386..04fa386a165a 100644
> --- a/arch/x86/mm/mpx.c
> +++ b/arch/x86/mm/mpx.c
> @@ -354,10 +354,22 @@ int mpx_enable_management(void)
>  	 */
>  	bd_base = mpx_get_bounds_dir();
>  	down_write(&mm->mmap_sem);
> +
> +	/*
> +	 * MPX doesn't support addresses above 47-bits yes.
> +	 * Make sure nothing is mapped there before enabling.
> +	 */
> +	if (find_vma(mm, 1UL << 47)) {
> +		pr_warn("%s (%d): MPX cannot handle addresses above 47-bits. "
> +				"Disabling.", current->comm, current->pid);
> +		ret = -ENXIO;
> +		goto out;
> +	}

I don't think allowing userspace to spam unlimited amounts of message
into the kernel log is a good idea. :)  But a WARN_ONCE() might not kill
any puppies.

  parent reply	other threads:[~2017-01-11 18:26 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-27  1:53 [PATCHv2 00/29] 5-level paging Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 01/29] x86/cpufeature: Add 5-level paging detecton Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 02/29] asm-generic: introduce 5level-fixup.h Kirill A. Shutemov
2017-01-27 11:06   ` Vlastimil Babka
2017-01-27 11:30     ` Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 03/29] asm-generic: introduce __ARCH_USE_5LEVEL_HACK Kirill A. Shutemov
2017-01-27 13:24   ` Vlastimil Babka
2017-01-27 13:55     ` Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 04/29] arch, mm: convert all architectures to use 5level-fixup.h Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 05/29] asm-generic: introduce <asm-generic/pgtable-nop4d.h> Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 06/29] mm: convert generic code to 5-level paging Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 07/29] mm: introduce __p4d_alloc() Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 08/29] x86: basic changes into headers for 5-level paging Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 09/29] x86: trivial portion of 5-level paging conversion Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 10/29] x86/gup: add 5-level paging support Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 11/29] x86/ident_map: " Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 12/29] x86/mm: add support of p4d_t in vmalloc_fault() Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 13/29] x86/power: support p4d_t in hibernate code Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 14/29] x86/kexec: support p4d_t Kirill A. Shutemov
2016-12-27  1:53 ` [PATCHv2 15/29] x86: convert the rest of the code to " Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 16/29] x86: detect 5-level paging support Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 17/29] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 18/29] x86/mm: define virtual memory map for 5-level paging Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 19/29] x86/paravirt: make paravirt code support " Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 20/29] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 21/29] x86/dump_pagetables: support 5-level paging Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 22/29] x86/mm: extend kasan to " Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 23/29] x86/espfix: " Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 24/29] x86/mm: add support of additional page table level during early boot Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 25/29] x86/mm: add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 26/29] x86/mm: make kernel_physical_mapping_init() support " Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 27/29] x86/mm: add support for 5-level paging for KASLR Kirill A. Shutemov
2016-12-27  1:54 ` [PATCHv2 28/29] x86: enable 5-level paging support Kirill A. Shutemov
2016-12-27  1:54 ` [RFC, PATCHv2 29/29] mm, x86: introduce RLIMIT_VADDR Kirill A. Shutemov
2016-12-27  2:06   ` Andy Lutomirski
2016-12-27  2:24     ` Kirill A. Shutemov
2016-12-27  3:22       ` Andy Lutomirski
2017-01-02  9:09         ` Kirill A. Shutemov
2016-12-29  2:53       ` Carlos O'Donell
2016-12-31  2:08         ` Andy Lutomirski
2017-01-02  8:35           ` Kirill A. Shutemov
2017-01-13 20:11             ` H.J. Lu
2017-01-02  8:44   ` Arnd Bergmann
2017-01-03  6:08     ` Andy Lutomirski
2017-01-03 13:18       ` Arnd Bergmann
2017-01-03 18:29         ` Andy Lutomirski
2017-01-03 22:07           ` Arnd Bergmann
2017-01-03 22:09             ` Andy Lutomirski
2017-01-04 13:55               ` Arnd Bergmann
2017-01-03 16:04       ` Kirill A. Shutemov
2017-01-03 18:27         ` Andy Lutomirski
2017-01-04 14:19           ` Kirill A. Shutemov
2017-01-05 17:53             ` Andy Lutomirski
2017-01-05 19:13   ` Dave Hansen
2017-01-05 19:29     ` Kirill A. Shutemov
2017-01-05 19:39       ` Dave Hansen
2017-01-05 20:11         ` Kirill A. Shutemov
2017-01-05 20:14         ` Andy Lutomirski
2017-01-05 20:49           ` Dave Hansen
2017-01-05 21:27             ` Andy Lutomirski
2017-01-05 23:17               ` Dave Hansen
2017-01-11 14:29             ` Kirill A. Shutemov
2017-01-11 18:09               ` Andy Lutomirski
2017-01-11 18:37                 ` Kirill A. Shutemov
2017-01-11 18:49                   ` Dave Hansen
2017-01-11 19:20                     ` Andy Lutomirski
2017-01-11 19:31                       ` Linus Torvalds
2017-01-11 21:46                         ` Andi Kleen
2017-01-11 19:32                       ` Kirill A. Shutemov
2017-01-11 19:39                         ` Linus Torvalds
2017-01-11 18:26               ` Dave Hansen [this message]
2017-01-05 16:57 ` [PATCHv2 00/29] 5-level paging Kirill A. Shutemov

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