From: Dave Hansen <dave.hansen@intel.com>
To: Andy Lutomirski <luto@amacapital.net>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
X86 ML <x86@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
"H. Peter Anvin" <hpa@zytor.com>, Andi Kleen <ak@linux.intel.com>,
linux-arch <linux-arch@vger.kernel.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Linux API <linux-api@vger.kernel.org>
Subject: Re: [RFC, PATCHv2 29/29] mm, x86: introduce RLIMIT_VADDR
Date: Thu, 5 Jan 2017 12:49:44 -0800 [thread overview]
Message-ID: <978d5f1a-ec4d-f747-93fd-27ecfe10cb88@intel.com> (raw)
In-Reply-To: <CALCETrUQ2+P424d9MW-Dy2yQ0+EnMfBuY80wd8NkNmc8is0AUw@mail.gmail.com>
On 01/05/2017 12:14 PM, Andy Lutomirski wrote:
>> I'm not sure I'm comfortable with this. Do other rlimit changes cause
>> silent data corruption? I'm pretty sure doing this to MPX would.
>>
> What actually goes wrong in this case? That is, what combination of
> MPX setup of subsequent allocations will cause a problem, and is the
> problem worse than just a segfault? IMO it would be really nice to
> keep the messy case confined to MPX.
The MPX bounds tables are indexed by virtual address. They need to grow
if the virtual address space grows. There's an MSR that controls
whether we use the 48-bit or 57-bit layout. It basically decides
whether we need a 2GB (48-bit) or 1TB (57-bit) bounds directory.
The question is what we do with legacy MPX applications. We obviously
can't let them just allocate a 2GB table and then go let the hardware
pretend it's 1TB in size. We also can't hand the hardware using a 2GB
table an address >48-bits.
Ideally, I'd like to make sure that legacy MPX can't be enabled if this
RLIMIT is set over 48-bits (really 47). I'd also like to make sure that
legacy MPX is active, that the RLIMIT can't be raised because all hell
will break loose when the new addresses show up.
Remember, we already have (legacy MPX) binaries in the wild that have no
knowledge of this stuff. So, we can implicitly have the kernel bump
this rlimit around, but we can't expect userspace to do it, ever.
next prev parent reply other threads:[~2017-01-05 20:49 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-27 1:53 [PATCHv2 00/29] 5-level paging Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 01/29] x86/cpufeature: Add 5-level paging detecton Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 02/29] asm-generic: introduce 5level-fixup.h Kirill A. Shutemov
2017-01-27 11:06 ` Vlastimil Babka
2017-01-27 11:30 ` Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 03/29] asm-generic: introduce __ARCH_USE_5LEVEL_HACK Kirill A. Shutemov
2017-01-27 13:24 ` Vlastimil Babka
2017-01-27 13:55 ` Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 04/29] arch, mm: convert all architectures to use 5level-fixup.h Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 05/29] asm-generic: introduce <asm-generic/pgtable-nop4d.h> Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 06/29] mm: convert generic code to 5-level paging Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 07/29] mm: introduce __p4d_alloc() Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 08/29] x86: basic changes into headers for 5-level paging Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 09/29] x86: trivial portion of 5-level paging conversion Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 10/29] x86/gup: add 5-level paging support Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 11/29] x86/ident_map: " Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 12/29] x86/mm: add support of p4d_t in vmalloc_fault() Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 13/29] x86/power: support p4d_t in hibernate code Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 14/29] x86/kexec: support p4d_t Kirill A. Shutemov
2016-12-27 1:53 ` [PATCHv2 15/29] x86: convert the rest of the code to " Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 16/29] x86: detect 5-level paging support Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 17/29] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 18/29] x86/mm: define virtual memory map for 5-level paging Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 19/29] x86/paravirt: make paravirt code support " Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 20/29] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 21/29] x86/dump_pagetables: support 5-level paging Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 22/29] x86/mm: extend kasan to " Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 23/29] x86/espfix: " Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 24/29] x86/mm: add support of additional page table level during early boot Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 25/29] x86/mm: add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 26/29] x86/mm: make kernel_physical_mapping_init() support " Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 27/29] x86/mm: add support for 5-level paging for KASLR Kirill A. Shutemov
2016-12-27 1:54 ` [PATCHv2 28/29] x86: enable 5-level paging support Kirill A. Shutemov
2016-12-27 1:54 ` [RFC, PATCHv2 29/29] mm, x86: introduce RLIMIT_VADDR Kirill A. Shutemov
2016-12-27 2:06 ` Andy Lutomirski
2016-12-27 2:24 ` Kirill A. Shutemov
2016-12-27 3:22 ` Andy Lutomirski
2017-01-02 9:09 ` Kirill A. Shutemov
2016-12-29 2:53 ` Carlos O'Donell
2016-12-31 2:08 ` Andy Lutomirski
2017-01-02 8:35 ` Kirill A. Shutemov
2017-01-13 20:11 ` H.J. Lu
2017-01-02 8:44 ` Arnd Bergmann
2017-01-03 6:08 ` Andy Lutomirski
2017-01-03 13:18 ` Arnd Bergmann
2017-01-03 18:29 ` Andy Lutomirski
2017-01-03 22:07 ` Arnd Bergmann
2017-01-03 22:09 ` Andy Lutomirski
2017-01-04 13:55 ` Arnd Bergmann
2017-01-03 16:04 ` Kirill A. Shutemov
2017-01-03 18:27 ` Andy Lutomirski
2017-01-04 14:19 ` Kirill A. Shutemov
2017-01-05 17:53 ` Andy Lutomirski
2017-01-05 19:13 ` Dave Hansen
2017-01-05 19:29 ` Kirill A. Shutemov
2017-01-05 19:39 ` Dave Hansen
2017-01-05 20:11 ` Kirill A. Shutemov
2017-01-05 20:14 ` Andy Lutomirski
2017-01-05 20:49 ` Dave Hansen [this message]
2017-01-05 21:27 ` Andy Lutomirski
2017-01-05 23:17 ` Dave Hansen
2017-01-11 14:29 ` Kirill A. Shutemov
2017-01-11 18:09 ` Andy Lutomirski
2017-01-11 18:37 ` Kirill A. Shutemov
2017-01-11 18:49 ` Dave Hansen
2017-01-11 19:20 ` Andy Lutomirski
2017-01-11 19:31 ` Linus Torvalds
2017-01-11 21:46 ` Andi Kleen
2017-01-11 19:32 ` Kirill A. Shutemov
2017-01-11 19:39 ` Linus Torvalds
2017-01-11 18:26 ` Dave Hansen
2017-01-05 16:57 ` [PATCHv2 00/29] 5-level paging Kirill A. Shutemov
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