* [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list @ 2019-03-12 1:50 Peng Ma 2019-03-12 1:50 ` [v7 2/3] arm64: dts: lx2160a: add sata node support Peng Ma ` (2 more replies) 0 siblings, 3 replies; 10+ messages in thread From: Peng Ma @ 2019-03-12 1:50 UTC (permalink / raw) To: axboe, robh+dt, mark.rutland, shawnguo, leoyang.li Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel, Peng Ma Add lx2160a compatible to bindings documentation. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> --- changed for V7: - add Reviewed by tag. .../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt index 7c3ca0e..9ecc019 100644 --- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt +++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt @@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller Required properties: - reg: Physical base address and size of the controller's register area. - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where - chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc. + chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a, lx2160a, etc. - clocks: Input clock specifier. Refer to common clock bindings. - interrupts: Interrupt specifier. Refer to interrupt binding. -- 1.7.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [v7 2/3] arm64: dts: lx2160a: add sata node support 2019-03-12 1:50 [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list Peng Ma @ 2019-03-12 1:50 ` Peng Ma 2019-04-11 1:34 ` Shawn Guo 2019-03-12 1:50 ` [v7 3/3] ahci: qoriq: add lx2160 platforms support Peng Ma 2019-04-11 1:38 ` [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list Shawn Guo 2 siblings, 1 reply; 10+ messages in thread From: Peng Ma @ 2019-03-12 1:50 UTC (permalink / raw) To: axboe, robh+dt, mark.rutland, shawnguo, leoyang.li Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel, Peng Ma Add SATA device nodes for fsl-lx2160a and enable support for QDS and RDB boards. Signed-off-by: Peng Ma <peng.ma@nxp.com> --- changed for V7: - no changed arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 16 +++++++ arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 16 +++++++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 44 +++++++++++++++++++++ 3 files changed, 76 insertions(+), 0 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts index 99a22ab..1a5acf6 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -95,6 +95,22 @@ }; }; +&sata0 { + status = "okay"; +}; + +&sata1 { + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +&sata3 { + status = "okay"; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts index 6481e5f..5b6799e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -102,6 +102,22 @@ }; }; +&sata0 { + status = "okay"; +}; + +&sata1 { + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +&sata3 { + status = "okay"; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index a79f5c1..592034b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -671,6 +671,50 @@ status = "disabled"; }; + sata0: sata@3200000 { + compatible = "fsl,lx2160a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>, + <0x7 0x100520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clockgen 4 3>; + dma-coherent; + status = "disabled"; + }; + + sata1: sata@3210000 { + compatible = "fsl,lx2160a-ahci"; + reg = <0x0 0x3210000 0x0 0x10000>, + <0x7 0x100520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clockgen 4 3>; + dma-coherent; + status = "disabled"; + }; + + sata2: sata@3220000 { + compatible = "fsl,lx2160a-ahci"; + reg = <0x0 0x3220000 0x0 0x10000>, + <0x7 0x100520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clockgen 4 3>; + dma-coherent; + status = "disabled"; + }; + + sata3: sata@3230000 { + compatible = "fsl,lx2160a-ahci"; + reg = <0x0 0x3230000 0x0 0x10000>, + <0x7 0x100520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clockgen 4 3>; + dma-coherent; + status = "disabled"; + }; + smmu: iommu@5000000 { compatible = "arm,mmu-500"; reg = <0 0x5000000 0 0x800000>; -- 1.7.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [v7 2/3] arm64: dts: lx2160a: add sata node support 2019-03-12 1:50 ` [v7 2/3] arm64: dts: lx2160a: add sata node support Peng Ma @ 2019-04-11 1:34 ` Shawn Guo 0 siblings, 0 replies; 10+ messages in thread From: Shawn Guo @ 2019-04-11 1:34 UTC (permalink / raw) To: Peng Ma Cc: axboe, robh+dt, mark.rutland, leoyang.li, linux-ide, devicetree, linux-kernel, linux-arm-kernel On Tue, Mar 12, 2019 at 09:50:18AM +0800, Peng Ma wrote: > Add SATA device nodes for fsl-lx2160a and enable support > for QDS and RDB boards. > > Signed-off-by: Peng Ma <peng.ma@nxp.com> Applied, thanks. ^ permalink raw reply [flat|nested] 10+ messages in thread
* [v7 3/3] ahci: qoriq: add lx2160 platforms support 2019-03-12 1:50 [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list Peng Ma 2019-03-12 1:50 ` [v7 2/3] arm64: dts: lx2160a: add sata node support Peng Ma @ 2019-03-12 1:50 ` Peng Ma 2019-04-08 10:06 ` Peng Ma 2019-04-11 1:38 ` [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list Shawn Guo 2 siblings, 1 reply; 10+ messages in thread From: Peng Ma @ 2019-03-12 1:50 UTC (permalink / raw) To: axboe, robh+dt, mark.rutland, shawnguo, leoyang.li Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel, Peng Ma Lx2160a is a new introduced soc which supports ATA3.0 Signed-off-by: Peng Ma <peng.ma@nxp.com> --- changed for V7: - no changed. drivers/ata/ahci_qoriq.c | 52 +++++++++++++++++++++++++++++++--------------- 1 files changed, 35 insertions(+), 17 deletions(-) diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c index ce59253..08dbb86 100644 --- a/drivers/ata/ahci_qoriq.c +++ b/drivers/ata/ahci_qoriq.c @@ -58,6 +58,7 @@ enum ahci_qoriq_type { AHCI_LS1046A, AHCI_LS1088A, AHCI_LS2088A, + AHCI_LX2160A, }; struct ahci_qoriq_priv { @@ -67,6 +68,8 @@ struct ahci_qoriq_priv { bool is_dmacoherent; }; +static bool ecc_initialized; + static const struct of_device_id ahci_qoriq_of_match[] = { { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A}, { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A}, @@ -74,6 +77,7 @@ struct ahci_qoriq_priv { { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A}, { .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A}, { .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A}, + { .compatible = "fsl,lx2160a-ahci", .data = (void *)AHCI_LX2160A}, {}, }; MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match); @@ -165,9 +169,10 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) switch (qpriv->type) { case AHCI_LS1021A: - if (!qpriv->ecc_addr) + if (!(qpriv->ecc_addr || ecc_initialized)) return -EINVAL; - writel(SATA_ECC_DISABLE, qpriv->ecc_addr); + else if (qpriv->ecc_addr && !ecc_initialized) + writel(SATA_ECC_DISABLE, qpriv->ecc_addr); writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2); writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3); @@ -180,10 +185,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) break; case AHCI_LS1043A: - if (!qpriv->ecc_addr) + if (!(qpriv->ecc_addr || ecc_initialized)) return -EINVAL; - writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, - qpriv->ecc_addr); + else if (qpriv->ecc_addr && !ecc_initialized) + writel(readl(qpriv->ecc_addr) | + ECC_DIS_ARMV8_CH2, + qpriv->ecc_addr); writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ -202,10 +209,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) break; case AHCI_LS1046A: - if (!qpriv->ecc_addr) + if (!(qpriv->ecc_addr || ecc_initialized)) return -EINVAL; - writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, - qpriv->ecc_addr); + else if (qpriv->ecc_addr && !ecc_initialized) + writel(readl(qpriv->ecc_addr) | + ECC_DIS_ARMV8_CH2, + qpriv->ecc_addr); writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ -215,10 +224,13 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) break; case AHCI_LS1088A: - if (!qpriv->ecc_addr) + case AHCI_LX2160A: + if (!(qpriv->ecc_addr || ecc_initialized)) return -EINVAL; - writel(readl(qpriv->ecc_addr) | ECC_DIS_LS1088A, - qpriv->ecc_addr); + else if (qpriv->ecc_addr && !ecc_initialized) + writel(readl(qpriv->ecc_addr) | + ECC_DIS_LS1088A, + qpriv->ecc_addr); writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ -237,6 +249,7 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) break; } + ecc_initialized = true; return 0; } @@ -264,13 +277,18 @@ static int ahci_qoriq_probe(struct platform_device *pdev) qoriq_priv->type = (enum ahci_qoriq_type)of_id->data; - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "sata-ecc"); - if (res) { - qoriq_priv->ecc_addr = devm_ioremap_resource(dev, res); - if (IS_ERR(qoriq_priv->ecc_addr)) - return PTR_ERR(qoriq_priv->ecc_addr); + if (unlikely(!ecc_initialized)) { + res = platform_get_resource_byname(pdev, + IORESOURCE_MEM, + "sata-ecc"); + if (res) { + qoriq_priv->ecc_addr = + devm_ioremap_resource(dev, res); + if (IS_ERR(qoriq_priv->ecc_addr)) + return PTR_ERR(qoriq_priv->ecc_addr); + } } + qoriq_priv->is_dmacoherent = of_dma_is_coherent(np); rc = ahci_platform_enable_resources(hpriv); -- 1.7.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* RE: [v7 3/3] ahci: qoriq: add lx2160 platforms support 2019-03-12 1:50 ` [v7 3/3] ahci: qoriq: add lx2160 platforms support Peng Ma @ 2019-04-08 10:06 ` Peng Ma 2019-04-08 15:20 ` Jens Axboe 0 siblings, 1 reply; 10+ messages in thread From: Peng Ma @ 2019-04-08 10:06 UTC (permalink / raw) To: axboe, robh+dt, mark.rutland, shawnguo, Leo Li Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel, Andy Tang Hi axboe, If you have no comments on these paths, please merge. Thank you very much. Patch link: http://patchwork.ozlabs.org/patch/1055028/ http://patchwork.ozlabs.org/patch/1054189/ Best Regards, Peng >-----Original Message----- >From: Peng Ma <peng.ma@nxp.com> >Sent: 2019年3月12日 9:50 >To: axboe@kernel.dk; robh+dt@kernel.org; mark.rutland@arm.com; >shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com> >Cc: linux-ide@vger.kernel.org; devicetree@vger.kernel.org; >linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Peng Ma ><peng.ma@nxp.com> >Subject: [v7 3/3] ahci: qoriq: add lx2160 platforms support > >Lx2160a is a new introduced soc which supports ATA3.0 > >Signed-off-by: Peng Ma <peng.ma@nxp.com> >--- >changed for V7: > - no changed. > > drivers/ata/ahci_qoriq.c | 52 >+++++++++++++++++++++++++++++++--------------- > 1 files changed, 35 insertions(+), 17 deletions(-) > >diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c index >ce59253..08dbb86 100644 >--- a/drivers/ata/ahci_qoriq.c >+++ b/drivers/ata/ahci_qoriq.c >@@ -58,6 +58,7 @@ enum ahci_qoriq_type { > AHCI_LS1046A, > AHCI_LS1088A, > AHCI_LS2088A, >+ AHCI_LX2160A, > }; > > struct ahci_qoriq_priv { >@@ -67,6 +68,8 @@ struct ahci_qoriq_priv { > bool is_dmacoherent; > }; > >+static bool ecc_initialized; >+ > static const struct of_device_id ahci_qoriq_of_match[] = { > { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A}, > { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A}, @@ >-74,6 +77,7 @@ struct ahci_qoriq_priv { > { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A}, > { .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A}, > { .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A}, >+ { .compatible = "fsl,lx2160a-ahci", .data = (void *)AHCI_LX2160A}, > {}, > }; > MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match); @@ -165,9 +169,10 @@ >static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) > > switch (qpriv->type) { > case AHCI_LS1021A: >- if (!qpriv->ecc_addr) >+ if (!(qpriv->ecc_addr || ecc_initialized)) > return -EINVAL; >- writel(SATA_ECC_DISABLE, qpriv->ecc_addr); >+ else if (qpriv->ecc_addr && !ecc_initialized) >+ writel(SATA_ECC_DISABLE, qpriv->ecc_addr); > writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); > writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2); > writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3); @@ -180,10 >+185,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) > break; > > case AHCI_LS1043A: >- if (!qpriv->ecc_addr) >+ if (!(qpriv->ecc_addr || ecc_initialized)) > return -EINVAL; >- writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, >- qpriv->ecc_addr); >+ else if (qpriv->ecc_addr && !ecc_initialized) >+ writel(readl(qpriv->ecc_addr) | >+ ECC_DIS_ARMV8_CH2, >+ qpriv->ecc_addr); > writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); > writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); > writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ >-202,10 +209,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv >*hpriv) > break; > > case AHCI_LS1046A: >- if (!qpriv->ecc_addr) >+ if (!(qpriv->ecc_addr || ecc_initialized)) > return -EINVAL; >- writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, >- qpriv->ecc_addr); >+ else if (qpriv->ecc_addr && !ecc_initialized) >+ writel(readl(qpriv->ecc_addr) | >+ ECC_DIS_ARMV8_CH2, >+ qpriv->ecc_addr); > writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); > writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); > writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ >-215,10 +224,13 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv >*hpriv) > break; > > case AHCI_LS1088A: >- if (!qpriv->ecc_addr) >+ case AHCI_LX2160A: >+ if (!(qpriv->ecc_addr || ecc_initialized)) > return -EINVAL; >- writel(readl(qpriv->ecc_addr) | ECC_DIS_LS1088A, >- qpriv->ecc_addr); >+ else if (qpriv->ecc_addr && !ecc_initialized) >+ writel(readl(qpriv->ecc_addr) | >+ ECC_DIS_LS1088A, >+ qpriv->ecc_addr); > writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); > writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); > writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ -237,6 >+249,7 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) > break; > } > >+ ecc_initialized = true; > return 0; > } > >@@ -264,13 +277,18 @@ static int ahci_qoriq_probe(struct platform_device >*pdev) > > qoriq_priv->type = (enum ahci_qoriq_type)of_id->data; > >- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, >- "sata-ecc"); >- if (res) { >- qoriq_priv->ecc_addr = devm_ioremap_resource(dev, res); >- if (IS_ERR(qoriq_priv->ecc_addr)) >- return PTR_ERR(qoriq_priv->ecc_addr); >+ if (unlikely(!ecc_initialized)) { >+ res = platform_get_resource_byname(pdev, >+ IORESOURCE_MEM, >+ "sata-ecc"); >+ if (res) { >+ qoriq_priv->ecc_addr = >+ devm_ioremap_resource(dev, res); >+ if (IS_ERR(qoriq_priv->ecc_addr)) >+ return PTR_ERR(qoriq_priv->ecc_addr); >+ } > } >+ > qoriq_priv->is_dmacoherent = of_dma_is_coherent(np); > > rc = ahci_platform_enable_resources(hpriv); >-- >1.7.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [v7 3/3] ahci: qoriq: add lx2160 platforms support 2019-04-08 10:06 ` Peng Ma @ 2019-04-08 15:20 ` Jens Axboe 2019-04-09 6:44 ` [EXT] " Peng Ma 0 siblings, 1 reply; 10+ messages in thread From: Jens Axboe @ 2019-04-08 15:20 UTC (permalink / raw) To: Peng Ma, robh+dt, mark.rutland, shawnguo, Leo Li Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel, Andy Tang On 4/8/19 4:06 AM, Peng Ma wrote: > Hi axboe, > > If you have no comments on these paths, please merge. > Thank you very much. > Patch link: > http://patchwork.ozlabs.org/patch/1055028/ > http://patchwork.ozlabs.org/patch/1054189/ Can you resend, it's not clear which is which here, and what parts of the series goes where. -- Jens Axboe ^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [EXT] Re: [v7 3/3] ahci: qoriq: add lx2160 platforms support 2019-04-08 15:20 ` Jens Axboe @ 2019-04-09 6:44 ` Peng Ma 2019-04-09 14:17 ` Jens Axboe 0 siblings, 1 reply; 10+ messages in thread From: Peng Ma @ 2019-04-09 6:44 UTC (permalink / raw) To: Jens Axboe, robh+dt, mark.rutland, shawnguo, Leo Li Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel, Andy Tang, Jianchao Wang Hi Axboe, Patch link: http://patchwork.ozlabs.org/patch/1055028/ http://patchwork.ozlabs.org/patch/1054189/ Best Regards, Peng >-----Original Message----- >From: Jens Axboe <axboe@kernel.dk> >Sent: 2019年4月8日 23:21 >To: Peng Ma <peng.ma@nxp.com>; robh+dt@kernel.org; >mark.rutland@arm.com; shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com> >Cc: linux-ide@vger.kernel.org; devicetree@vger.kernel.org; >linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Andy Tang ><andy.tang@nxp.com> >Subject: [EXT] Re: [v7 3/3] ahci: qoriq: add lx2160 platforms support > >WARNING: This email was created outside of NXP. DO NOT CLICK links or >attachments unless you recognize the sender and know the content is safe. > > > >On 4/8/19 4:06 AM, Peng Ma wrote: >> Hi axboe, >> >> If you have no comments on these paths, please merge. >> Thank you very much. >> Patch link: >> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatch >> >work.ozlabs.org%2Fpatch%2F1055028%2F&data=02%7C01%7Cpeng.ma >%40nxp. >> >com%7C40e859676606431ce84908d6bc35bf3d%7C686ea1d3bc2b4c6fa92cd9 >9c5c301 >> >635%7C0%7C1%7C636903336364109322&sdata=Q8vElMkaDmHvphhVo >12BtFUvqXp >> T%2BDBrnvdjV%2FFizfs%3D&reserved=0 >> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatch >> >work.ozlabs.org%2Fpatch%2F1054189%2F&data=02%7C01%7Cpeng.ma >%40nxp. >> >com%7C40e859676606431ce84908d6bc35bf3d%7C686ea1d3bc2b4c6fa92cd9 >9c5c301 >> >635%7C0%7C1%7C636903336364109322&sdata=HNuiGz%2BhfegcgNQ7 >T%2BPqGPI >> bS3ch%2FUqtxmHBfL6MoRo%3D&reserved=0 > >Can you resend, it's not clear which is which here, and what parts of the series >goes where. > >-- >Jens Axboe ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [EXT] Re: [v7 3/3] ahci: qoriq: add lx2160 platforms support 2019-04-09 6:44 ` [EXT] " Peng Ma @ 2019-04-09 14:17 ` Jens Axboe 2019-04-10 2:34 ` Peng Ma 0 siblings, 1 reply; 10+ messages in thread From: Jens Axboe @ 2019-04-09 14:17 UTC (permalink / raw) To: Peng Ma, robh+dt, mark.rutland, shawnguo, Leo Li Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel, Andy Tang, Jianchao Wang On 4/9/19 12:44 AM, Peng Ma wrote: > Hi Axboe, > > Patch link: > > http://patchwork.ozlabs.org/patch/1055028/ > > http://patchwork.ozlabs.org/patch/1054189/ Applied, thanks. -- Jens Axboe ^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [EXT] Re: [v7 3/3] ahci: qoriq: add lx2160 platforms support 2019-04-09 14:17 ` Jens Axboe @ 2019-04-10 2:34 ` Peng Ma 0 siblings, 0 replies; 10+ messages in thread From: Peng Ma @ 2019-04-10 2:34 UTC (permalink / raw) To: Jens Axboe, robh+dt, mark.rutland, shawnguo, Leo Li Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel, Andy Tang, Jianchao Wang Hi Axboe, Thanks very much. Best Regards, Peng >-----Original Message----- >From: Jens Axboe <axboe@kernel.dk> >Sent: 2019年4月9日 22:17 >To: Peng Ma <peng.ma@nxp.com>; robh+dt@kernel.org; >mark.rutland@arm.com; shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com> >Cc: linux-ide@vger.kernel.org; devicetree@vger.kernel.org; >linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Andy Tang ><andy.tang@nxp.com>; Jianchao Wang <jianchao.wang@nxp.com> >Subject: Re: [EXT] Re: [v7 3/3] ahci: qoriq: add lx2160 platforms support > >WARNING: This email was created outside of NXP. DO NOT CLICK links or >attachments unless you recognize the sender and know the content is safe. > > > >On 4/9/19 12:44 AM, Peng Ma wrote: >> Hi Axboe, >> >> Patch link: >> >> >https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatchwo >rk.ozlabs.org%2Fpatch%2F1055028%2F&data=02%7C01%7Cpeng.ma%40 >nxp.com%7Ce76be539c24a4733cf3f08d6bcf618de%7C686ea1d3bc2b4c6fa92 >cd99c5c301635%7C0%7C1%7C636904162505501500&sdata=Am7QEJ2Y >sqkNLXUtIMXU%2Fs5Mt4QhzYYa1FjbhWaAXiw%3D&reserved=0 >> >> >https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatchwo >rk.ozlabs.org%2Fpatch%2F1054189%2F&data=02%7C01%7Cpeng.ma%40 >nxp.com%7Ce76be539c24a4733cf3f08d6bcf618de%7C686ea1d3bc2b4c6fa92 >cd99c5c301635%7C0%7C1%7C636904162505501500&sdata=ikpNC4M% >2BDq3%2FPYsXLHbPDcDu2KfgIRXs%2BjDDXWtp2jk%3D&reserved=0 > >Applied, thanks. > >-- >Jens Axboe ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list 2019-03-12 1:50 [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list Peng Ma 2019-03-12 1:50 ` [v7 2/3] arm64: dts: lx2160a: add sata node support Peng Ma 2019-03-12 1:50 ` [v7 3/3] ahci: qoriq: add lx2160 platforms support Peng Ma @ 2019-04-11 1:38 ` Shawn Guo 2 siblings, 0 replies; 10+ messages in thread From: Shawn Guo @ 2019-04-11 1:38 UTC (permalink / raw) To: Peng Ma Cc: axboe, robh+dt, mark.rutland, leoyang.li, linux-ide, devicetree, linux-kernel, linux-arm-kernel On Tue, Mar 12, 2019 at 09:50:17AM +0800, Peng Ma wrote: > Add lx2160a compatible to bindings documentation. > > Signed-off-by: Peng Ma <peng.ma@nxp.com> > Reviewed-by: Rob Herring <robh@kernel.org> I assume that the bindings will go via AHCI tree. Otherwise, please let me know. Shawn ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-04-11 1:38 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-03-12 1:50 [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list Peng Ma 2019-03-12 1:50 ` [v7 2/3] arm64: dts: lx2160a: add sata node support Peng Ma 2019-04-11 1:34 ` Shawn Guo 2019-03-12 1:50 ` [v7 3/3] ahci: qoriq: add lx2160 platforms support Peng Ma 2019-04-08 10:06 ` Peng Ma 2019-04-08 15:20 ` Jens Axboe 2019-04-09 6:44 ` [EXT] " Peng Ma 2019-04-09 14:17 ` Jens Axboe 2019-04-10 2:34 ` Peng Ma 2019-04-11 1:38 ` [v7 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list Shawn Guo
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