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* ANDN and Group 17 in x86-opcode-map.txt
@ 2012-01-17 19:14 Ulrich Drepper
  2012-01-17 19:21 ` H. Peter Anvin
  2012-01-17 22:43 ` [tip:x86/urgent] x86, opcode: ANDN and Group 17 in x86-opcode-map. txt tip-bot for Ulrich Drepper
  0 siblings, 2 replies; 4+ messages in thread
From: Ulrich Drepper @ 2012-01-17 19:14 UTC (permalink / raw)
  To: Masami Hiramatsu, Linux Kernel Mailing List, Thomas Gleixner,
	Ingo Molnar, H. Peter Anvin, x86, pp-manager

The Intel documentation at

http://software.intel.com/file/36945

shows the ANDN opcode and Group 17 with encoding f2 and f3 encoding
respectively.  The current version of x86-opcode-map.txt shows them
with f3 and f4.  Unless someone can point to documentation which shows
the currently used encoding the following patch be applied.

Signed-off-by: Ulrich Drepper <drepper@gmail.com>

diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt
index 5b83c51..4c8010d 100644
--- a/arch/x86/lib/x86-opcode-map.txt
+++ b/arch/x86/lib/x86-opcode-map.txt
@@ -729,8 +729,8 @@ de: VAESDEC Vdq,Hdq,Wdq (66),(v1)
 df: VAESDECLAST Vdq,Hdq,Wdq (66),(v1)
 f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2)
 f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2)
-f3: ANDN Gy,By,Ey (v)
-f4: Grp17 (1A)
+f2: ANDN Gy,By,Ey (v)
+f3: Grp17 (1A)
 f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
 f6: MULX By,Gy,rDX,Ey (F2),(v)
 f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By
(F3),(v) | SHRX Gy,Ey,By (F2),(v)

^ permalink raw reply related	[flat|nested] 4+ messages in thread

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2012-01-17 19:14 ANDN and Group 17 in x86-opcode-map.txt Ulrich Drepper
2012-01-17 19:21 ` H. Peter Anvin
2012-01-18  3:08   ` Masami Hiramatsu
2012-01-17 22:43 ` [tip:x86/urgent] x86, opcode: ANDN and Group 17 in x86-opcode-map. txt tip-bot for Ulrich Drepper

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