[PATCH v2 1/2] arm64: mm: Rename asid2idx() to ctxid2asid()

[PATCH v2 1/2] arm64: mm: Rename asid2idx() to ctxid2asid()

[Yunfeng Ye]

The commit 0c8ea531b774 ("arm64: mm: Allocate ASIDs in pairs") introduce
the asid2idx and idx2asid macro, but these macros are not really useful
after the commit f88f42f853a8 ("arm64: context: Free up kernel ASIDs if
KPTI is not in use").

The code "(asid & ~ASID_MASK)" can be instead by a macro, which is the
same code with asid2idx(). So rename it to ctxid2asid() for a better
understanding.

Also we add asid2ctxid() macro, the contextid can be generated based on
the asid and generation through this macro.
---
 arch/arm64/mm/context.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index cd72576ae2b7..bbc2708fe928 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -35,8 +35,8 @@ static unsigned long *pinned_asid_map;
 #define ASID_FIRST_VERSION	(1UL << asid_bits)

 #define NUM_USER_ASIDS		ASID_FIRST_VERSION
-#define asid2idx(asid)		((asid) & ~ASID_MASK)
-#define idx2asid(idx)		asid2idx(idx)
+#define ctxid2asid(asid)	((asid) & ~ASID_MASK)
+#define asid2ctxid(asid, genid)	((asid) | (genid))

 /* Get the ASIDBits supported by the current CPU */
 static u32 get_cpu_asid_bits(void)
@@ -120,7 +120,7 @@ static void flush_context(void)
 		 */
 		if (asid == 0)
 			asid = per_cpu(reserved_asids, i);
-		__set_bit(asid2idx(asid), asid_map);
+		__set_bit(ctxid2asid(asid), asid_map);
 		per_cpu(reserved_asids, i) = asid;
 	}

@@ -162,7 +162,7 @@ static u64 new_context(struct mm_struct *mm)
 	u64 generation = atomic64_read(&asid_generation);

 	if (asid != 0) {
-		u64 newasid = generation | (asid & ~ASID_MASK);
+		u64 newasid = asid2ctxid(ctxid2asid(asid), generation);

 		/*
 		 * If our current ASID was active during a rollover, we
@@ -183,7 +183,7 @@ static u64 new_context(struct mm_struct *mm)
 		 * We had a valid ASID in a previous life, so try to re-use
 		 * it if possible.
 		 */
-		if (!__test_and_set_bit(asid2idx(asid), asid_map))
+		if (!__test_and_set_bit(ctxid2asid(asid), asid_map))
 			return newasid;
 	}

@@ -209,7 +209,7 @@ static u64 new_context(struct mm_struct *mm)
 set_asid:
 	__set_bit(asid, asid_map);
 	cur_idx = asid;
-	return idx2asid(asid) | generation;
+	return asid2ctxid(asid, generation);
 }

 void check_and_switch_context(struct mm_struct *mm)
@@ -300,13 +300,13 @@ unsigned long arm64_mm_context_get(struct mm_struct *mm)
 	}

 	nr_pinned_asids++;
-	__set_bit(asid2idx(asid), pinned_asid_map);
+	__set_bit(ctxid2asid(asid), pinned_asid_map);
 	refcount_set(&mm->context.pinned, 1);

 out_unlock:
 	raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);

-	asid &= ~ASID_MASK;
+	asid = ctxid2asid(asid);

 	/* Set the equivalent of USER_ASID_BIT */
 	if (asid && arm64_kernel_unmapped_at_el0())
@@ -327,7 +327,7 @@ void arm64_mm_context_put(struct mm_struct *mm)
 	raw_spin_lock_irqsave(&cpu_asid_lock, flags);

 	if (refcount_dec_and_test(&mm->context.pinned)) {
-		__clear_bit(asid2idx(asid), pinned_asid_map);
+		__clear_bit(ctxid2asid(asid), pinned_asid_map);
 		nr_pinned_asids--;
 	}

-- 
2.27.0

[PATCH v2 2/2] arm64: mm: Use asid feature macro for cheanup

[Yunfeng Ye]

The commit 95b54c3e4c92 ("KVM: arm64: Add feature register flag
definitions") introduce the ID_AA64MMFR0_ASID_8 and ID_AA64MMFR0_ASID_16
macros.

We can use these macros for cheanup in get_cpu_asid_bits().

No functional change.
---
 arch/arm64/mm/context.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index bbc2708fe928..b8b4cf0bcf39 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -50,10 +50,10 @@ static u32 get_cpu_asid_bits(void)
 		pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
 					smp_processor_id(),  fld);
 		fallthrough;
-	case 0:
+	case ID_AA64MMFR0_ASID_8:
 		asid = 8;
 		break;
-	case 2:
+	case ID_AA64MMFR0_ASID_16:
 		asid = 16;
 	}

-- 
2.27.0

Re: [PATCH v2 2/2] arm64: mm: Use asid feature macro for cheanup

[Kefeng Wang]

Delete the first blank line and add your SOB,

For series,

Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com>

On 2021/12/8 17:17, Yunfeng Ye wrote:
> The commit 95b54c3e4c92 ("KVM: arm64: Add feature register flag
> definitions") introduce the ID_AA64MMFR0_ASID_8 and ID_AA64MMFR0_ASID_16
> macros.
>
> We can use these macros for cheanup in get_cpu_asid_bits().
>
> No functional change.
> ---
>   arch/arm64/mm/context.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
> index bbc2708fe928..b8b4cf0bcf39 100644
> --- a/arch/arm64/mm/context.c
> +++ b/arch/arm64/mm/context.c
> @@ -50,10 +50,10 @@ static u32 get_cpu_asid_bits(void)
>   		pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
>   					smp_processor_id(),  fld);
>   		fallthrough;
> -	case 0:
> +	case ID_AA64MMFR0_ASID_8:
>   		asid = 8;
>   		break;
> -	case 2:
> +	case ID_AA64MMFR0_ASID_16:
>   		asid = 16;
>   	}
>

Re: [PATCH v2 1/2] arm64: mm: Rename asid2idx() to ctxid2asid()

[Catalin Marinas]

On Wed, Dec 08, 2021 at 05:16:45PM +0800, Yunfeng Ye wrote:
> The commit 0c8ea531b774 ("arm64: mm: Allocate ASIDs in pairs") introduce
> the asid2idx and idx2asid macro, but these macros are not really useful
> after the commit f88f42f853a8 ("arm64: context: Free up kernel ASIDs if
> KPTI is not in use").
> 
> The code "(asid & ~ASID_MASK)" can be instead by a macro, which is the
> same code with asid2idx(). So rename it to ctxid2asid() for a better
> understanding.
> 
> Also we add asid2ctxid() macro, the contextid can be generated based on
> the asid and generation through this macro.

The changes look fine to me but please repost with your Signed-off-by.

Thanks.

-- 
Catalin

Re: [PATCH v2 1/2] arm64: mm: Rename asid2idx() to ctxid2asid()

[Yunfeng Ye]

On 2021/12/9 2:25, Catalin Marinas wrote:
> On Wed, Dec 08, 2021 at 05:16:45PM +0800, Yunfeng Ye wrote:
>> The commit 0c8ea531b774 ("arm64: mm: Allocate ASIDs in pairs") introduce
>> the asid2idx and idx2asid macro, but these macros are not really useful
>> after the commit f88f42f853a8 ("arm64: context: Free up kernel ASIDs if
>> KPTI is not in use").
>>
>> The code "(asid & ~ASID_MASK)" can be instead by a macro, which is the
>> same code with asid2idx(). So rename it to ctxid2asid() for a better
>> understanding.
>>
>> Also we add asid2ctxid() macro, the contextid can be generated based on
>> the asid and generation through this macro.
> 
> The changes look fine to me but please repost with your Signed-off-by.
> 
Ok, thanks.

> Thanks.
> 

Re: [PATCH v2 2/2] arm64: mm: Use asid feature macro for cheanup

[Yunfeng Ye]

On 2021/12/8 17:35, Kefeng Wang wrote:
> Delete the first blank line and add your SOB,
> 
Ok, thanks.

> For series,
> 
> Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> 
> On 2021/12/8 17:17, Yunfeng Ye wrote:
>> The commit 95b54c3e4c92 ("KVM: arm64: Add feature register flag
>> definitions") introduce the ID_AA64MMFR0_ASID_8 and ID_AA64MMFR0_ASID_16
>> macros.
>>
>> We can use these macros for cheanup in get_cpu_asid_bits().
>>
>> No functional change.
>> ---
>>   arch/arm64/mm/context.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
>> index bbc2708fe928..b8b4cf0bcf39 100644
>> --- a/arch/arm64/mm/context.c
>> +++ b/arch/arm64/mm/context.c
>> @@ -50,10 +50,10 @@ static u32 get_cpu_asid_bits(void)
>>           pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
>>                       smp_processor_id(),  fld);
>>           fallthrough;
>> -    case 0:
>> +    case ID_AA64MMFR0_ASID_8:
>>           asid = 8;
>>           break;
>> -    case 2:
>> +    case ID_AA64MMFR0_ASID_16:
>>           asid = 16;
>>       }
>>
> .
>