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From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Samin Guo <samin.guo@starfivetech.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Jose Abreu <joabreu@synopsys.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org, kernel@collabora.com
Subject: Re: [PATCH v2 05/12] net: stmmac: dwmac-starfive: Add support for JH7100 SoC
Date: Tue, 31 Oct 2023 20:07:22 +0200	[thread overview]
Message-ID: <519fae84-cc40-47ab-8e6b-9967ce046104@collabora.com> (raw)
In-Reply-To: <CAJM55Z8K5QztgU9NYiJ1kv+-BSsgP=LCABN7BYDtQ30_G1Nc7w@mail.gmail.com>

On 10/31/23 16:33, Emil Renner Berthing wrote:
> Cristian Ciocaltea wrote:
>> Add a missing quirk to enable support for the StarFive JH7100 SoC.
>>
>> Additionally, for greater flexibility in operation, allow using the
>> rgmii-rxid and rgmii-txid phy modes.
>>
>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> 
> Hi Cristian,
> 
> Thanks for working on this! This driver has code to update the phy clock for
> different line speeds. I don't think that will work without the
> CLK_SET_RATE_PARENT flag added to the clock in [1] which in turn depends on
> [2].
> 
> [1]: https://github.com/esmil/linux/commit/b200c3054b58a49ba25af67aff82d9045e3c3666
> [2]: https://github.com/esmil/linux/commit/dce189542c16bf0eb8533d96c0305cb59d149dae
> 
> Two more comments below..

Hi Emil,

Thanks for the review!

I've been only testing this at 1000 Mbps and so far it seems to work
fine. I will try with different line speeds and report back.

>> ---
>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  6 ++--
>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 32 ++++++++++++++++---
>>  2 files changed, 31 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> index a2b9e289aa36..c3c2c8360047 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> @@ -165,9 +165,9 @@ config DWMAC_STARFIVE
>>  	help
>>  	  Support for ethernet controllers on StarFive RISC-V SoCs
>>
>> -	  This selects the StarFive platform specific glue layer support for
>> -	  the stmmac device driver. This driver is used for StarFive JH7110
>> -	  ethernet controller.
>> +	  This selects the StarFive platform specific glue layer support
>> +	  for the stmmac device driver. This driver is used for the
>> +	  StarFive JH7100 and JH7110 ethernet controllers.
>>
>>  config DWMAC_STI
>>  	tristate "STi GMAC support"
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> index 5d630affb4d1..88c431edcea0 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> @@ -15,13 +15,20 @@
>>
>>  #include "stmmac_platform.h"
>>
>> -#define STARFIVE_DWMAC_PHY_INFT_RGMII	0x1
>> -#define STARFIVE_DWMAC_PHY_INFT_RMII	0x4
>> -#define STARFIVE_DWMAC_PHY_INFT_FIELD	0x7U
>> +#define STARFIVE_DWMAC_PHY_INFT_RGMII		0x1
>> +#define STARFIVE_DWMAC_PHY_INFT_RMII		0x4
>> +#define STARFIVE_DWMAC_PHY_INFT_FIELD		0x7U
>> +
>> +#define JH7100_SYSMAIN_REGISTER49_DLYCHAIN	0xc8
>> +
>> +struct starfive_dwmac_data {
>> +	unsigned int gtxclk_dlychain;
>> +};
>>
>>  struct starfive_dwmac {
>>  	struct device *dev;
>>  	struct clk *clk_tx;
>> +	const struct starfive_dwmac_data *data;
>>  };
>>
>>  static void starfive_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
>> @@ -67,6 +74,8 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
>>
>>  	case PHY_INTERFACE_MODE_RGMII:
>>  	case PHY_INTERFACE_MODE_RGMII_ID:
>> +	case PHY_INTERFACE_MODE_RGMII_RXID:
>> +	case PHY_INTERFACE_MODE_RGMII_TXID:
>>  		mode = STARFIVE_DWMAC_PHY_INFT_RGMII;
>>  		break;
>>
>> @@ -89,6 +98,14 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
>>  	if (err)
>>  		return dev_err_probe(dwmac->dev, err, "error setting phy mode\n");
>>
>> +	if (dwmac->data) {
> 
> I think you want something like this so future quirks don't need to touch this
> code:
> 
> 	if (dwmac->data && dwmac->data->gtxclk_dlychain)

Yes, but that would prevent having a quirk that explicitly wants to write 0.

I was initially thinking to something more generic, like providing a
list of register-value pairs, but I'm not sure this is going to be ever
needed.

I'm still open to apply the suggested change, though.

>> +		err = regmap_write(regmap, JH7100_SYSMAIN_REGISTER49_DLYCHAIN,
>> +				   dwmac->data->gtxclk_dlychain);
>> +		if (err)
>> +			return dev_err_probe(dwmac->dev, err,
>> +					     "error selecting gtxclk delay chain\n");
>> +	}
>> +
>>  	return 0;
>>  }
>>
>> @@ -114,6 +131,8 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
>>  	if (!dwmac)
>>  		return -ENOMEM;
>>
>> +	dwmac->data = device_get_match_data(&pdev->dev);
>> +
>>  	dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>>  	if (IS_ERR(dwmac->clk_tx))
>>  		return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>> @@ -144,8 +163,13 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
>>  	return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>  }
>>
>> +static const struct starfive_dwmac_data jh7100_data = {
>> +	.gtxclk_dlychain = 4
> 
> Please add a , at the end of this line. I know it's unlikely that we need to
> add more properties, but it's still good practice to do. This way such patches
> won't need to touch this line.

Sure, will do.

>> +};
>> +
>>  static const struct of_device_id starfive_dwmac_match[] = {
>> -	{ .compatible = "starfive,jh7110-dwmac"	},
>> +	{ .compatible = "starfive,jh7100-dwmac", .data = &jh7100_data },
>> +	{ .compatible = "starfive,jh7110-dwmac" },
>>  	{ /* sentinel */ }
>>  };
>>  MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>> --
>> 2.42.0
>>

  reply	other threads:[~2023-10-31 18:07 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-29  4:27 [PATCH v2 00/12] Enable networking support for StarFive JH7100 SoC Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 01/12] dt-bindings: net: snps,dwmac: Allow exclusive usage of ahb reset Cristian Ciocaltea
2023-10-29 11:21   ` Krzysztof Kozlowski
2023-10-29 21:55     ` Cristian Ciocaltea
2023-10-29 22:02       ` Cristian Ciocaltea
2023-10-29 11:25   ` Krzysztof Kozlowski
2023-10-29 22:24     ` Cristian Ciocaltea
2023-10-30  7:26       ` Krzysztof Kozlowski
2023-10-30 19:07         ` Cristian Ciocaltea
2023-10-31  5:48           ` Krzysztof Kozlowski
2023-10-31 11:00             ` Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 02/12] dt-bindings: net: starfive,jh7110-dwmac: Drop superfluous select Cristian Ciocaltea
2023-10-29 11:18   ` Krzysztof Kozlowski
2023-10-29 21:08     ` Cristian Ciocaltea
2023-10-30  7:27       ` Krzysztof Kozlowski
2023-10-30 19:25         ` Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 03/12] dt-bindings: net: starfive,jh7110-dwmac: Drop redundant reset description Cristian Ciocaltea
2023-10-29 11:19   ` Krzysztof Kozlowski
2023-10-29 21:23     ` Cristian Ciocaltea
2023-10-30  7:29       ` Krzysztof Kozlowski
2023-10-30 19:35         ` Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 04/12] dt-bindings: net: starfive,jh7110-dwmac: Add JH7100 SoC compatible Cristian Ciocaltea
2023-10-29 11:24   ` Krzysztof Kozlowski
2023-10-29 22:15     ` Cristian Ciocaltea
2023-10-30  7:30       ` Krzysztof Kozlowski
2023-10-30 20:02         ` Cristian Ciocaltea
2023-10-30  1:37   ` Rob Herring
2023-10-30  7:29     ` Krzysztof Kozlowski
2023-10-29  4:27 ` [PATCH v2 05/12] net: stmmac: dwmac-starfive: Add support for JH7100 SoC Cristian Ciocaltea
2023-10-31 14:33   ` Emil Renner Berthing
2023-10-31 18:07     ` Cristian Ciocaltea [this message]
2023-10-29  4:27 ` [PATCH v2 06/12] riscv: dts: starfive: jh7100: Add dma-noncoherent property Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 07/12] riscv: dts: starfive: jh7100: Add ccache DT node Cristian Ciocaltea
2023-10-31 14:38   ` Emil Renner Berthing
2023-10-31 19:01     ` Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 08/12] riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards Cristian Ciocaltea
2023-10-29 18:35   ` Andrew Lunn
2023-10-31 14:56     ` Emil Renner Berthing
2023-10-31 14:40   ` Emil Renner Berthing
2023-10-31 19:16     ` Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 09/12] riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes Cristian Ciocaltea
2023-11-26 21:15   ` Emil Renner Berthing
2023-11-28  0:46     ` Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 10/12] riscv: dts: starfive: jh7100-common: Setup gmac pinmux Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 11/12] riscv: dts: starfive: visionfive-v1: Enable gmac and setup phy Cristian Ciocaltea
2023-10-29 18:45   ` Andrew Lunn
2023-10-29 22:41     ` Cristian Ciocaltea
2023-10-29 22:50       ` Andrew Lunn
2023-10-29 23:35         ` Cristian Ciocaltea
2023-10-29  4:27 ` [PATCH v2 12/12] [UNTESTED] riscv: dts: starfive: beaglev-starlight: Enable gmac Cristian Ciocaltea
2023-10-29 18:46   ` Andrew Lunn
2023-10-29 22:53     ` Cristian Ciocaltea
2023-11-16 13:15       ` Cristian Ciocaltea
2023-11-16 17:55         ` Conor Dooley
2023-11-16 18:30           ` Cristian Ciocaltea
2023-11-17  8:37           ` Geert Uytterhoeven
2023-11-17  8:49             ` Cristian Ciocaltea
2023-11-17  8:58               ` Cristian Ciocaltea
2023-11-17  9:12                 ` Geert Uytterhoeven
2023-11-17 11:19                   ` Cristian Ciocaltea
2023-11-17 22:48                     ` Cristian Ciocaltea
2023-11-26 21:10   ` Emil Renner Berthing
2023-11-28  0:40     ` Cristian Ciocaltea
2023-11-28 12:08       ` Emil Renner Berthing
2023-11-28 15:47         ` Cristian Ciocaltea
2023-11-28 16:09           ` Emil Renner Berthing
2023-11-28 16:22             ` Cristian Ciocaltea
2023-11-29 14:28               ` Emil Renner Berthing
2023-11-29 14:59                 ` Cristian Ciocaltea
2023-12-15 21:13       ` Cristian Ciocaltea
2023-12-16 19:24         ` Emil Renner Berthing
2023-12-18 11:38           ` Cristian Ciocaltea

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