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From: Paul Cercueil <paul@crapouillou.net>
To: 周琰杰 <zhouyanjie@wanyeetech.com>
Cc: sboyd@kernel.org, mturquette@baylibre.com, robh+dt@kernel.org,
	linux-clk@vger.kernel.org, linux-mips@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com,
	rick.tyliu@ingenic.com, sihui.liu@ingenic.com,
	jun.jiang@ingenic.com, sernia.zhou@foxmail.com
Subject: Re: [PATCH v7 04/11] clk: Ingenic: Fix problem of MAC clock in Ingenic X1000 and X1830.
Date: Thu, 19 Aug 2021 11:39:05 +0200	[thread overview]
Message-ID: <5TY2YQ.FMFB4RRIWORV1@crapouillou.net> (raw)
In-Reply-To: <1627119286-125821-5-git-send-email-zhouyanjie@wanyeetech.com>

Hi Zhou,

Le sam., juil. 24 2021 at 17:34:39 +0800, 周琰杰 (Zhou Yanjie) 
<zhouyanjie@wanyeetech.com> a écrit :
> X1000 and X1830 have two MAC related clocks, one is MACPHY, which is
> controlled by MACCDR register, the other is MAC, which is controlled
> by the MAC bit in the CLKGR register (with CLK_AHB2 as the parent).
> The original driver mistakenly mixed the two clocks together.
> 
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>

Reviewed-by: Paul Cercueil <paul@crapouillou.net>

Cheers,
-Paul

> ---
> 
> Notes:
>     v1->v2:
>     1.Add MACPHY and I2S for X1000, and add MACPHY for X1830.
>     2.Add Paul Cercueil's Reviewed-by and Rob Herring's Acked-by.
> 
>     v2->v3:
>     No change.
> 
>     v3->v4:
>     No change.
> 
>     v4->v5:
>     Add CIM, AIC, DMIC for X1000, and add CIM, AIC, DMIC, I2S for 
> X1830.
> 
>     v5->v6:
>     No change.
> 
>     v6->v7:
>     No change.
> 
>  drivers/clk/ingenic/x1000-cgu.c | 11 ++++++++---
>  drivers/clk/ingenic/x1830-cgu.c | 11 ++++++++---
>  2 files changed, 16 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/clk/ingenic/x1000-cgu.c 
> b/drivers/clk/ingenic/x1000-cgu.c
> index 9aa20b5..53e5fe0 100644
> --- a/drivers/clk/ingenic/x1000-cgu.c
> +++ b/drivers/clk/ingenic/x1000-cgu.c
> @@ -296,12 +296,11 @@ static const struct ingenic_cgu_clk_info 
> x1000_cgu_clocks[] = {
>  		.gate = { CGU_REG_CLKGR, 31 },
>  	},
> 
> -	[X1000_CLK_MAC] = {
> -		"mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
> +	[X1000_CLK_MACPHY] = {
> +		"mac_phy", CGU_CLK_MUX | CGU_CLK_DIV,
>  		.parents = { X1000_CLK_SCLKA, X1000_CLK_MPLL },
>  		.mux = { CGU_REG_MACCDR, 31, 1 },
>  		.div = { CGU_REG_MACCDR, 0, 1, 8, 29, 28, 27 },
> -		.gate = { CGU_REG_CLKGR, 25 },
>  	},
> 
>  	[X1000_CLK_LCD] = {
> @@ -452,6 +451,12 @@ static const struct ingenic_cgu_clk_info 
> x1000_cgu_clocks[] = {
>  		.parents = { X1000_CLK_EXCLK, -1, -1, -1 },
>  		.gate = { CGU_REG_CLKGR, 21 },
>  	},
> +
> +	[X1000_CLK_MAC] = {
> +		"mac", CGU_CLK_GATE,
> +		.parents = { X1000_CLK_AHB2 },
> +		.gate = { CGU_REG_CLKGR, 25 },
> +	},
>  };
> 
>  static void __init x1000_cgu_init(struct device_node *np)
> diff --git a/drivers/clk/ingenic/x1830-cgu.c 
> b/drivers/clk/ingenic/x1830-cgu.c
> index 950aee2..59342bc 100644
> --- a/drivers/clk/ingenic/x1830-cgu.c
> +++ b/drivers/clk/ingenic/x1830-cgu.c
> @@ -270,13 +270,12 @@ static const struct ingenic_cgu_clk_info 
> x1830_cgu_clocks[] = {
>  		.gate = { CGU_REG_CLKGR0, 31 },
>  	},
> 
> -	[X1830_CLK_MAC] = {
> -		"mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
> +	[X1830_CLK_MACPHY] = {
> +		"mac_phy", CGU_CLK_MUX | CGU_CLK_DIV,
>  		.parents = { X1830_CLK_SCLKA, X1830_CLK_MPLL,
>  					 X1830_CLK_VPLL, X1830_CLK_EPLL },
>  		.mux = { CGU_REG_MACCDR, 30, 2 },
>  		.div = { CGU_REG_MACCDR, 0, 1, 8, 29, 28, 27 },
> -		.gate = { CGU_REG_CLKGR1, 4 },
>  	},
> 
>  	[X1830_CLK_LCD] = {
> @@ -428,6 +427,12 @@ static const struct ingenic_cgu_clk_info 
> x1830_cgu_clocks[] = {
>  		.gate = { CGU_REG_CLKGR1, 1 },
>  	},
> 
> +	[X1830_CLK_MAC] = {
> +		"mac", CGU_CLK_GATE,
> +		.parents = { X1830_CLK_AHB2 },
> +		.gate = { CGU_REG_CLKGR1, 4 },
> +	},
> +
>  	[X1830_CLK_OST] = {
>  		"ost", CGU_CLK_GATE,
>  		.parents = { X1830_CLK_EXCLK, -1, -1, -1 },
> --
> 2.7.4
> 



  reply	other threads:[~2021-08-19  9:39 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-24  9:34 [PATCH v7 00/11] Add new clocks and fix bugs for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-07-24  9:34 ` [PATCH v7 01/11] clk: JZ4780: Add function for disable the second core 周琰杰 (Zhou Yanjie)
2021-07-24  9:34 ` [PATCH v7 02/11] clk: Ingenic: Adjust cgu code to make it compatible with I2S PLL 周琰杰 (Zhou Yanjie)
2021-08-19  9:37   ` Paul Cercueil
2021-08-27 17:46     ` Zhou Yanjie
2021-07-24  9:34 ` [PATCH v7 03/11] dt-bindings: clock: Add missing clocks for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-07-24  9:34 ` [PATCH v7 04/11] clk: Ingenic: Fix problem of MAC clock in Ingenic X1000 and X1830 周琰杰 (Zhou Yanjie)
2021-08-19  9:39   ` Paul Cercueil [this message]
2021-07-24  9:34 ` [PATCH v7 05/11] clk: Ingenic: Add missing clocks for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-07-24  9:34 ` [PATCH v7 06/11] clk: Ingenic: Clean up and reformat the code 周琰杰 (Zhou Yanjie)
2021-08-19  9:46   ` Paul Cercueil
2021-08-27 17:47     ` Zhou Yanjie
2021-07-24  9:34 ` [PATCH v7 07/11] dt-bindings: clock: Add documentation for JZ4775 and X2000 bindings 周琰杰 (Zhou Yanjie)
2021-07-24  9:34 ` [PATCH v7 08/11] dt-bindings: clock: Add JZ4775 clock bindings 周琰杰 (Zhou Yanjie)
2021-07-26 22:18   ` Rob Herring
2021-08-19  9:47   ` Paul Cercueil
2021-07-24  9:34 ` [PATCH v7 09/11] dt-bindings: clock: Add X2000 " 周琰杰 (Zhou Yanjie)
2021-07-26 22:19   ` Rob Herring
2021-08-19  9:48   ` Paul Cercueil
2021-07-24  9:34 ` [PATCH v7 10/11] clk: Ingenic: Add CGU driver for JZ4775 周琰杰 (Zhou Yanjie)
2021-07-24  9:34 ` [PATCH v7 11/11] clk: Ingenic: Add CGU driver for X2000 周琰杰 (Zhou Yanjie)
2021-08-19  6:44 ` [PATCH v7 00/11] Add new clocks and fix bugs for Ingenic SoCs Zhou Yanjie

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