[PATCH 0/6] AMD Pstate Fixes And Enhancements

[PATCH 0/6] AMD Pstate Fixes And Enhancements

[Perry Yuan]

The patch series adds some fixes and enhancements to the AMD pstate driver.
It enables CPPC v2 for certain processors in the family 17H, as requested
by TR40 processor users who expect improved performance and lower system
temperature. 

Additionally, it fixes the initialization of nominal_freq for each cpudata
and changes latency and delay values to be read from platform firmware firstly
for more accurate timing. 

A new quirk is also added for legacy processors that lack CPPC capabilities,
which caused the pstate driver to fail loading. 

I would greatly appreciate any feedbacks.

Thank you!


Perry Yuan (6):
  ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors
  cpufreq:amd-pstate: fix the nominal freq value set
  cpufreq:amd-pstate: initialize nominal_freq of each cpudata
  cpufreq:amd-pstate: get pstate transition delay and latency value from
    ACPI tables
  cppc_acpi: print error message if CPPC is unsupported
  cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

 arch/x86/kernel/acpi/cppc.c  |   2 +-
 drivers/acpi/cppc_acpi.c     |   6 +-
 drivers/cpufreq/amd-pstate.c | 112 ++++++++++++++++++++++++++++-------
 include/linux/amd-pstate.h   |   6 ++
 4 files changed, 102 insertions(+), 24 deletions(-)

-- 
2.34.1

[PATCH 1/6] ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors

[Perry Yuan]

As there are some AMD processors which only support CPPC V2 firmware and
BIOS implementation, the amd_pstate driver will be failed to load when
system booting with below kernel warning message:

[    0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled

To make the amd_pstate driver can be loaded on those TR40 processors, it
needs to match x86_model from 0x30 to 0x7F for family 17H.
With the change, the system can load amd_pstate driver as expected.

Reported-by: Gino Badouri <badouri.g@gmail.com>
Issue: https://bugzilla.kernel.org/show_bug.cgi?id=218171
Fixes: fbd74d1689 ("ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory")
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 arch/x86/kernel/acpi/cppc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c
index 8d8752b44f11..ff8f25faca3d 100644
--- a/arch/x86/kernel/acpi/cppc.c
+++ b/arch/x86/kernel/acpi/cppc.c
@@ -20,7 +20,7 @@ bool cpc_supported_by_cpu(void)
 		    (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f)))
 			return true;
 		else if (boot_cpu_data.x86 == 0x17 &&
-			 boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f)
+			 boot_cpu_data.x86_model >= 0x30 && boot_cpu_data.x86_model <= 0x7f)
 			return true;
 		return boot_cpu_has(X86_FEATURE_CPPC);
 	}
-- 
2.34.1

Re: [PATCH 1/6] ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors

[Mario Limonciello]

On 1/31/2024 02:50, Perry Yuan wrote:
> As there are some AMD processors which only support CPPC V2 firmware and
> BIOS implementation, the amd_pstate driver will be failed to load when
> system booting with below kernel warning message:
> 
> [    0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled
> 
> To make the amd_pstate driver can be loaded on those TR40 processors, it
> needs to match x86_model from 0x30 to 0x7F for family 17H.
> With the change, the system can load amd_pstate driver as expected.
> 
> Reported-by: Gino Badouri <badouri.g@gmail.com>
> Issue: https://bugzilla.kernel.org/show_bug.cgi?id=218171
s/Issue/Closes/
> Fixes: fbd74d1689 ("ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory")
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>

One minor change above.

Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>

> ---
>   arch/x86/kernel/acpi/cppc.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c
> index 8d8752b44f11..ff8f25faca3d 100644
> --- a/arch/x86/kernel/acpi/cppc.c
> +++ b/arch/x86/kernel/acpi/cppc.c
> @@ -20,7 +20,7 @@ bool cpc_supported_by_cpu(void)
>   		    (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f)))
>   			return true;
>   		else if (boot_cpu_data.x86 == 0x17 &&
> -			 boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f)
> +			 boot_cpu_data.x86_model >= 0x30 && boot_cpu_data.x86_model <= 0x7f)
>   			return true;
>   		return boot_cpu_has(X86_FEATURE_CPPC);
>   	}

[PATCH 2/6] cpufreq:amd-pstate: fix the nominal freq value set

[Perry Yuan]

Address an untested error where the nominal_freq was returned in KHz
instead of the correct MHz units, this oversight led to a wrong
nominal_freq set and resued, it will cause the max frequency of core to
be initialized with a wrong frequency value.

Cc: stable@vger.kernel.org
Fixes: ec437d71db7 ("cpufreq: amd-pstate: Introduce a new AMD P-State driver to support future processors")
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 2f8656f75a1d..9291a22bd3cc 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -625,8 +625,7 @@ static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
 	if (ret)
 		return ret;
 
-	/* Switch to khz */
-	return cppc_perf.nominal_freq * 1000;
+	return cppc_perf.nominal_freq;
 }
 
 static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
-- 
2.34.1

Re: [PATCH 2/6] cpufreq:amd-pstate: fix the nominal freq value set

[Mario Limonciello]

On 1/31/2024 02:50, Perry Yuan wrote:
> Address an untested error where the nominal_freq was returned in KHz
> instead of the correct MHz units, this oversight led to a wrong
> nominal_freq set and resued, it will cause the max frequency of core to
s/resued/reused/
> be initialized with a wrong frequency value.
> 
> Cc: stable@vger.kernel.org
> Fixes: ec437d71db7 ("cpufreq: amd-pstate: Introduce a new AMD P-State driver to support future processors")
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
One minor change above.

Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   drivers/cpufreq/amd-pstate.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index 2f8656f75a1d..9291a22bd3cc 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -625,8 +625,7 @@ static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
>   	if (ret)
>   		return ret;
>   
> -	/* Switch to khz */
> -	return cppc_perf.nominal_freq * 1000;
> +	return cppc_perf.nominal_freq;
>   }
>   
>   static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)

[PATCH 3/6] cpufreq:amd-pstate: initialize nominal_freq of each cpudata

[Perry Yuan]

Optimizes the process of retrieving the nominal frequency by utilizing
'cpudata->nominal_freq' instead of repeatedly accessing the cppc_acpi interface.

To enhance efficiency and reduce the CPU load, shifted to using
'cpudata->nominal_freq'. It allows for the nominal frequency to be accessed
directly from the cached data in 'cpudata' of each CPU.
It will also slightly reduce the frequency change latency while using pstate
driver passive mode.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 26 ++++++++++++++------------
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 9291a22bd3cc..db7b36afdce2 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -600,7 +600,7 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
 	if (ret)
 		return ret;
 
-	nominal_freq = cppc_perf.nominal_freq;
+	nominal_freq = READ_ONCE(cpudata->nominal_freq);
 	nominal_perf = READ_ONCE(cpudata->nominal_perf);
 	max_perf = READ_ONCE(cpudata->highest_perf);
 
@@ -639,7 +639,7 @@ static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
 	if (ret)
 		return ret;
 
-	nominal_freq = cppc_perf.nominal_freq;
+	nominal_freq = READ_ONCE(cpudata->nominal_freq);
 	nominal_perf = READ_ONCE(cpudata->nominal_perf);
 
 	lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;
@@ -712,13 +712,15 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	amd_pstate_boost_init(cpudata);
 
 	min_freq = amd_get_min_freq(cpudata);
-	max_freq = amd_get_max_freq(cpudata);
 	nominal_freq = amd_get_nominal_freq(cpudata);
+	cpudata->nominal_freq = nominal_freq;
+	max_freq = amd_get_max_freq(cpudata);
 	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);
 
-	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) {
-		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",
-			min_freq, max_freq);
+	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) {
+		dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d)	\
+			value is incorrect\n",	\
+			min_freq, max_freq, nominal_freq);
 		ret = -EINVAL;
 		goto free_cpudata1;
 	}
@@ -755,7 +757,6 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	/* Initial processor data capability frequencies */
 	cpudata->max_freq = max_freq;
 	cpudata->min_freq = min_freq;
-	cpudata->nominal_freq = nominal_freq;
 	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
 	policy->driver_data = cpudata;
@@ -1266,12 +1267,14 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
 	amd_pstate_boost_init(cpudata);
 
 	min_freq = amd_get_min_freq(cpudata);
-	max_freq = amd_get_max_freq(cpudata);
 	nominal_freq = amd_get_nominal_freq(cpudata);
+	cpudata->nominal_freq = nominal_freq;
+	max_freq = amd_get_max_freq(cpudata);
 	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);
-	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) {
-		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",
-				min_freq, max_freq);
+	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) {
+		dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d)	\
+				value is incorrect\n",	\
+				min_freq, max_freq, nominal_freq);
 		ret = -EINVAL;
 		goto free_cpudata1;
 	}
@@ -1284,7 +1287,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
 	/* Initial processor data capability frequencies */
 	cpudata->max_freq = max_freq;
 	cpudata->min_freq = min_freq;
-	cpudata->nominal_freq = nominal_freq;
 	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
 	policy->driver_data = cpudata;
-- 
2.34.1

Re: [PATCH 3/6] cpufreq:amd-pstate: initialize nominal_freq of each cpudata

[Mario Limonciello]

On 1/31/2024 02:50, Perry Yuan wrote:
> Optimizes the process of retrieving the nominal frequency by utilizing
> 'cpudata->nominal_freq' instead of repeatedly accessing the cppc_acpi interface.
> 
> To enhance efficiency and reduce the CPU load, shifted to using
> 'cpudata->nominal_freq'. It allows for the nominal frequency to be accessed
> directly from the cached data in 'cpudata' of each CPU.
> It will also slightly reduce the frequency change latency while using pstate
> driver passive mode.
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   drivers/cpufreq/amd-pstate.c | 26 ++++++++++++++------------
>   1 file changed, 14 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index 9291a22bd3cc..db7b36afdce2 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -600,7 +600,7 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
>   	if (ret)
>   		return ret;
>   
> -	nominal_freq = cppc_perf.nominal_freq;
> +	nominal_freq = READ_ONCE(cpudata->nominal_freq);
>   	nominal_perf = READ_ONCE(cpudata->nominal_perf);
>   	max_perf = READ_ONCE(cpudata->highest_perf);
>   
> @@ -639,7 +639,7 @@ static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
>   	if (ret)
>   		return ret;
>   
> -	nominal_freq = cppc_perf.nominal_freq;
> +	nominal_freq = READ_ONCE(cpudata->nominal_freq);
>   	nominal_perf = READ_ONCE(cpudata->nominal_perf);
>   
>   	lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;
> @@ -712,13 +712,15 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
>   	amd_pstate_boost_init(cpudata);
>   
>   	min_freq = amd_get_min_freq(cpudata);
> -	max_freq = amd_get_max_freq(cpudata);
>   	nominal_freq = amd_get_nominal_freq(cpudata);
> +	cpudata->nominal_freq = nominal_freq;
> +	max_freq = amd_get_max_freq(cpudata);
>   	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);
>   
> -	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) {
> -		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",
> -			min_freq, max_freq);
> +	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) {
> +		dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d)	\
> +			value is incorrect\n",	\
> +			min_freq, max_freq, nominal_freq);
>   		ret = -EINVAL;
>   		goto free_cpudata1;
>   	}
> @@ -755,7 +757,6 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
>   	/* Initial processor data capability frequencies */
>   	cpudata->max_freq = max_freq;
>   	cpudata->min_freq = min_freq;
> -	cpudata->nominal_freq = nominal_freq;
>   	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
>   
>   	policy->driver_data = cpudata;
> @@ -1266,12 +1267,14 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
>   	amd_pstate_boost_init(cpudata);
>   
>   	min_freq = amd_get_min_freq(cpudata);
> -	max_freq = amd_get_max_freq(cpudata);
>   	nominal_freq = amd_get_nominal_freq(cpudata);
> +	cpudata->nominal_freq = nominal_freq;
> +	max_freq = amd_get_max_freq(cpudata);
>   	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);
> -	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) {
> -		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",
> -				min_freq, max_freq);
> +	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) {
> +		dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d)	\
> +				value is incorrect\n",	\
> +				min_freq, max_freq, nominal_freq);
>   		ret = -EINVAL;
>   		goto free_cpudata1;
>   	}
> @@ -1284,7 +1287,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
>   	/* Initial processor data capability frequencies */
>   	cpudata->max_freq = max_freq;
>   	cpudata->min_freq = min_freq;
> -	cpudata->nominal_freq = nominal_freq;
>   	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
>   
>   	policy->driver_data = cpudata;

[PATCH 4/6] cpufreq:amd-pstate: get pstate transition delay and latency value from ACPI tables

[Perry Yuan]

make pstate driver initially retrieve the P-state transition delay and latency
values from the BIOS ACPI tables which has more reasonable delay and latency
values according to the platform design and requirements.

Previously there values were hardcoded at specific value which may
have conflicted with platform and it might not reflect the most accurate or
optimized setting for the processor.

[054h 0084   8]                Preserve Mask : FFFFFFFF00000000
[05Ch 0092   8]                   Write Mask : 0000000000000001
[064h 0100   4]              Command Latency : 00000FA0
[068h 0104   4]          Maximum Access Rate : 0000EA60
[06Ch 0108   2]      Minimum Turnaround Time : 0000

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index db7b36afdce2..eea2e192d748 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -683,6 +683,36 @@ static void amd_perf_ctl_reset(unsigned int cpu)
 	wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);
 }
 
+/**
+ * Get pstate transition delay time from ACPI tables that firmware set
+ * instead of using hardcode value directly.
+ */
+static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
+{
+	u32 transition_delay_ns;
+
+	transition_delay_ns= cppc_get_transition_latency(cpu);
+	if (transition_delay_ns == CPUFREQ_ETERNAL)
+		return AMD_PSTATE_TRANSITION_DELAY;
+
+	return transition_delay_ns / NSEC_PER_USEC;
+}
+
+/**
+ * Get pstate transition latency value from ACPI tables that firmware set
+ * instead of using hardcode value directly.
+ */
+static u32 amd_pstate_get_transition_latency(unsigned int cpu)
+{
+	u32 transition_latency;
+
+	transition_latency = cppc_get_transition_latency(cpu);
+	if (transition_latency  == CPUFREQ_ETERNAL)
+		return AMD_PSTATE_TRANSITION_LATENCY;
+
+	return transition_latency;
+}
+
 static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 {
 	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
@@ -725,8 +755,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 		goto free_cpudata1;
 	}
 
-	policy->cpuinfo.transition_latency = AMD_PSTATE_TRANSITION_LATENCY;
-	policy->transition_delay_us = AMD_PSTATE_TRANSITION_DELAY;
+	policy->cpuinfo.transition_latency = amd_pstate_get_transition_latency(policy->cpu);
+	policy->transition_delay_us = amd_pstate_get_transition_delay_us(policy->cpu);
 
 	policy->min = min_freq;
 	policy->max = max_freq;
-- 
2.34.1

Re: [PATCH 4/6] cpufreq:amd-pstate: get pstate transition delay and latency value from ACPI tables

[Mario Limonciello]

On 1/31/2024 02:50, Perry Yuan wrote:
> make pstate driver initially retrieve the P-state transition delay and latency
> values from the BIOS ACPI tables which has more reasonable delay and latency
> values according to the platform design and requirements.
> 
> Previously there values were hardcoded at specific value which may
> have conflicted with platform and it might not reflect the most accurate or
> optimized setting for the processor.
> 
> [054h 0084   8]                Preserve Mask : FFFFFFFF00000000
> [05Ch 0092   8]                   Write Mask : 0000000000000001
> [064h 0100   4]              Command Latency : 00000FA0
> [068h 0104   4]          Maximum Access Rate : 0000EA60
> [06Ch 0108   2]      Minimum Turnaround Time : 0000
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>

One comment below.

Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++++++++++--
>   1 file changed, 32 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index db7b36afdce2..eea2e192d748 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -683,6 +683,36 @@ static void amd_perf_ctl_reset(unsigned int cpu)
>   	wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);
>   }
>   
> +/**
> + * Get pstate transition delay time from ACPI tables that firmware set
> + * instead of using hardcode value directly.
> + */
> +static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
> +{
> +	u32 transition_delay_ns;
> +
> +	transition_delay_ns= cppc_get_transition_latency(cpu);

space before the =

> +	if (transition_delay_ns == CPUFREQ_ETERNAL)
> +		return AMD_PSTATE_TRANSITION_DELAY;
> +
> +	return transition_delay_ns / NSEC_PER_USEC;
> +}
> +
> +/**
> + * Get pstate transition latency value from ACPI tables that firmware set
> + * instead of using hardcode value directly.
> + */
> +static u32 amd_pstate_get_transition_latency(unsigned int cpu)
> +{
> +	u32 transition_latency;
> +
> +	transition_latency = cppc_get_transition_latency(cpu);
> +	if (transition_latency  == CPUFREQ_ETERNAL)
> +		return AMD_PSTATE_TRANSITION_LATENCY;
> +
> +	return transition_latency;
> +}
> +
>   static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
>   {
>   	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
> @@ -725,8 +755,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
>   		goto free_cpudata1;
>   	}
>   
> -	policy->cpuinfo.transition_latency = AMD_PSTATE_TRANSITION_LATENCY;
> -	policy->transition_delay_us = AMD_PSTATE_TRANSITION_DELAY;
> +	policy->cpuinfo.transition_latency = amd_pstate_get_transition_latency(policy->cpu);
> +	policy->transition_delay_us = amd_pstate_get_transition_delay_us(policy->cpu);
>   
>   	policy->min = min_freq;
>   	policy->max = max_freq;

[PATCH 5/6] cppc_acpi: print error message if CPPC is unsupported

[Perry Yuan]

to be more clear what is wrong with CPPC when pstate driver failed to
load which has dependency on the CPPC capabilities.

Add one more debug message to notify user if CPPC is not supported by
the CPU, then it will be easy to find out what need to fix for pstate
driver loading issue.

[    0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled

Above message is not clear enough to verify whether CPPC is not supported.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 drivers/acpi/cppc_acpi.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index 7ff269a78c20..217c11c12b57 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -676,8 +676,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
 
 	if (!osc_sb_cppc2_support_acked) {
 		pr_debug("CPPC v2 _OSC not acked\n");
-		if (!cpc_supported_by_cpu())
-			return -ENODEV;
+		if (!cpc_supported_by_cpu()) {
+				pr_debug("CPPC is not supported\n");
+				return -ENODEV;
+			}
 	}
 
 	/* Parse the ACPI _CPC table for this CPU. */
-- 
2.34.1

Re: [PATCH 5/6] cppc_acpi: print error message if CPPC is unsupported

[Mario Limonciello]

On 1/31/2024 02:50, Perry Yuan wrote:
> to be more clear what is wrong with CPPC when pstate driver failed to
> load which has dependency on the CPPC capabilities.
> 
> Add one more debug message to notify user if CPPC is not supported by
> the CPU, then it will be easy to find out what need to fix for pstate
> driver loading issue.
> 
> [    0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled
> 
> Above message is not clear enough to verify whether CPPC is not supported.
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> ---
>   drivers/acpi/cppc_acpi.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
> index 7ff269a78c20..217c11c12b57 100644
> --- a/drivers/acpi/cppc_acpi.c
> +++ b/drivers/acpi/cppc_acpi.c
> @@ -676,8 +676,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
>   
>   	if (!osc_sb_cppc2_support_acked) {
>   		pr_debug("CPPC v2 _OSC not acked\n");
> -		if (!cpc_supported_by_cpu())
> -			return -ENODEV;
> +		if (!cpc_supported_by_cpu()) {
> +				pr_debug("CPPC is not supported\n");

I would argue this doesn't add any value to a user.  To help a user it 
should be "CPPC is not supported by the CPU".

> +				return -ENODEV;
> +			}

This whitespace is wrong

>   	}
>   
>   	/* Parse the ACPI _CPC table for this CPU. */

[PATCH 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

[Perry Yuan]

Add quirk table to get CPPC capabilities issue fixed by providing
correct perf or frequency values while driver loading.

If CPPC capabilities are not defined in the ACPI tables or wrongly
defined by platform firmware, it needs to use quick to get those
issues fixed with correct workaround values to make pstate driver
can be loaded even though there are CPPC capabilities errors.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 51 +++++++++++++++++++++++++++++++-----
 include/linux/amd-pstate.h   |  6 +++++
 2 files changed, 51 insertions(+), 6 deletions(-)

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index eea2e192d748..cbc415af0f08 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -64,6 +64,7 @@ static struct cpufreq_driver amd_pstate_driver;
 static struct cpufreq_driver amd_pstate_epp_driver;
 static int cppc_state = AMD_PSTATE_UNDEFINED;
 static bool cppc_enabled;
+static struct quirk_entry *quirks;
 
 /**
  * struct global_params - Global parameters, mostly tunable via sysfs.
@@ -121,6 +122,32 @@ static unsigned int epp_values[] = {
 
 typedef int (*cppc_mode_transition_fn)(int);
 
+static struct quirk_entry quirk_amd_7k62 = {
+	.nominal_freq = 2600,
+	.lowest_freq = 550,
+};
+
+static int __init dmi_matched(const struct dmi_system_id *dmi)
+{
+	quirks = dmi->driver_data;
+
+	return 1;
+}
+
+static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = {
+	{
+		.callback = dmi_matched,
+		.ident = "AMD EPYC 7K62",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_VERSION, "C1"),
+			DMI_MATCH(DMI_PRODUCT_SERIAL, "FX19911000028"),
+		},
+		.driver_data = &quirk_amd_7k62,
+	},
+	{}
+};
+MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table);
+
 static inline int get_mode_idx_from_str(const char *str, size_t size)
 {
 	int i;
@@ -581,13 +608,19 @@ static void amd_pstate_adjust_perf(unsigned int cpu,
 static int amd_get_min_freq(struct amd_cpudata *cpudata)
 {
 	struct cppc_perf_caps cppc_perf;
+	u32 lowest_freq;
 
 	int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
 	if (ret)
 		return ret;
 
+	if (quirks && quirks->lowest_freq)
+		lowest_freq = quirks->lowest_freq;
+	else
+		lowest_freq = cppc_perf.lowest_freq;
+
 	/* Switch to khz */
-	return cppc_perf.lowest_freq * 1000;
+	return lowest_freq * 1000;
 }
 
 static int amd_get_max_freq(struct amd_cpudata *cpudata)
@@ -619,13 +652,14 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
 
 static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
 {
-	struct cppc_perf_caps cppc_perf;
+	u32 nominal_freq;
 
-	int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
-	if (ret)
-		return ret;
+	if (quirks && quirks->nominal_freq)
+		nominal_freq = quirks->nominal_freq;
+	else
+		nominal_freq = READ_ONCE(cpudata->nominal_freq);
 
-	return cppc_perf.nominal_freq;
+	return nominal_freq;
 }
 
 static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
@@ -1623,6 +1657,11 @@ static int __init amd_pstate_init(void)
 	if (cpufreq_get_current_driver())
 		return -EEXIST;
 
+	quirks = NULL;
+
+	/* check if this machine need CPPC quirks */
+	dmi_check_system(amd_pstate_quirks_table);
+
 	switch (cppc_state) {
 	case AMD_PSTATE_UNDEFINED:
 		/* Disable on the following configs by default:
diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h
index 446394f84606..ea80f961607d 100644
--- a/include/linux/amd-pstate.h
+++ b/include/linux/amd-pstate.h
@@ -110,4 +110,10 @@ static const char * const amd_pstate_mode_string[] = {
 	[AMD_PSTATE_GUIDED]      = "guided",
 	NULL,
 };
+
+struct quirk_entry {
+	u32 nominal_freq;
+	u32 lowest_freq;
+};
+
 #endif /* _LINUX_AMD_PSTATE_H */
-- 
2.34.1

Re: [PATCH 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

[Mario Limonciello]

On 1/31/2024 02:50, Perry Yuan wrote:
> Add quirk table to get CPPC capabilities issue fixed by providing
> correct perf or frequency values while driver loading.
> 
> If CPPC capabilities are not defined in the ACPI tables or wrongly
> defined by platform firmware, it needs to use quick to get those

s/quick/quirk/

> issues fixed with correct workaround values to make pstate driver

to allow the pstate driver

> can be loaded even though there are CPPC capabilities errors.
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> ---
>   drivers/cpufreq/amd-pstate.c | 51 +++++++++++++++++++++++++++++++-----
>   include/linux/amd-pstate.h   |  6 +++++
>   2 files changed, 51 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index eea2e192d748..cbc415af0f08 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -64,6 +64,7 @@ static struct cpufreq_driver amd_pstate_driver;
>   static struct cpufreq_driver amd_pstate_epp_driver;
>   static int cppc_state = AMD_PSTATE_UNDEFINED;
>   static bool cppc_enabled;
> +static struct quirk_entry *quirks;
>   
>   /**
>    * struct global_params - Global parameters, mostly tunable via sysfs.
> @@ -121,6 +122,32 @@ static unsigned int epp_values[] = {
>   
>   typedef int (*cppc_mode_transition_fn)(int);
>   
> +static struct quirk_entry quirk_amd_7k62 = {
> +	.nominal_freq = 2600,
> +	.lowest_freq = 550,
> +};
> +
> +static int __init dmi_matched(const struct dmi_system_id *dmi)
> +{
> +	quirks = dmi->driver_data; > +

Under the presumption that the quirk list will grow as more buggy older 
machines are identified, maybe it's worth having a dyndbg or info 
statement here to indicate that it's using quirked values for dmi->ident.

> +	return 1;
> +}
> +
> +static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = {
> +	{
> +		.callback = dmi_matched,
> +		.ident = "AMD EPYC 7K62",
> +		.matches = {
> +			DMI_MATCH(DMI_PRODUCT_VERSION, "C1"),
> +			DMI_MATCH(DMI_PRODUCT_SERIAL, "FX19911000028"),

This is way too specific isn't it?  It would only load on that single 
system I would expect.  But I think you want to have an entry that 
matches the DMI_PRODUCT_NAME or DMI_FAMILY_NAME instead most likely.

> +		},
> +		.driver_data = &quirk_amd_7k62,
> +	},
> +	{}
> +};
> +MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table);
> +
>   static inline int get_mode_idx_from_str(const char *str, size_t size)
>   {
>   	int i;
> @@ -581,13 +608,19 @@ static void amd_pstate_adjust_perf(unsigned int cpu,
>   static int amd_get_min_freq(struct amd_cpudata *cpudata)
>   {
>   	struct cppc_perf_caps cppc_perf;
> +	u32 lowest_freq;
>   
>   	int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
>   	if (ret)
>   		return ret;
>   
> +	if (quirks && quirks->lowest_freq)
> +		lowest_freq = quirks->lowest_freq;
> +	else
> +		lowest_freq = cppc_perf.lowest_freq;
> +
>   	/* Switch to khz */
> -	return cppc_perf.lowest_freq * 1000;
> +	return lowest_freq * 1000;
>   }
>   
>   static int amd_get_max_freq(struct amd_cpudata *cpudata)
> @@ -619,13 +652,14 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
>   
>   static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
>   {
> -	struct cppc_perf_caps cppc_perf;
> +	u32 nominal_freq;
>   
> -	int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
> -	if (ret)
> -		return ret;

I think this hunk should be earlier in your series.  Conceptually it 
seems to match what patch 3 does to me.

> +	if (quirks && quirks->nominal_freq)
> +		nominal_freq = quirks->nominal_freq;
> +	else
> +		nominal_freq = READ_ONCE(cpudata->nominal_freq);
>   
> -	return cppc_perf.nominal_freq;
> +	return nominal_freq;
>   }
>   
>   static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
> @@ -1623,6 +1657,11 @@ static int __init amd_pstate_init(void)
>   	if (cpufreq_get_current_driver())
>   		return -EEXIST;
>   
> +	quirks = NULL;
> +
> +	/* check if this machine need CPPC quirks */
> +	dmi_check_system(amd_pstate_quirks_table);
> +
>   	switch (cppc_state) {
>   	case AMD_PSTATE_UNDEFINED:
>   		/* Disable on the following configs by default:
> diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h
> index 446394f84606..ea80f961607d 100644
> --- a/include/linux/amd-pstate.h
> +++ b/include/linux/amd-pstate.h
> @@ -110,4 +110,10 @@ static const char * const amd_pstate_mode_string[] = {
>   	[AMD_PSTATE_GUIDED]      = "guided",
>   	NULL,
>   };
> +
> +struct quirk_entry {
> +	u32 nominal_freq;
> +	u32 lowest_freq;
> +};
> +
>   #endif /* _LINUX_AMD_PSTATE_H */

RE: [PATCH 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

[Yuan, Perry]

[AMD Official Use Only - General]

Hi Mario,

> -----Original Message-----
> From: Limonciello, Mario <Mario.Limonciello@amd.com>
> Sent: Thursday, February 1, 2024 6:00 AM
> To: Yuan, Perry <Perry.Yuan@amd.com>; rafael.j.wysocki@intel.com;
> viresh.kumar@linaro.org; Huang, Ray <Ray.Huang@amd.com>; Shenoy,
> Gautham Ranjal <gautham.shenoy@amd.com>; Petkov, Borislav
> <Borislav.Petkov@amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Shimmer
> <Shimmer.Huang@amd.com>; Du, Xiaojian <Xiaojian.Du@amd.com>; Meng,
> Li (Jassmine) <Li.Meng@amd.com>; linux-pm@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC
> capabilities missing
>
> On 1/31/2024 02:50, Perry Yuan wrote:
> > Add quirk table to get CPPC capabilities issue fixed by providing
> > correct perf or frequency values while driver loading.
> >
> > If CPPC capabilities are not defined in the ACPI tables or wrongly
> > defined by platform firmware, it needs to use quick to get those
>
> s/quick/quirk/
>
> > issues fixed with correct workaround values to make pstate driver
>
> to allow the pstate driver
>
> > can be loaded even though there are CPPC capabilities errors.
> >
> > Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> > ---
> >   drivers/cpufreq/amd-pstate.c | 51
> +++++++++++++++++++++++++++++++-----
> >   include/linux/amd-pstate.h   |  6 +++++
> >   2 files changed, 51 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/cpufreq/amd-pstate.c
> > b/drivers/cpufreq/amd-pstate.c index eea2e192d748..cbc415af0f08
> 100644
> > --- a/drivers/cpufreq/amd-pstate.c
> > +++ b/drivers/cpufreq/amd-pstate.c
> > @@ -64,6 +64,7 @@ static struct cpufreq_driver amd_pstate_driver;
> >   static struct cpufreq_driver amd_pstate_epp_driver;
> >   static int cppc_state = AMD_PSTATE_UNDEFINED;
> >   static bool cppc_enabled;
> > +static struct quirk_entry *quirks;
> >
> >   /**
> >    * struct global_params - Global parameters, mostly tunable via sysfs.
> > @@ -121,6 +122,32 @@ static unsigned int epp_values[] = {
> >
> >   typedef int (*cppc_mode_transition_fn)(int);
> >
> > +static struct quirk_entry quirk_amd_7k62 = {
> > +   .nominal_freq = 2600,
> > +   .lowest_freq = 550,
> > +};
> > +
> > +static int __init dmi_matched(const struct dmi_system_id *dmi) {
> > +   quirks = dmi->driver_data; > +
>
> Under the presumption that the quirk list will grow as more buggy older
> machines are identified, maybe it's worth having a dyndbg or info statement
> here to indicate that it's using quirked values for dmi->ident.

Added a debug line in V2.

>
> > +   return 1;
> > +}
> > +
> > +static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = {
> > +   {
> > +           .callback = dmi_matched,
> > +           .ident = "AMD EPYC 7K62",
> > +           .matches = {
> > +                   DMI_MATCH(DMI_PRODUCT_VERSION, "C1"),
> > +                   DMI_MATCH(DMI_PRODUCT_SERIAL,
> "FX19911000028"),
>
> This is way too specific isn't it?  It would only load on that single system I
> would expect.  But I think you want to have an entry that matches the
> DMI_PRODUCT_NAME or DMI_FAMILY_NAME instead most likely.

Yes,  nominally we use DMI_PRODUCT_NAME or DMI_FAMILY_NAME,
Current quirk for 7K62 is special added for a AMD customer I did not get permission to exposure the product information.
It is used by a specific system which has broken BIOS, there are lots of server nodes that cannot upgrade BIOS.
So we match the system with version and serial number for the special fix.

If users have other products for quirks fix, we still can use  DMI_PRODUCT_NAME or DMI_FAMILY_NAME in the next matches.

Perry.

>
> > +           },
> > +           .driver_data = &quirk_amd_7k62,
> > +   },
> > +   {}
> > +};
> > +MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table);
> > +
> >   static inline int get_mode_idx_from_str(const char *str, size_t size)
> >   {
> >     int i;
> > @@ -581,13 +608,19 @@ static void amd_pstate_adjust_perf(unsigned int
> cpu,
> >   static int amd_get_min_freq(struct amd_cpudata *cpudata)
> >   {
> >     struct cppc_perf_caps cppc_perf;
> > +   u32 lowest_freq;
> >
> >     int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
> >     if (ret)
> >             return ret;
> >
> > +   if (quirks && quirks->lowest_freq)
> > +           lowest_freq = quirks->lowest_freq;
> > +   else
> > +           lowest_freq = cppc_perf.lowest_freq;
> > +
> >     /* Switch to khz */
> > -   return cppc_perf.lowest_freq * 1000;
> > +   return lowest_freq * 1000;
> >   }
> >
> >   static int amd_get_max_freq(struct amd_cpudata *cpudata) @@ -619,13
> > +652,14 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
> >
> >   static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
> >   {
> > -   struct cppc_perf_caps cppc_perf;
> > +   u32 nominal_freq;
> >
> > -   int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
> > -   if (ret)
> > -           return ret;
>
> I think this hunk should be earlier in your series.  Conceptually it seems to
> match what patch 3 does to me.

It is a mistake that remove the code here.
I have fixed it in the V2 and tested the patches work as expected.


>
> > +   if (quirks && quirks->nominal_freq)
> > +           nominal_freq = quirks->nominal_freq;
> > +   else
> > +           nominal_freq = READ_ONCE(cpudata->nominal_freq);
> >
> > -   return cppc_perf.nominal_freq;
> > +   return nominal_freq;
> >   }
> >
> >   static int amd_get_lowest_nonlinear_freq(struct amd_cpudata
> > *cpudata) @@ -1623,6 +1657,11 @@ static int __init amd_pstate_init(void)
> >     if (cpufreq_get_current_driver())
> >             return -EEXIST;
> >
> > +   quirks = NULL;
> > +
> > +   /* check if this machine need CPPC quirks */
> > +   dmi_check_system(amd_pstate_quirks_table);
> > +
> >     switch (cppc_state) {
> >     case AMD_PSTATE_UNDEFINED:
> >             /* Disable on the following configs by default:
> > diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h
> > index 446394f84606..ea80f961607d 100644
> > --- a/include/linux/amd-pstate.h
> > +++ b/include/linux/amd-pstate.h
> > @@ -110,4 +110,10 @@ static const char * const
> amd_pstate_mode_string[] = {
> >     [AMD_PSTATE_GUIDED]      = "guided",
> >     NULL,
> >   };
> > +
> > +struct quirk_entry {
> > +   u32 nominal_freq;
> > +   u32 lowest_freq;
> > +};
> > +
> >   #endif /* _LINUX_AMD_PSTATE_H */

Re: [PATCH 0/6] AMD Pstate Fixes And Enhancements

[Tor Vic]

On 1/31/24 09:50, Perry Yuan wrote:
> The patch series adds some fixes and enhancements to the AMD pstate driver.
> It enables CPPC v2 for certain processors in the family 17H, as requested
> by TR40 processor users who expect improved performance and lower system
> temperature.
> 
> Additionally, it fixes the initialization of nominal_freq for each cpudata
> and changes latency and delay values to be read from platform firmware firstly
> for more accurate timing.
> 
> A new quirk is also added for legacy processors that lack CPPC capabilities,
> which caused the pstate driver to fail loading.
> 
> I would greatly appreciate any feedbacks.
> 

Hi Perry,

Which tree or patchset is this based on?
It doesn't apply cleanly onto either 6.7 or 6.8.

First I had to revert [1], then apply [2] before applying this patchset 
and finally reapply [1].
I did not apply the "prefcore" patchset which I keep in a separate branch.

Is this correct or did I mess up something with my branches?

---
[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v6.8-rc2&id=febab20caebac959fdc3d7520bc52de8b1184455

[2] 
https://lore.kernel.org/linux-pm/cover.1706255676.git.perry.yuan@amd.com/

Cheers,
Tor Vic

> Thank you!
> 
> 
> Perry Yuan (6):
>    ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors
>    cpufreq:amd-pstate: fix the nominal freq value set
>    cpufreq:amd-pstate: initialize nominal_freq of each cpudata
>    cpufreq:amd-pstate: get pstate transition delay and latency value from
>      ACPI tables
>    cppc_acpi: print error message if CPPC is unsupported
>    cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing
> 
>   arch/x86/kernel/acpi/cppc.c  |   2 +-
>   drivers/acpi/cppc_acpi.c     |   6 +-
>   drivers/cpufreq/amd-pstate.c | 112 ++++++++++++++++++++++++++++-------
>   include/linux/amd-pstate.h   |   6 ++
>   4 files changed, 102 insertions(+), 24 deletions(-)
> 

RE: [PATCH 0/6] AMD Pstate Fixes And Enhancements

[Yuan, Perry]

[AMD Official Use Only - General]

Hi Vic

> -----Original Message-----
> From: Tor Vic <torvic9@mailbox.org>
> Sent: Wednesday, January 31, 2024 7:37 PM
> To: Yuan, Perry <Perry.Yuan@amd.com>; rafael.j.wysocki@intel.com; Limonciello,
> Mario <Mario.Limonciello@amd.com>; viresh.kumar@linaro.org; Huang, Ray
> <Ray.Huang@amd.com>; Shenoy, Gautham Ranjal
> <gautham.shenoy@amd.com>; Petkov, Borislav <Borislav.Petkov@amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Shimmer
> <Shimmer.Huang@amd.com>; Du, Xiaojian <Xiaojian.Du@amd.com>; Meng, Li
> (Jassmine) <Li.Meng@amd.com>; linux-pm@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH 0/6] AMD Pstate Fixes And Enhancements
>
>
>
> On 1/31/24 09:50, Perry Yuan wrote:
> > The patch series adds some fixes and enhancements to the AMD pstate driver.
> > It enables CPPC v2 for certain processors in the family 17H, as
> > requested by TR40 processor users who expect improved performance and
> > lower system temperature.
> >
> > Additionally, it fixes the initialization of nominal_freq for each
> > cpudata and changes latency and delay values to be read from platform
> > firmware firstly for more accurate timing.
> >
> > A new quirk is also added for legacy processors that lack CPPC
> > capabilities, which caused the pstate driver to fail loading.
> >
> > I would greatly appreciate any feedbacks.
> >
>
> Hi Perry,
>
> Which tree or patchset is this based on?
> It doesn't apply cleanly onto either 6.7 or 6.8.
>
> First I had to revert [1], then apply [2] before applying this patchset and finally
> reapply [1].
> I did not apply the "prefcore" patchset which I keep in a separate branch.
>
> Is this correct or did I mess up something with my branches?


Hi Tor,

I have rebased the series to Linux-pm 6.8 rc2, you can pull the Linux-pm/bleeding-edge and apply the patches on top of that.
The part 1 prefer core patches are already merged into Linux-pm tree, so you can just merge this series
Here is the V2 https://lore.kernel.org/lkml/cover.1706863981.git.perry.yuan@amd.com/


git clone https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
git checkout bleeding-edge

Perry.

>
> ---
> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v6.
> 8-rc2&id=febab20caebac959fdc3d7520bc52de8b1184455
>
> [2]
> https://lore.kernel.org/linux-pm/cover.1706255676.git.perry.yuan@amd.com/
>
> Cheers,
> Tor Vic
>
> > Thank you!
> >
> >
> > Perry Yuan (6):
> >    ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors
> >    cpufreq:amd-pstate: fix the nominal freq value set
> >    cpufreq:amd-pstate: initialize nominal_freq of each cpudata
> >    cpufreq:amd-pstate: get pstate transition delay and latency value from
> >      ACPI tables
> >    cppc_acpi: print error message if CPPC is unsupported
> >    cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities
> > missing
> >
> >   arch/x86/kernel/acpi/cppc.c  |   2 +-
> >   drivers/acpi/cppc_acpi.c     |   6 +-
> >   drivers/cpufreq/amd-pstate.c | 112 ++++++++++++++++++++++++++++-------
> >   include/linux/amd-pstate.h   |   6 ++
> >   4 files changed, 102 insertions(+), 24 deletions(-)
> >