From: Bean Huo <huobean@gmail.com>
To: Can Guo <quic_cang@quicinc.com>,
bvanassche@acm.org, stanley.chu@mediatek.com,
adrian.hunter@intel.com, alim.akhtar@samsung.com,
avri.altman@wdc.com, beanhuo@micron.com,
quic_asutoshd@quicinc.com, quic_nguyenb@quicinc.com,
quic_ziqichen@quicinc.com, linux-scsi@vger.kernel.org,
kernel-team@android.com
Cc: "James E.J. Bottomley" <jejb@linux.ibm.com>,
"Martin K. Petersen" <martin.petersen@oracle.com>,
Daejun Park <daejun7.park@samsung.com>,
Jinyoung Choi <j-young.choi@samsung.com>,
Kiwoong Kim <kwmad.kim@samsung.com>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/2] scsi: ufs: Add Multi-Circular Queue support
Date: Sun, 24 Jul 2022 23:54:51 +0200 [thread overview]
Message-ID: <9f4c233f8f6f9288b17859efab0cb22df2452777.camel@gmail.com> (raw)
In-Reply-To: <1658214120-22772-2-git-send-email-quic_cang@quicinc.com>
Hi Can/Asutosh
A few questions about MCQ configuration:
On Tue, 2022-07-19 at 00:01 -0700, Can Guo wrote:
> From: Asutosh Das <quic_asutoshd@quicinc.com>
>
> Adds MCQ support to UFS driver.
>
> Co-developed-by: Can Guo <quic_cang@quicinc.com>
> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
> Signed-off-by: Can Guo <quic_cang@quicinc.com>
> ---
>
> +void ufshcd_mcq_config_mac(struct ufs_hba *hba)
> +{
> + u32 val = ufshcd_readl(hba, REG_UFS_MCQ_CFG);
> +
> + val &= ~MCQ_CFG_MAC_MASK;
> + val |= hba->dev_info.bqueuedepth << MCQ_CFG_MAC_OFFSET;
> + ufshcd_writel(hba, val, REG_UFS_MCQ_CFG);
Here you set MaxActiveCommand to dev_info.bqueuedepth (this limit comes
from UFS devices). I see in the qsize configuration that you want to
set the queue depth in each HW queue to be hba->nutrs (this limit comes
from UFSHCI), should not it be min(device limit, ufshci limit)?
> +}
> +EXPORT_SYMBOL_GPL(ufshcd_mcq_config_mac);
> +
>
...
> +
> + for_each_hw_queue(hba, i) {
> + hwq = &hba->uhq[i];
> + hwq->id = i;
> + qsize = hwq->max_entries * MCQ_ENTRY_SIZE_IN_DWORD -
> 1;
qsize is hba->nutrs, 32*8-1 = 255 =256DW, per draft spec , should not
be 8DW in 4.0?
> +
> + /* SQLBA */
> + ufsmcq_writel(hba, lower_32_bits(hwq->sqe_dma_addr),
> + MCQ_CFG_n(REG_SQLBA, i));
> + /* SQUBA */
> + ufsmcq_writel(hba, upper_32_bits(hwq->sqe_dma_addr),
> + MCQ_CFG_n(REG_SQUBA, i));
> + /* SQDAO */
> + ufsmcq_writel(hba, MCQ_ROP_OFFSET_n(ROP_SQD, i),
> + MCQ_CFG_n(REG_SQDAO, i));
>
...
> }
> +
> +out:
> + hba->mcq_base = res->base;
> + return 0;
> +
> +out_err:
> + ufshcd_mcq_release_resource(hba);
> + return ret;
> +}
> +
> +int ufshcd_mcq_init(struct ufs_hba *hba)
> +{
> + struct Scsi_Host *host = hba->host;
> + struct ufs_hw_queue *hwq;
> + int i, ret = 0;
> +
> + if (!is_mcq_supported(hba))
> + return 0;
> +
> + ret = ufshcd_mcq_config_resource(hba);
> + if (ret) {
> + dev_err(hba->dev, "Failed to config MCQ resource\n");
> + return ret;
> + }
> +
> + ret = ufshcd_vops_config_mcq_rop(hba);
> + if (ret) {
> + dev_err(hba->dev, "MCQ Runtime Operation Pointers not
> configured\n");
> + goto out_err;
> + }
> +
> + hba->nr_queues[HCTX_TYPE_DEFAULT] = num_possible_cpus();
4.0 supports maximum number of queues is 32. for cpus < 32, cpu to
queue will be 1x1, how about cpus > 32?
> + hba->nr_queues[HCTX_TYPE_READ] = 0;
> + hba->nr_queues[HCTX_TYPE_POLL] = 1;
> +
> + for (i = 0; i < HCTX_MAX_TYPES; i++)
> + host->nr_hw_queues += hba->nr_queues[i];
> +
> + host->can_queue = hba->nutrs;
Also here, can_queue is inlined with ufshci limitation, not the UFS
device limit.
> + host->cmd_per_lun = hba->nutrs;
> +
> + /* One more reserved for dev_cmd_queue */
> + hba->nr_hw_queues = host->nr_hw_queues + 1;
> +
> + hba->uhq = devm_kmalloc(hba->dev,
...
>
> ufshcd_tune_unipro_params(hba);
> @@ -9641,6 +9775,10 @@ int ufshcd_init(struct ufs_hba *hba, void
> __iomem *mmio_base, unsigned int irq)
> goto out_disable;
> }
>
> + err = ufshcd_mcq_init(hba);
The driver will force the customer to use MCQ, how about adding a
configuration option for the customer to choose (like eMMC CMDQ does)?
Kind regards,
Bean
next prev parent reply other threads:[~2022-07-24 21:54 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1658214120-22772-1-git-send-email-quic_cang@quicinc.com>
2022-07-19 7:01 ` [PATCH 1/2] scsi: ufs: Add Multi-Circular Queue support Can Guo
2022-07-19 23:01 ` Bart Van Assche
2022-07-19 23:07 ` Bart Van Assche
2022-07-20 17:34 ` Asutosh Das (asd)
2022-07-20 7:57 ` kernel test robot
2022-07-20 11:41 ` kernel test robot
2022-07-20 16:36 ` kernel test robot
2022-07-22 7:31 ` Avri Altman
2022-07-22 17:35 ` Asutosh Das (asd)
2022-07-22 19:37 ` Avri Altman
2022-07-22 20:14 ` Asutosh Das (asd)
2022-07-22 20:22 ` Avri Altman
2022-07-22 21:05 ` Asutosh Das (asd)
2022-07-22 17:58 ` Bart Van Assche
2022-07-26 6:48 ` Can Guo
2022-07-22 14:42 ` Avri Altman
2022-07-23 14:59 ` Avri Altman
2022-07-26 2:55 ` Can Guo
2022-07-23 15:26 ` Avri Altman
2022-07-24 3:14 ` Bart Van Assche
2022-07-25 16:24 ` Asutosh Das (asd)
2022-07-23 20:22 ` Avri Altman
2022-07-25 16:26 ` Asutosh Das (asd)
2022-07-25 19:50 ` Avri Altman
2022-07-25 20:24 ` Asutosh Das (asd)
2022-07-23 21:23 ` Avri Altman
2022-07-24 3:15 ` Bart Van Assche
2022-07-25 16:35 ` Asutosh Das (asd)
2022-07-26 22:47 ` Bart Van Assche
2022-07-24 4:07 ` Avri Altman
2022-07-25 16:38 ` Asutosh Das (asd)
2022-07-26 6:35 ` Can Guo
2022-07-26 9:46 ` Avri Altman
2022-07-24 4:32 ` Avri Altman
2022-07-26 6:21 ` Can Guo
2022-07-24 7:21 ` Avri Altman
2022-07-24 21:54 ` Bean Huo [this message]
2022-07-25 17:35 ` Asutosh Das (asd)
2022-07-25 9:16 ` Dan Carpenter
2022-07-28 19:10 ` John Garry
2022-07-28 19:15 ` Asutosh Das (asd)
2022-07-28 20:29 ` Bart Van Assche
2022-07-28 21:07 ` Asutosh Das (asd)
2022-07-29 16:43 ` Asutosh Das (asd)
2022-07-29 18:59 ` Bart Van Assche
2022-07-28 19:38 ` Bart Van Assche
2022-07-28 20:00 ` Asutosh Das (asd)
2022-07-19 7:01 ` [PATCH 2/2] scsi: ufs-qcom: Implement three CMQ related vops Can Guo
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