From: "Li, Xin3" <xin3.li@intel.com>
To: David Laight <David.Laight@ACULAB.COM>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>
Cc: "tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"bp@alien8.de" <bp@alien8.de>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"peterz@infradead.org" <peterz@infradead.org>,
"brgerst@gmail.com" <brgerst@gmail.com>,
"Bae, Chang Seok" <chang.seok.bae@intel.com>
Subject: RE: [PATCH v3 3/6] x86/gsseg: make asm_load_gs_index() take an u16
Date: Sat, 15 Oct 2022 00:13:47 +0000 [thread overview]
Message-ID: <BN6PR1101MB216120D24ECD8A5C7DB9C64BA8279@BN6PR1101MB2161.namprd11.prod.outlook.com> (raw)
In-Reply-To: <86f60a8edf0e458c86cd84970364cfa2@AcuMS.aculab.com>
> >
> > From: "H. Peter Anvin (Intel)" <hpa@zytor.com>
> >
> > Let gcc know that only the low 16 bits of load_gs_index() argument
> > actually matter. It might allow it to create slightly better code.
> > However, do not propagate this into the prototypes of functions that
> > end up being paravirtualized, to avoid unnecessary changes.
>
> Using u16 will almost always make the code worse.
> At some point the value has to be masked and/or extended to ensure an out of
> range value doesn't appear in a register.
Any potential issue with this patch set?
>
> David
>
> -
> Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1
> 1PT, UK Registration No: 1397386 (Wales)
next prev parent reply other threads:[~2022-10-15 0:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-13 20:01 [PATCH v3 0/6] Enable LKGS instruction Xin Li
2022-10-13 20:01 ` [PATCH v3 1/6] x86/cpufeature: add cpu feature bit for LKGS Xin Li
2022-10-13 20:01 ` [PATCH v3 2/6] x86/opcode: add LKGS instruction to x86-opcode-map Xin Li
2022-10-13 20:01 ` [PATCH v3 3/6] x86/gsseg: make asm_load_gs_index() take an u16 Xin Li
2022-10-14 12:28 ` David Laight
2022-10-15 0:13 ` Li, Xin3 [this message]
2022-10-15 2:41 ` H. Peter Anvin
2022-10-17 7:49 ` David Laight
2022-10-17 18:39 ` H. Peter Anvin
2022-10-13 20:01 ` [PATCH v3 4/6] x86/gsseg: move local_irq_save/restore() into asm_load_gs_index() Xin Li
2022-10-15 8:51 ` Thomas Gleixner
2022-10-18 17:25 ` Li, Xin3
2022-10-18 18:13 ` H. Peter Anvin
2022-10-18 21:29 ` Li, Xin3
2022-10-13 20:01 ` [PATCH v3 5/6] x86/gsseg: move load_gs_index() to its own header file Xin Li
2022-10-13 20:01 ` [PATCH v3 6/6] x86/gsseg: use the LKGS instruction if available for load_gs_index() Xin Li
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=BN6PR1101MB216120D24ECD8A5C7DB9C64BA8279@BN6PR1101MB2161.namprd11.prod.outlook.com \
--to=xin3.li@intel.com \
--cc=David.Laight@ACULAB.COM \
--cc=bp@alien8.de \
--cc=brgerst@gmail.com \
--cc=chang.seok.bae@intel.com \
--cc=dave.hansen@linux.intel.com \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).