[PATCH v2 0/3] iommu/t-d: Use SL for GPA->HPA translation

[PATCH v2 0/3] iommu/t-d: Use SL for GPA->HPA translation

[Lu Baolu]

v1:
https://lore.kernel.org/linux-iommu/20210924022931.780963-1-baolu.lu@linux.intel.com/

Change log:
v1->v2:
 - Split the cleanup into a separated patch
 - Add a patch to check sanity of capabilities
 - Consider capabilities when determining FL or SL

Best regards,
Baolu

Lu Baolu (3):
  iommu/vt-d: Remove duplicate identity domain flag
  iommu/vt-d: Check FL and SL capability sanity in scalable mode
  iommu/vt-d: Use second level for GPA->HPA translation

 include/linux/intel-iommu.h     |  3 ---
 drivers/iommu/intel/cap_audit.h |  1 +
 drivers/iommu/intel/cap_audit.c | 13 +++++++++++++
 drivers/iommu/intel/iommu.c     | 21 +++++++++++++--------
 4 files changed, 27 insertions(+), 11 deletions(-)

-- 
2.25.1

[PATCH v2 1/3] iommu/vt-d: Remove duplicate identity domain flag

[Lu Baolu]

The iommu_domain data structure already has the "type" field to keep the
type of a domain. It's unnecessary to have the DOMAIN_FLAG_STATIC_IDENTITY
flag in the vt-d implementation. This cleans it up with no functionality
change.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
 include/linux/intel-iommu.h | 3 ---
 drivers/iommu/intel/iommu.c | 9 ++++-----
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 4bff70c26416..c24bdf5a9285 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -517,9 +517,6 @@ struct context_entry {
 	u64 hi;
 };
 
-/* si_domain contains mulitple devices */
-#define DOMAIN_FLAG_STATIC_IDENTITY		BIT(0)
-
 /*
  * When VT-d works in the scalable mode, it allows DMA translation to
  * happen through either first level or second level page table. This
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index b0076f54f5f4..dc2030d014e0 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -528,7 +528,7 @@ static inline void free_devinfo_mem(void *vaddr)
 
 static inline int domain_type_is_si(struct dmar_domain *domain)
 {
-	return domain->flags & DOMAIN_FLAG_STATIC_IDENTITY;
+	return domain->domain.type == IOMMU_DOMAIN_IDENTITY;
 }
 
 static inline bool domain_use_first_level(struct dmar_domain *domain)
@@ -1996,7 +1996,7 @@ static bool first_level_by_default(void)
 	return scalable_mode_support() && intel_cap_flts_sanity();
 }
 
-static struct dmar_domain *alloc_domain(int flags)
+static struct dmar_domain *alloc_domain(unsigned int type)
 {
 	struct dmar_domain *domain;
 
@@ -2006,7 +2006,6 @@ static struct dmar_domain *alloc_domain(int flags)
 
 	memset(domain, 0, sizeof(*domain));
 	domain->nid = NUMA_NO_NODE;
-	domain->flags = flags;
 	if (first_level_by_default())
 		domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL;
 	domain->has_iotlb_device = false;
@@ -2830,7 +2829,7 @@ static int __init si_domain_init(int hw)
 	struct device *dev;
 	int i, nid, ret;
 
-	si_domain = alloc_domain(DOMAIN_FLAG_STATIC_IDENTITY);
+	si_domain = alloc_domain(IOMMU_DOMAIN_IDENTITY);
 	if (!si_domain)
 		return -EFAULT;
 
@@ -4639,7 +4638,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type)
 	case IOMMU_DOMAIN_DMA:
 	case IOMMU_DOMAIN_DMA_FQ:
 	case IOMMU_DOMAIN_UNMANAGED:
-		dmar_domain = alloc_domain(0);
+		dmar_domain = alloc_domain(type);
 		if (!dmar_domain) {
 			pr_err("Can't allocate dmar_domain\n");
 			return NULL;
-- 
2.25.1

RE: [PATCH v2 1/3] iommu/vt-d: Remove duplicate identity domain flag

[Tian, Kevin]

> From: Lu Baolu <baolu.lu@linux.intel.com>
> Sent: Sunday, September 26, 2021 7:46 PM
> 
> The iommu_domain data structure already has the "type" field to keep the
> type of a domain. It's unnecessary to have the
> DOMAIN_FLAG_STATIC_IDENTITY
> flag in the vt-d implementation. This cleans it up with no functionality
> change.
> 
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>

Reviewed-by: Kevin Tian <kevin.tian@intel.com>

> ---
>  include/linux/intel-iommu.h | 3 ---
>  drivers/iommu/intel/iommu.c | 9 ++++-----
>  2 files changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
> index 4bff70c26416..c24bdf5a9285 100644
> --- a/include/linux/intel-iommu.h
> +++ b/include/linux/intel-iommu.h
> @@ -517,9 +517,6 @@ struct context_entry {
>  	u64 hi;
>  };
> 
> -/* si_domain contains mulitple devices */
> -#define DOMAIN_FLAG_STATIC_IDENTITY		BIT(0)
> -
>  /*
>   * When VT-d works in the scalable mode, it allows DMA translation to
>   * happen through either first level or second level page table. This
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index b0076f54f5f4..dc2030d014e0 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -528,7 +528,7 @@ static inline void free_devinfo_mem(void *vaddr)
> 
>  static inline int domain_type_is_si(struct dmar_domain *domain)
>  {
> -	return domain->flags & DOMAIN_FLAG_STATIC_IDENTITY;
> +	return domain->domain.type == IOMMU_DOMAIN_IDENTITY;
>  }
> 
>  static inline bool domain_use_first_level(struct dmar_domain *domain)
> @@ -1996,7 +1996,7 @@ static bool first_level_by_default(void)
>  	return scalable_mode_support() && intel_cap_flts_sanity();
>  }
> 
> -static struct dmar_domain *alloc_domain(int flags)
> +static struct dmar_domain *alloc_domain(unsigned int type)
>  {
>  	struct dmar_domain *domain;
> 
> @@ -2006,7 +2006,6 @@ static struct dmar_domain *alloc_domain(int flags)
> 
>  	memset(domain, 0, sizeof(*domain));
>  	domain->nid = NUMA_NO_NODE;
> -	domain->flags = flags;
>  	if (first_level_by_default())
>  		domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL;
>  	domain->has_iotlb_device = false;
> @@ -2830,7 +2829,7 @@ static int __init si_domain_init(int hw)
>  	struct device *dev;
>  	int i, nid, ret;
> 
> -	si_domain = alloc_domain(DOMAIN_FLAG_STATIC_IDENTITY);
> +	si_domain = alloc_domain(IOMMU_DOMAIN_IDENTITY);
>  	if (!si_domain)
>  		return -EFAULT;
> 
> @@ -4639,7 +4638,7 @@ static struct iommu_domain
> *intel_iommu_domain_alloc(unsigned type)
>  	case IOMMU_DOMAIN_DMA:
>  	case IOMMU_DOMAIN_DMA_FQ:
>  	case IOMMU_DOMAIN_UNMANAGED:
> -		dmar_domain = alloc_domain(0);
> +		dmar_domain = alloc_domain(type);
>  		if (!dmar_domain) {
>  			pr_err("Can't allocate dmar_domain\n");
>  			return NULL;
> --
> 2.25.1

[PATCH v2 2/3] iommu/vt-d: Check FL and SL capability sanity in scalable mode

[Lu Baolu]

An iommu domain could be allocated and mapped before it's attached to any
device. This requires that in scalable mode, when the domain is allocated,
the format (FL or SL) of the page table must be determined. In order to
achieve this, the platform should support consistent SL or FL capabilities
on all IOMMU's. This adds a check for this and aborts IOMMU probing if it
doesn't meet this requirement.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
 drivers/iommu/intel/cap_audit.h |  1 +
 drivers/iommu/intel/cap_audit.c | 13 +++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/drivers/iommu/intel/cap_audit.h b/drivers/iommu/intel/cap_audit.h
index 74cfccae0e81..d07b75938961 100644
--- a/drivers/iommu/intel/cap_audit.h
+++ b/drivers/iommu/intel/cap_audit.h
@@ -111,6 +111,7 @@ bool intel_cap_smts_sanity(void);
 bool intel_cap_pasid_sanity(void);
 bool intel_cap_nest_sanity(void);
 bool intel_cap_flts_sanity(void);
+bool intel_cap_slts_sanity(void);
 
 static inline bool scalable_mode_support(void)
 {
diff --git a/drivers/iommu/intel/cap_audit.c b/drivers/iommu/intel/cap_audit.c
index b12e421a2f1a..040e4ae0e42b 100644
--- a/drivers/iommu/intel/cap_audit.c
+++ b/drivers/iommu/intel/cap_audit.c
@@ -163,6 +163,14 @@ static int cap_audit_static(struct intel_iommu *iommu, enum cap_audit_type type)
 			check_irq_capabilities(iommu, i);
 	}
 
+	/*
+	 * If the system is sane to support scalable mode, either SL or FL
+	 * should be sane.
+	 */
+	if (intel_cap_smts_sanity() &&
+	    !intel_cap_flts_sanity() && !intel_cap_slts_sanity())
+		return -EFAULT;
+
 out:
 	rcu_read_unlock();
 	return 0;
@@ -203,3 +211,8 @@ bool intel_cap_flts_sanity(void)
 {
 	return ecap_flts(intel_iommu_ecap_sanity);
 }
+
+bool intel_cap_slts_sanity(void)
+{
+	return ecap_slts(intel_iommu_ecap_sanity);
+}
-- 
2.25.1

RE: [PATCH v2 2/3] iommu/vt-d: Check FL and SL capability sanity in scalable mode

[Tian, Kevin]

> From: Lu Baolu <baolu.lu@linux.intel.com>
> Sent: Sunday, September 26, 2021 7:46 PM
> 
> An iommu domain could be allocated and mapped before it's attached to
> any
> device. This requires that in scalable mode, when the domain is allocated,
> the format (FL or SL) of the page table must be determined. In order to
> achieve this, the platform should support consistent SL or FL capabilities
> on all IOMMU's. This adds a check for this and aborts IOMMU probing if it
> doesn't meet this requirement.

Is this a must? Looks the requirement comes from how the current code
is implemented. It sets DOMAIN_FLAG_USE_FIRST_LEVEL flag in
alloc_domain. But actually the pgtable is not allocated until the 1st device
is attached. If this understanding is correct, you can also postpone the flag 
setting until pgtable is actually allocated.

of course how to handle inconsistent IOMMU capabilities is another 
orthogonal problem. Addressing it should not be only applied to SL/FL
difference. especially this patch doesn't check consistency. it just
checks that an IOMMU must support either SL or FL which doesn't
match the commit msg here.

> 
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
>  drivers/iommu/intel/cap_audit.h |  1 +
>  drivers/iommu/intel/cap_audit.c | 13 +++++++++++++
>  2 files changed, 14 insertions(+)
> 
> diff --git a/drivers/iommu/intel/cap_audit.h
> b/drivers/iommu/intel/cap_audit.h
> index 74cfccae0e81..d07b75938961 100644
> --- a/drivers/iommu/intel/cap_audit.h
> +++ b/drivers/iommu/intel/cap_audit.h
> @@ -111,6 +111,7 @@ bool intel_cap_smts_sanity(void);
>  bool intel_cap_pasid_sanity(void);
>  bool intel_cap_nest_sanity(void);
>  bool intel_cap_flts_sanity(void);
> +bool intel_cap_slts_sanity(void);
> 
>  static inline bool scalable_mode_support(void)
>  {
> diff --git a/drivers/iommu/intel/cap_audit.c
> b/drivers/iommu/intel/cap_audit.c
> index b12e421a2f1a..040e4ae0e42b 100644
> --- a/drivers/iommu/intel/cap_audit.c
> +++ b/drivers/iommu/intel/cap_audit.c
> @@ -163,6 +163,14 @@ static int cap_audit_static(struct intel_iommu
> *iommu, enum cap_audit_type type)
>  			check_irq_capabilities(iommu, i);
>  	}
> 
> +	/*
> +	 * If the system is sane to support scalable mode, either SL or FL
> +	 * should be sane.
> +	 */
> +	if (intel_cap_smts_sanity() &&
> +	    !intel_cap_flts_sanity() && !intel_cap_slts_sanity())
> +		return -EFAULT;
> +
>  out:
>  	rcu_read_unlock();
>  	return 0;
> @@ -203,3 +211,8 @@ bool intel_cap_flts_sanity(void)
>  {
>  	return ecap_flts(intel_iommu_ecap_sanity);
>  }
> +
> +bool intel_cap_slts_sanity(void)
> +{
> +	return ecap_slts(intel_iommu_ecap_sanity);
> +}
> --
> 2.25.1

RE: [PATCH v2 2/3] iommu/vt-d: Check FL and SL capability sanity in scalable mode

[Tian, Kevin]

> From: Tian, Kevin
> Sent: Monday, September 27, 2021 9:12 AM
> 
> > From: Lu Baolu <baolu.lu@linux.intel.com>
> > Sent: Sunday, September 26, 2021 7:46 PM
> >
> > An iommu domain could be allocated and mapped before it's attached to
> > any
> > device. This requires that in scalable mode, when the domain is allocated,
> > the format (FL or SL) of the page table must be determined. In order to
> > achieve this, the platform should support consistent SL or FL capabilities
> > on all IOMMU's. This adds a check for this and aborts IOMMU probing if it
> > doesn't meet this requirement.
> 
> Is this a must? Looks the requirement comes from how the current code
> is implemented. It sets DOMAIN_FLAG_USE_FIRST_LEVEL flag in
> alloc_domain. But actually the pgtable is not allocated until the 1st device
> is attached. If this understanding is correct, you can also postpone the flag
> setting until pgtable is actually allocated.

Baolu explained to me that RMRR regions are mapped before device
attach. So this check is necessary

> 
> of course how to handle inconsistent IOMMU capabilities is another
> orthogonal problem. Addressing it should not be only applied to SL/FL
> difference. especially this patch doesn't check consistency. it just
> checks that an IOMMU must support either SL or FL which doesn't
> match the commit msg here.

and the overall inconsistency check mechanism is already in place. 
and the logic here just extends it to cover SL/FL. Given that,

Reviewed-by: Kevin Tian <kevin.tian@intel.com>


> 
> >
> > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> > ---
> >  drivers/iommu/intel/cap_audit.h |  1 +
> >  drivers/iommu/intel/cap_audit.c | 13 +++++++++++++
> >  2 files changed, 14 insertions(+)
> >
> > diff --git a/drivers/iommu/intel/cap_audit.h
> > b/drivers/iommu/intel/cap_audit.h
> > index 74cfccae0e81..d07b75938961 100644
> > --- a/drivers/iommu/intel/cap_audit.h
> > +++ b/drivers/iommu/intel/cap_audit.h
> > @@ -111,6 +111,7 @@ bool intel_cap_smts_sanity(void);
> >  bool intel_cap_pasid_sanity(void);
> >  bool intel_cap_nest_sanity(void);
> >  bool intel_cap_flts_sanity(void);
> > +bool intel_cap_slts_sanity(void);
> >
> >  static inline bool scalable_mode_support(void)
> >  {
> > diff --git a/drivers/iommu/intel/cap_audit.c
> > b/drivers/iommu/intel/cap_audit.c
> > index b12e421a2f1a..040e4ae0e42b 100644
> > --- a/drivers/iommu/intel/cap_audit.c
> > +++ b/drivers/iommu/intel/cap_audit.c
> > @@ -163,6 +163,14 @@ static int cap_audit_static(struct intel_iommu
> > *iommu, enum cap_audit_type type)
> >  			check_irq_capabilities(iommu, i);
> >  	}
> >
> > +	/*
> > +	 * If the system is sane to support scalable mode, either SL or FL
> > +	 * should be sane.
> > +	 */
> > +	if (intel_cap_smts_sanity() &&
> > +	    !intel_cap_flts_sanity() && !intel_cap_slts_sanity())
> > +		return -EFAULT;
> > +
> >  out:
> >  	rcu_read_unlock();
> >  	return 0;
> > @@ -203,3 +211,8 @@ bool intel_cap_flts_sanity(void)
> >  {
> >  	return ecap_flts(intel_iommu_ecap_sanity);
> >  }
> > +
> > +bool intel_cap_slts_sanity(void)
> > +{
> > +	return ecap_slts(intel_iommu_ecap_sanity);
> > +}
> > --
> > 2.25.1

RE: [PATCH v2 2/3] iommu/vt-d: Check FL and SL capability sanity in scalable mode

[Tian, Kevin]

> From: Tian, Kevin
> Sent: Monday, September 27, 2021 9:30 AM
> 
> > From: Tian, Kevin
> > Sent: Monday, September 27, 2021 9:12 AM
> >
> > > From: Lu Baolu <baolu.lu@linux.intel.com>
> > > Sent: Sunday, September 26, 2021 7:46 PM
> > >
> > > An iommu domain could be allocated and mapped before it's attached to
> > > any
> > > device. This requires that in scalable mode, when the domain is allocated,
> > > the format (FL or SL) of the page table must be determined. In order to
> > > achieve this, the platform should support consistent SL or FL capabilities
> > > on all IOMMU's. This adds a check for this and aborts IOMMU probing if it
> > > doesn't meet this requirement.
> >
> > Is this a must? Looks the requirement comes from how the current code
> > is implemented. It sets DOMAIN_FLAG_USE_FIRST_LEVEL flag in
> > alloc_domain. But actually the pgtable is not allocated until the 1st device
> > is attached. If this understanding is correct, you can also postpone the flag
> > setting until pgtable is actually allocated.
> 
> Baolu explained to me that RMRR regions are mapped before device
> attach. So this check is necessary
> 
> >
> > of course how to handle inconsistent IOMMU capabilities is another
> > orthogonal problem. Addressing it should not be only applied to SL/FL
> > difference. especially this patch doesn't check consistency. it just
> > checks that an IOMMU must support either SL or FL which doesn't
> > match the commit msg here.
> 
> and the overall inconsistency check mechanism is already in place.
> and the logic here just extends it to cover SL/FL. Given that,
> 
> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
> 
> 
> >
> > >
> > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> > > ---
> > >  drivers/iommu/intel/cap_audit.h |  1 +
> > >  drivers/iommu/intel/cap_audit.c | 13 +++++++++++++
> > >  2 files changed, 14 insertions(+)
> > >
> > > diff --git a/drivers/iommu/intel/cap_audit.h
> > > b/drivers/iommu/intel/cap_audit.h
> > > index 74cfccae0e81..d07b75938961 100644
> > > --- a/drivers/iommu/intel/cap_audit.h
> > > +++ b/drivers/iommu/intel/cap_audit.h
> > > @@ -111,6 +111,7 @@ bool intel_cap_smts_sanity(void);
> > >  bool intel_cap_pasid_sanity(void);
> > >  bool intel_cap_nest_sanity(void);
> > >  bool intel_cap_flts_sanity(void);
> > > +bool intel_cap_slts_sanity(void);
> > >
> > >  static inline bool scalable_mode_support(void)
> > >  {
> > > diff --git a/drivers/iommu/intel/cap_audit.c
> > > b/drivers/iommu/intel/cap_audit.c
> > > index b12e421a2f1a..040e4ae0e42b 100644
> > > --- a/drivers/iommu/intel/cap_audit.c
> > > +++ b/drivers/iommu/intel/cap_audit.c
> > > @@ -163,6 +163,14 @@ static int cap_audit_static(struct intel_iommu
> > > *iommu, enum cap_audit_type type)
> > >  			check_irq_capabilities(iommu, i);
> > >  	}
> > >
> > > +	/*
> > > +	 * If the system is sane to support scalable mode, either SL or FL
> > > +	 * should be sane.
> > > +	 */
> > > +	if (intel_cap_smts_sanity() &&
> > > +	    !intel_cap_flts_sanity() && !intel_cap_slts_sanity())
> > > +		return -EFAULT;

btw this should not be -EFAULT.

> > > +
> > >  out:
> > >  	rcu_read_unlock();
> > >  	return 0;
> > > @@ -203,3 +211,8 @@ bool intel_cap_flts_sanity(void)
> > >  {
> > >  	return ecap_flts(intel_iommu_ecap_sanity);
> > >  }
> > > +
> > > +bool intel_cap_slts_sanity(void)
> > > +{
> > > +	return ecap_slts(intel_iommu_ecap_sanity);
> > > +}
> > > --
> > > 2.25.1

Re: [PATCH v2 2/3] iommu/vt-d: Check FL and SL capability sanity in scalable mode

[Lu Baolu]

On 9/27/21 9:33 AM, Tian, Kevin wrote:
>> From: Tian, Kevin
>> Sent: Monday, September 27, 2021 9:30 AM
>>
>>> From: Tian, Kevin
>>> Sent: Monday, September 27, 2021 9:12 AM
>>>
>>>> From: Lu Baolu <baolu.lu@linux.intel.com>
>>>> Sent: Sunday, September 26, 2021 7:46 PM
>>>>
>>>> An iommu domain could be allocated and mapped before it's attached to
>>>> any
>>>> device. This requires that in scalable mode, when the domain is allocated,
>>>> the format (FL or SL) of the page table must be determined. In order to
>>>> achieve this, the platform should support consistent SL or FL capabilities
>>>> on all IOMMU's. This adds a check for this and aborts IOMMU probing if it
>>>> doesn't meet this requirement.
>>>
>>> Is this a must? Looks the requirement comes from how the current code
>>> is implemented. It sets DOMAIN_FLAG_USE_FIRST_LEVEL flag in
>>> alloc_domain. But actually the pgtable is not allocated until the 1st device
>>> is attached. If this understanding is correct, you can also postpone the flag
>>> setting until pgtable is actually allocated.
>>
>> Baolu explained to me that RMRR regions are mapped before device
>> attach. So this check is necessary
>>
>>>
>>> of course how to handle inconsistent IOMMU capabilities is another
>>> orthogonal problem. Addressing it should not be only applied to SL/FL
>>> difference. especially this patch doesn't check consistency. it just
>>> checks that an IOMMU must support either SL or FL which doesn't
>>> match the commit msg here.
>>
>> and the overall inconsistency check mechanism is already in place.
>> and the logic here just extends it to cover SL/FL. Given that,
>>
>> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
>>
>>
>>>
>>>>
>>>> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
>>>> ---
>>>>   drivers/iommu/intel/cap_audit.h |  1 +
>>>>   drivers/iommu/intel/cap_audit.c | 13 +++++++++++++
>>>>   2 files changed, 14 insertions(+)
>>>>
>>>> diff --git a/drivers/iommu/intel/cap_audit.h
>>>> b/drivers/iommu/intel/cap_audit.h
>>>> index 74cfccae0e81..d07b75938961 100644
>>>> --- a/drivers/iommu/intel/cap_audit.h
>>>> +++ b/drivers/iommu/intel/cap_audit.h
>>>> @@ -111,6 +111,7 @@ bool intel_cap_smts_sanity(void);
>>>>   bool intel_cap_pasid_sanity(void);
>>>>   bool intel_cap_nest_sanity(void);
>>>>   bool intel_cap_flts_sanity(void);
>>>> +bool intel_cap_slts_sanity(void);
>>>>
>>>>   static inline bool scalable_mode_support(void)
>>>>   {
>>>> diff --git a/drivers/iommu/intel/cap_audit.c
>>>> b/drivers/iommu/intel/cap_audit.c
>>>> index b12e421a2f1a..040e4ae0e42b 100644
>>>> --- a/drivers/iommu/intel/cap_audit.c
>>>> +++ b/drivers/iommu/intel/cap_audit.c
>>>> @@ -163,6 +163,14 @@ static int cap_audit_static(struct intel_iommu
>>>> *iommu, enum cap_audit_type type)
>>>>   			check_irq_capabilities(iommu, i);
>>>>   	}
>>>>
>>>> +	/*
>>>> +	 * If the system is sane to support scalable mode, either SL or FL
>>>> +	 * should be sane.
>>>> +	 */
>>>> +	if (intel_cap_smts_sanity() &&
>>>> +	    !intel_cap_flts_sanity() && !intel_cap_slts_sanity())
>>>> +		return -EFAULT;
> 
> btw this should not be -EFAULT.

Agreed. I will change it to -ENOTSUPP.

Best regards,
baolu

> 
>>>> +
>>>>   out:
>>>>   	rcu_read_unlock();
>>>>   	return 0;
>>>> @@ -203,3 +211,8 @@ bool intel_cap_flts_sanity(void)
>>>>   {
>>>>   	return ecap_flts(intel_iommu_ecap_sanity);
>>>>   }
>>>> +
>>>> +bool intel_cap_slts_sanity(void)
>>>> +{
>>>> +	return ecap_slts(intel_iommu_ecap_sanity);
>>>> +}
>>>> --
>>>> 2.25.1
> 

[PATCH v2 3/3] iommu/vt-d: Use second level for GPA->HPA translation

[Lu Baolu]

The IOMMU VT-d implementation uses the first level for GPA->HPA translation
by default. Although both the first level and the second level could handle
the DMA translation, they're different in some way. For example, the second
level translation has separate controls for the Access/Dirty page tracking.
With the first level translation, there's no such control. On the other
hand, the second level translation has the page-level control for forcing
snoop, but the first level only has global control with pasid granularity.

This uses the second level for GPA->HPA translation so that we can provide
a consistent hardware interface for use cases like dirty page tracking for
live migration.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
 drivers/iommu/intel/iommu.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index dc2030d014e0..426630261614 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -1991,9 +1991,15 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
  * Check and return whether first level is used by default for
  * DMA translation.
  */
-static bool first_level_by_default(void)
+static bool first_level_by_default(unsigned int type)
 {
-	return scalable_mode_support() && intel_cap_flts_sanity();
+	if (!scalable_mode_support())
+		return false;
+
+	if (intel_cap_flts_sanity() ^ intel_cap_slts_sanity())
+		return intel_cap_flts_sanity();
+
+	return type != IOMMU_DOMAIN_UNMANAGED;
 }
 
 static struct dmar_domain *alloc_domain(unsigned int type)
@@ -2006,7 +2012,7 @@ static struct dmar_domain *alloc_domain(unsigned int type)
 
 	memset(domain, 0, sizeof(*domain));
 	domain->nid = NUMA_NO_NODE;
-	if (first_level_by_default())
+	if (first_level_by_default(type))
 		domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL;
 	domain->has_iotlb_device = false;
 	INIT_LIST_HEAD(&domain->devices);
-- 
2.25.1

RE: [PATCH v2 3/3] iommu/vt-d: Use second level for GPA->HPA translation

[Tian, Kevin]

> From: Lu Baolu <baolu.lu@linux.intel.com>
> Sent: Sunday, September 26, 2021 7:46 PM
> 
> The IOMMU VT-d implementation uses the first level for GPA->HPA
> translation
> by default. Although both the first level and the second level could handle
> the DMA translation, they're different in some way. For example, the second
> level translation has separate controls for the Access/Dirty page tracking.
> With the first level translation, there's no such control. On the other
> hand, the second level translation has the page-level control for forcing
> snoop, but the first level only has global control with pasid granularity.
> 
> This uses the second level for GPA->HPA translation so that we can provide
> a consistent hardware interface for use cases like dirty page tracking for
> live migration.
> 
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
>  drivers/iommu/intel/iommu.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index dc2030d014e0..426630261614 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -1991,9 +1991,15 @@ static void free_dmar_iommu(struct intel_iommu
> *iommu)
>   * Check and return whether first level is used by default for
>   * DMA translation.
>   */
> -static bool first_level_by_default(void)
> +static bool first_level_by_default(unsigned int type)
>  {
> -	return scalable_mode_support() && intel_cap_flts_sanity();

/* Only SL is available in legacy mode */

> +	if (!scalable_mode_support())
> +		return false;
> +

/* if only level (either FL or SL) is available, just use it */

> +	if (intel_cap_flts_sanity() ^ intel_cap_slts_sanity())
> +		return intel_cap_flts_sanity();
> +

/* if both levels are available, decide it based on domain type */

> +	return type != IOMMU_DOMAIN_UNMANAGED;
>  }

with above comments added:

Reviewed-by: Kevin Tian <kevin.tian@intel.com>

> 
>  static struct dmar_domain *alloc_domain(unsigned int type)
> @@ -2006,7 +2012,7 @@ static struct dmar_domain
> *alloc_domain(unsigned int type)
> 
>  	memset(domain, 0, sizeof(*domain));
>  	domain->nid = NUMA_NO_NODE;
> -	if (first_level_by_default())
> +	if (first_level_by_default(type))
>  		domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL;
>  	domain->has_iotlb_device = false;
>  	INIT_LIST_HEAD(&domain->devices);
> --
> 2.25.1