Re: [PATCH v3 08/10] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK

From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Heiko Stuebner <heiko@sntech.de>,
	Atish Patra <atishp@rivosinc.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v3 08/10] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK
Date: Tue, 20 Sep 2022 15:05:05 +0100	[thread overview]
Message-ID: <CA+V-a8s9y0Jq4TJk9E_ptsZTW3iCoysaBSrUeQV8qfDFO3wzeQ@mail.gmail.com> (raw)
In-Reply-To: <CAMuHMdW99EutciosPtOTU9AztfvfMdKTaS+YRmpmS4VnhZ9KAA@mail.gmail.com>

Hi Geert,

Thank you for the review.

On Tue, Sep 20, 2022 at 1:32 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Thu, Sep 15, 2022 at 8:17 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Enable the minimal blocks required for booting the Renesas RZ/Five
> > SMARC EVK with initramfs.
> >
> > Below are the blocks enabled:
> > - CPG
> > - CPU0
> > - DDR (memory regions)
> > - PINCTRL
> > - PLIC
> > - SCIF0
> >
> > Note we have deleted the nodes from the DT for which support needs to be
> > added for RZ/Five SoC and are enabled by RZ/G2UL SMARC EVK SoM/carrier
> > board DTS/I.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > v2->v3
> > * Dropped RB tags from Conor and Geert
> > * Now re-using the SoM and carrier board DTS/I from RZ/G2UL
>
> Thanks for the update!
>
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dts
> > @@ -0,0 +1,27 @@
> > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +/*
> > + * Device Tree Source for the RZ/Five SMARC EVK
> > + *
> > + * Copyright (C) 2022 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +
> > +/*
> > + * DIP-Switch SW1 setting
> > + * 1 : High; 0: Low
> > + * SW1-2 : SW_SD0_DEV_SEL      (0: uSD; 1: eMMC)
> > + * SW1-3 : SW_ET0_EN_N         (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
> > + * Please change below macros according to SW1 setting on SoM
>
> "on the SoM" (like in r9a07g043u11-smarc.dts)?
>
Agreed, I will update it.

> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> > @@ -0,0 +1,42 @@
> > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +/*
> > + * Device Tree Source for the RZ/Five SMARC EVK SOM
> > + *
> > + * Copyright (C) 2022 Renesas Electronics Corp.
> > + */
> > +
> > +#include <arm64/renesas/rzg2ul-smarc-som.dtsi>
> > +
> > +/ {
> > +       aliases {
> > +               /delete-property/ ethernet0;
> > +               /delete-property/ ethernet1;
>
> OK
>
I assume you are OK with dropping the above too?

> > +       };
> > +
> > +       chosen {
> > +               bootargs = "ignore_loglevel";
> > +       };
> > +};
> > +
> > +#if (SW_SW0_DEV_SEL)
> > +/delete-node/ &adc;
> > +#endif
> > +
> > +#if (!SW_ET0_EN_N)
> > +/delete-node/ &eth0;
> > +#endif
> > +/delete-node/ &eth1;
> > +
> > +/delete-node/ &ostm1;
> > +/delete-node/ &ostm2;
>
> Given they are all placeholders, do you really need to delete them?
> (more below)
>
I did retest without deleting the place holders and I dont see any
issues (or splat) while booting up so I'll drop them while sending the
v4.

Cheers,
Prabhakar