Re: [PATCH v3 07/10] riscv: boot: dts: r9a07g043: Add placeholder nodes

From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Conor Dooley <conor.dooley@microchip.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Conor Dooley <mail@conchuod.ie>,
	robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, heiko@sntech.de, atishp@rivosinc.com,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	biju.das.jz@bp.renesas.com,
	prabhakar.mahadev-lad.rj@bp.renesas.com
Subject: Re: [PATCH v3 07/10] riscv: boot: dts: r9a07g043: Add placeholder nodes
Date: Tue, 20 Sep 2022 14:46:49 +0100	[thread overview]
Message-ID: <CA+V-a8u3LcDhOYqWSOJUUeSMX+o=12pAcFJ0xArYSPy+=uT9NA@mail.gmail.com> (raw)
In-Reply-To: <Yymyh+UlIICacxeV@wendy>

Hi Conor and Geert,

On Tue, Sep 20, 2022 at 1:31 PM Conor Dooley <conor.dooley@microchip.com> wrote:
>
> On Tue, Sep 20, 2022 at 02:17:50PM +0200, Geert Uytterhoeven wrote:
> > Hi Conor,
> >
> > On Fri, Sep 16, 2022 at 12:40 AM Conor Dooley <mail@conchuod.ie> wrote:
> > > On 15/09/2022 23:26, Lad, Prabhakar wrote:
> > > > On Thu, Sep 15, 2022 at 10:36 PM <Conor.Dooley@microchip.com> wrote:
> > > >> On 15/09/2022 19:15, Prabhakar wrote:
> > > >>> riscv: boot: dts: r9a07g043: Add placeholder nodes
> > > >>> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > >>> Add empty placeholder nodes to RZ/Five (R9A07G043) SoC DTSI.
> > > >> Can you explain why do you need placeholder nodes for this and
> > > >> cannot just directly include the other dtsis?
> > > >>
> > > > Since the RZ/G2UL SoC is ARM64 where it has a GIC and on RZ/Five SoC
> > > > we have PLIC for interrupts. Also the interrupt numbering for RZ/Five
> > > > SoC differs from RZ/G2UL SoC hence we are not directly using the
> > > > RZ/G2UL SoC DTSI [0].
> > > >
> > > > [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/r9a07g043.dtsi?h=v6.0-rc5
> > > >
> > > > For the RZ/Five SMARC EVK I am re-using the below files [1] (SoM) and
> > > > [2] (Carrier board) as the RZ/Five SMARC EVK is pin compatible.  Since
> > > > I am re-using these when trying to compile the RZ/Five DTB I get
> > > > compilation errors since the nodes dont exist (and there is no way
> > > > currently we can delete the node reference when the actual node itself
> > > > isn't present) hence these place holders.
> > > >
> > > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?h=v6.0-rc5
> > > > [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi?h=v6.0-rc5
> > >
> > > If this method is acceptable to Geert, this explanation 100% needs to
> > > go into the commit message.
> >
> > We've been using these placeholders a lot in Renesas SoC-specific
> > .dtsi files, as they allow us to introduce gradually support for a new SoC
> > that is mounted on an existing PCB, and thus shares a board-specific
> > .dtsi file.  Hence I'm fine with this.
>
> Aye, if you're happy with it then I am too...
> >
> > However, I think more properties can be dropped from the placeholders.
> > There is no need to have e.g. 'reg-names' and 'status = "disabled"'
> > (there is no compatible value, so no matching is done).
>
> ...and this makes a lot of sense. I'd still like a comment in the
> commit message though explaining why placeholder nodes are needed as
> opposed to just leaving it blank etc.
>
I will drop the status and reg-names properties and also update the
commit message while sending the v4

Cheers,
Prabhakar