[PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[Rafał Miłecki]

From: Rafał Miłecki <rafal@milecki.pl>

This clock is present on cheaper Northstar devices like BCM53573 or
BCM47189 using Corex-A7. ILP is a part of PMU (Power Management Unit)
and so it should be defined as one of its subnodes (subdevices). For
more details see Documentation entry.

Unfortunately there isn't a set of registers related to ILP clock only.
We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
"retention*" and "control_ext" regs. This is why this driver maps all
0x1000 B of space.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
V2: Rebase on top of clk-next
    Use ALP as parent clock
    Improve comments
    Switch from ioremap_nocache to ioremap
    Check of_clk_add_provide result for error
V3: Drop #include <linux/moduleh>
    Make ILP DT entry part of PMU
    Describe ILP as subdevice of PMU in Documentation
---
 .../devicetree/bindings/clock/brcm,ns-ilp.txt      |  40 ++++++
 drivers/clk/bcm/Makefile                           |   1 +
 drivers/clk/bcm/clk-ns-ilp.c                       | 146 +++++++++++++++++++++
 3 files changed, 187 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
 create mode 100644 drivers/clk/bcm/clk-ns-ilp.c

diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
new file mode 100644
index 0000000..a18c73f
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
@@ -0,0 +1,40 @@
+Broadcom Northstar ILP clock
+============================
+
+This binding uses the common clock binding:
+    Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+This binding is used for ILP clock (sometimes referred as "slow clock")
+on Broadcom Northstar devices using Corex-A7 CPU.
+
+This clock is part of PMU (Power Management Unit), a Broadcom's device
+handing power-related aspects. Please note PMU contains more subdevices,
+ILP is only one of them.
+
+ILP's rate has to be calculated on runtime and it depends on ALP clock
+which has to be referenced.
+
+Required properties:
+- compatible: "brcm,ns-ilp"
+- reg: iomem address range of PMU (Power Management Unit)
+- reg-names: "pmu", the only needed & supported reg right now
+- clocks: has to reference an ALP clock
+- #clock-cells: should be <0>
+
+Example:
+
+pmu@18012000 {
+	compatible = "simple-bus";
+	ranges = <0x00000000 0x18012000 0x00001000>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	ilp: ilp@0 {
+		compatible = "brcm,ns-ilp";
+		reg = <0 0x1000>;
+		reg-names = "pmu";
+		clocks = <&alp>;
+		#clock-cells = <0>;
+		clock-output-names = "ilp";
+	};
+};
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 1d79bd2..1389379 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-ns2.o
 obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
 obj-$(CONFIG_ARCH_BCM_NSP)	+= clk-nsp.o
 obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-nsp.o
+obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-ns-ilp.o
diff --git a/drivers/clk/bcm/clk-ns-ilp.c b/drivers/clk/bcm/clk-ns-ilp.c
new file mode 100644
index 0000000..53b4a23
--- /dev/null
+++ b/drivers/clk/bcm/clk-ns-ilp.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+#define PMU_XTAL_FREQ_RATIO			0x66c
+#define  XTAL_ALP_PER_4ILP			0x00001fff
+#define  XTAL_CTL_EN				0x80000000
+#define PMU_SLOW_CLK_PERIOD			0x6dc
+
+struct ns_ilp {
+	struct clk *clk;
+	struct clk_hw hw;
+	void __iomem *pmu;
+};
+
+static int ns_ilp_enable(struct clk_hw *hw)
+{
+	struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw);
+
+	writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
+	writel(0x10000, ilp->pmu + 0x674);
+
+	return 0;
+}
+
+static unsigned long ns_ilp_recalc_rate(struct clk_hw *hw,
+					unsigned long parent_rate)
+{
+	struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw);
+	void __iomem *pmu = ilp->pmu;
+	u32 last_val, cur_val;
+	u32 sum = 0, num = 0, loop_num = 0;
+	u32 avg;
+
+	/* Enable measurement */
+	writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
+
+	/* Read initial value */
+	last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
+
+	/*
+	 * At minimum we should loop for a bit to let hardware do the
+	 * measurement. This isn't very accurate however, so for a better
+	 * precision lets try getting 20 different values for and use average.
+	 */
+	while (num < 20) {
+		cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
+
+		if (cur_val != last_val) {
+			/* Got different value, use it */
+			sum += cur_val;
+			num++;
+			loop_num = 0;
+			last_val = cur_val;
+		} else if (++loop_num > 5000) {
+			/* Same value over and over, give up */
+			sum += cur_val;
+			num++;
+			break;
+		}
+	}
+
+	/* Disable measurement to save power */
+	writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
+
+	avg = sum / num;
+
+	return parent_rate * 4 / avg;
+}
+
+static const struct clk_ops ns_ilp_clk_ops = {
+	.enable = ns_ilp_enable,
+	.recalc_rate = ns_ilp_recalc_rate,
+};
+
+static void ns_ilp_init(struct device_node *np)
+{
+	struct ns_ilp *ilp;
+	struct resource res;
+	struct clk_init_data init = { 0 };
+	const char *parent_name;
+	int index;
+	int err;
+
+	ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
+	if (!ilp)
+		return;
+
+	parent_name = of_clk_get_parent_name(np, 0);
+	if (!parent_name) {
+		err = -ENOENT;
+		goto err_free_ilp;
+	}
+
+	/* TODO: This looks generic, try making it OF helper. */
+	index = of_property_match_string(np, "reg-names", "pmu");
+	if (index < 0) {
+		err = index;
+		goto err_free_ilp;
+	}
+	err = of_address_to_resource(np, index, &res);
+	if (err)
+		goto err_free_ilp;
+	ilp->pmu = ioremap(res.start, resource_size(&res));
+	if (IS_ERR(ilp->pmu)) {
+		err = PTR_ERR(ilp->pmu);
+		goto err_free_ilp;
+	}
+
+	init.name = np->name;
+	init.ops = &ns_ilp_clk_ops;
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+
+	ilp->hw.init = &init;
+	ilp->clk = clk_register(NULL, &ilp->hw);
+	if (WARN_ON(IS_ERR(ilp->clk)))
+		goto err_unmap_pmu;
+
+	err = of_clk_add_provider(np, of_clk_src_simple_get, ilp->clk);
+	if (err)
+		goto err_clk_unregister;
+
+	return;
+
+err_clk_unregister:
+	clk_unregister(ilp->clk);
+err_unmap_pmu:
+	iounmap(ilp->pmu);
+err_free_ilp:
+	kfree(ilp);
+	pr_err("Failed to init ILP clock: %d\n", err);
+}
+CLK_OF_DECLARE(ns_ilp_clk, "brcm,ns-ilp", ns_ilp_init);
-- 
1.8.4.5

Re: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[Jon Mason]

On Wed, Aug 10, 2016 at 8:05 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
>
> This clock is present on cheaper Northstar devices like BCM53573 or
> BCM47189 using Corex-A7. ILP is a part of PMU (Power Management Unit)
> and so it should be defined as one of its subnodes (subdevices). For
> more details see Documentation entry.
>
> Unfortunately there isn't a set of registers related to ILP clock only.
> We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
> "retention*" and "control_ext" regs. This is why this driver maps all
> 0x1000 B of space.
>
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
> V2: Rebase on top of clk-next
>     Use ALP as parent clock
>     Improve comments
>     Switch from ioremap_nocache to ioremap
>     Check of_clk_add_provide result for error
> V3: Drop #include <linux/moduleh>
>     Make ILP DT entry part of PMU
>     Describe ILP as subdevice of PMU in Documentation
> ---
>  .../devicetree/bindings/clock/brcm,ns-ilp.txt      |  40 ++++++
>  drivers/clk/bcm/Makefile                           |   1 +
>  drivers/clk/bcm/clk-ns-ilp.c                       | 146 +++++++++++++++++++++
>  3 files changed, 187 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>  create mode 100644 drivers/clk/bcm/clk-ns-ilp.c
>
> diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
> new file mode 100644
> index 0000000..a18c73f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
> @@ -0,0 +1,40 @@
> +Broadcom Northstar ILP clock
> +============================
> +
> +This binding uses the common clock binding:
> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
> +
> +This binding is used for ILP clock (sometimes referred as "slow clock")
> +on Broadcom Northstar devices using Corex-A7 CPU.
> +
> +This clock is part of PMU (Power Management Unit), a Broadcom's device
> +handing power-related aspects. Please note PMU contains more subdevices,
> +ILP is only one of them.
> +
> +ILP's rate has to be calculated on runtime and it depends on ALP clock
> +which has to be referenced.
> +
> +Required properties:
> +- compatible: "brcm,ns-ilp"
> +- reg: iomem address range of PMU (Power Management Unit)
> +- reg-names: "pmu", the only needed & supported reg right now
> +- clocks: has to reference an ALP clock
> +- #clock-cells: should be <0>
> +
> +Example:
> +
> +pmu@18012000 {
> +       compatible = "simple-bus";
> +       ranges = <0x00000000 0x18012000 0x00001000>;

I don't see a corresponding DT entry in this patch, but 18012000 is
the PCI block.  So, I am concerned this will collide if used there.

I looked at the NS register reference guide, and I cannot find the
registers you are trying to reference.  Is this supposed to be
referencing the LCPLL clock registers in DMU?  If so, there is already
a driver in there for this (see drivers/clk/bcm/clk-nsp.c).

> +       #address-cells = <1>;
> +       #size-cells = <1>;
> +
> +       ilp: ilp@0 {
> +               compatible = "brcm,ns-ilp";
> +               reg = <0 0x1000>;
> +               reg-names = "pmu";
> +               clocks = <&alp>;
> +               #clock-cells = <0>;
> +               clock-output-names = "ilp";
> +       };
> +};
> diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
> index 1d79bd2..1389379 100644
> --- a/drivers/clk/bcm/Makefile
> +++ b/drivers/clk/bcm/Makefile
> @@ -10,3 +10,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC)        += clk-ns2.o
>  obj-$(CONFIG_ARCH_BCM_CYGNUS)  += clk-cygnus.o
>  obj-$(CONFIG_ARCH_BCM_NSP)     += clk-nsp.o
>  obj-$(CONFIG_ARCH_BCM_5301X)   += clk-nsp.o
> +obj-$(CONFIG_ARCH_BCM_5301X)   += clk-ns-ilp.o
> diff --git a/drivers/clk/bcm/clk-ns-ilp.c b/drivers/clk/bcm/clk-ns-ilp.c
> new file mode 100644
> index 0000000..53b4a23
> --- /dev/null
> +++ b/drivers/clk/bcm/clk-ns-ilp.c
> @@ -0,0 +1,146 @@
> +/*
> + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/slab.h>
> +
> +#define PMU_XTAL_FREQ_RATIO                    0x66c
> +#define  XTAL_ALP_PER_4ILP                     0x00001fff
> +#define  XTAL_CTL_EN                           0x80000000
> +#define PMU_SLOW_CLK_PERIOD                    0x6dc
> +
> +struct ns_ilp {
> +       struct clk *clk;
> +       struct clk_hw hw;
> +       void __iomem *pmu;
> +};
> +
> +static int ns_ilp_enable(struct clk_hw *hw)
> +{
> +       struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw);
> +
> +       writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
> +       writel(0x10000, ilp->pmu + 0x674);
> +
> +       return 0;
> +}
> +
> +static unsigned long ns_ilp_recalc_rate(struct clk_hw *hw,
> +                                       unsigned long parent_rate)
> +{
> +       struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw);
> +       void __iomem *pmu = ilp->pmu;
> +       u32 last_val, cur_val;
> +       u32 sum = 0, num = 0, loop_num = 0;
> +       u32 avg;
> +
> +       /* Enable measurement */
> +       writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
> +
> +       /* Read initial value */
> +       last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
> +
> +       /*
> +        * At minimum we should loop for a bit to let hardware do the
> +        * measurement. This isn't very accurate however, so for a better
> +        * precision lets try getting 20 different values for and use average.
> +        */
> +       while (num < 20) {
> +               cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
> +
> +               if (cur_val != last_val) {
> +                       /* Got different value, use it */
> +                       sum += cur_val;
> +                       num++;
> +                       loop_num = 0;
> +                       last_val = cur_val;
> +               } else if (++loop_num > 5000) {
> +                       /* Same value over and over, give up */
> +                       sum += cur_val;
> +                       num++;
> +                       break;
> +               }
> +       }
> +
> +       /* Disable measurement to save power */
> +       writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
> +
> +       avg = sum / num;
> +
> +       return parent_rate * 4 / avg;
> +}
> +
> +static const struct clk_ops ns_ilp_clk_ops = {
> +       .enable = ns_ilp_enable,
> +       .recalc_rate = ns_ilp_recalc_rate,
> +};
> +
> +static void ns_ilp_init(struct device_node *np)
> +{
> +       struct ns_ilp *ilp;
> +       struct resource res;
> +       struct clk_init_data init = { 0 };
> +       const char *parent_name;
> +       int index;
> +       int err;
> +
> +       ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
> +       if (!ilp)
> +               return;
> +
> +       parent_name = of_clk_get_parent_name(np, 0);
> +       if (!parent_name) {
> +               err = -ENOENT;
> +               goto err_free_ilp;
> +       }
> +
> +       /* TODO: This looks generic, try making it OF helper. */
> +       index = of_property_match_string(np, "reg-names", "pmu");
> +       if (index < 0) {
> +               err = index;
> +               goto err_free_ilp;
> +       }
> +       err = of_address_to_resource(np, index, &res);
> +       if (err)
> +               goto err_free_ilp;
> +       ilp->pmu = ioremap(res.start, resource_size(&res));
> +       if (IS_ERR(ilp->pmu)) {
> +               err = PTR_ERR(ilp->pmu);
> +               goto err_free_ilp;
> +       }
> +
> +       init.name = np->name;
> +       init.ops = &ns_ilp_clk_ops;
> +       init.parent_names = &parent_name;
> +       init.num_parents = 1;
> +
> +       ilp->hw.init = &init;
> +       ilp->clk = clk_register(NULL, &ilp->hw);
> +       if (WARN_ON(IS_ERR(ilp->clk)))
> +               goto err_unmap_pmu;
> +
> +       err = of_clk_add_provider(np, of_clk_src_simple_get, ilp->clk);
> +       if (err)
> +               goto err_clk_unregister;
> +
> +       return;
> +
> +err_clk_unregister:
> +       clk_unregister(ilp->clk);
> +err_unmap_pmu:
> +       iounmap(ilp->pmu);
> +err_free_ilp:
> +       kfree(ilp);
> +       pr_err("Failed to init ILP clock: %d\n", err);
> +}
> +CLK_OF_DECLARE(ns_ilp_clk, "brcm,ns-ilp", ns_ilp_init);
> --
> 1.8.4.5
>

Re: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[Rafał Miłecki]

On 10 August 2016 at 19:22, Jon Mason <jon.mason@broadcom.com> wrote:
> On Wed, Aug 10, 2016 at 8:05 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>> diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>> new file mode 100644
>> index 0000000..a18c73f
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>> @@ -0,0 +1,40 @@
>> +Broadcom Northstar ILP clock
>> +============================
>> +
>> +This binding uses the common clock binding:
>> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
>> +
>> +This binding is used for ILP clock (sometimes referred as "slow clock")
>> +on Broadcom Northstar devices using Corex-A7 CPU.
>> +
>> +This clock is part of PMU (Power Management Unit), a Broadcom's device
>> +handing power-related aspects. Please note PMU contains more subdevices,
>> +ILP is only one of them.
>> +
>> +ILP's rate has to be calculated on runtime and it depends on ALP clock
>> +which has to be referenced.
>> +
>> +Required properties:
>> +- compatible: "brcm,ns-ilp"
>> +- reg: iomem address range of PMU (Power Management Unit)
>> +- reg-names: "pmu", the only needed & supported reg right now
>> +- clocks: has to reference an ALP clock
>> +- #clock-cells: should be <0>
>> +
>> +Example:
>> +
>> +pmu@18012000 {
>> +       compatible = "simple-bus";
>> +       ranges = <0x00000000 0x18012000 0x00001000>;
>
> I don't see a corresponding DT entry in this patch, but 18012000 is
> the PCI block.  So, I am concerned this will collide if used there.
>
> I looked at the NS register reference guide, and I cannot find the
> registers you are trying to reference.  Is this supposed to be
> referencing the LCPLL clock registers in DMU?  If so, there is already
> a driver in there for this (see drivers/clk/bcm/clk-nsp.c).

This patch is for BCM53573 family, not BCM4708 family you are looking at.

Found chip with id 53573, rev 0x02 and package 0x01
Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x36, class 0x0)
Core 1 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
Core 2 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x05, class 0x0)
Core 3 found: ARM CA7 (manuf 0x4BF, id 0x847, rev 0x00, class 0x0)
Core 4 found: USB 2.0 Host (manuf 0x4BF, id 0x819, rev 0x05, class 0x0)
Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
Core 6 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
Core 7 found: CNDS DDR2/3 memory controller (manuf 0x4BF, id 0x846,
rev 0x00, class 0x0)
Core 8 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01, class 0x0)
Core 9 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
Core 10 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
Core 11 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
Core 12 found: GCI (manuf 0x4BF, id 0x840, rev 0x08, class 0x0)
Core 13 found: PMU (manuf 0x4BF, id 0x827, rev 0x1C, class 0x0)

Re: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[Ray Jui]

On 8/10/2016 10:28 AM, Rafał Miłecki wrote:
> On 10 August 2016 at 19:22, Jon Mason <jon.mason@broadcom.com> wrote:
>> On Wed, Aug 10, 2016 at 8:05 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>>> diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>> new file mode 100644
>>> index 0000000..a18c73f
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>> @@ -0,0 +1,40 @@
>>> +Broadcom Northstar ILP clock
>>> +============================
>>> +
>>> +This binding uses the common clock binding:
>>> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
>>> +
>>> +This binding is used for ILP clock (sometimes referred as "slow clock")
>>> +on Broadcom Northstar devices using Corex-A7 CPU.
>>> +
>>> +This clock is part of PMU (Power Management Unit), a Broadcom's device
>>> +handing power-related aspects. Please note PMU contains more subdevices,
>>> +ILP is only one of them.
>>> +
>>> +ILP's rate has to be calculated on runtime and it depends on ALP clock
>>> +which has to be referenced.
>>> +
>>> +Required properties:
>>> +- compatible: "brcm,ns-ilp"
>>> +- reg: iomem address range of PMU (Power Management Unit)
>>> +- reg-names: "pmu", the only needed & supported reg right now
>>> +- clocks: has to reference an ALP clock
>>> +- #clock-cells: should be <0>
>>> +
>>> +Example:
>>> +
>>> +pmu@18012000 {
>>> +       compatible = "simple-bus";
>>> +       ranges = <0x00000000 0x18012000 0x00001000>;
>>
>> I don't see a corresponding DT entry in this patch, but 18012000 is
>> the PCI block.  So, I am concerned this will collide if used there.
>>
>> I looked at the NS register reference guide, and I cannot find the
>> registers you are trying to reference.  Is this supposed to be
>> referencing the LCPLL clock registers in DMU?  If so, there is already
>> a driver in there for this (see drivers/clk/bcm/clk-nsp.c).
>
> This patch is for BCM53573 family, not BCM4708 family you are looking at.
>
> Found chip with id 53573, rev 0x02 and package 0x01
> Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x36, class 0x0)
> Core 1 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
> Core 2 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x05, class 0x0)
> Core 3 found: ARM CA7 (manuf 0x4BF, id 0x847, rev 0x00, class 0x0)
> Core 4 found: USB 2.0 Host (manuf 0x4BF, id 0x819, rev 0x05, class 0x0)
> Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
> Core 6 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
> Core 7 found: CNDS DDR2/3 memory controller (manuf 0x4BF, id 0x846,
> rev 0x00, class 0x0)
> Core 8 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01, class 0x0)
> Core 9 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
> Core 10 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
> Core 11 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
> Core 12 found: GCI (manuf 0x4BF, id 0x840, rev 0x08, class 0x0)
> Core 13 found: PMU (manuf 0x4BF, id 0x827, rev 0x1C, class 0x0)
>

Out of curiosity, I searched the datasheet and found this is a wireless 
router SoC done by the WLAN team. It happens to share some peripherals 
with other iProc based SoCs.

I cannot find a code name for this SoC from our internal documents. I 
guess that name "Northstar" used here has confused both Jon and me.

Thanks,

Ray

Re: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[Jon Mason]

On Wed, Aug 10, 2016 at 1:44 PM, Ray Jui <ray.jui@broadcom.com> wrote:
>
>
> On 8/10/2016 10:28 AM, Rafał Miłecki wrote:
>>
>> On 10 August 2016 at 19:22, Jon Mason <jon.mason@broadcom.com> wrote:
>>>
>>> On Wed, Aug 10, 2016 at 8:05 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>> b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>> new file mode 100644
>>>> index 0000000..a18c73f
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>> @@ -0,0 +1,40 @@
>>>> +Broadcom Northstar ILP clock
>>>> +============================
>>>> +
>>>> +This binding uses the common clock binding:
>>>> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
>>>> +
>>>> +This binding is used for ILP clock (sometimes referred as "slow clock")
>>>> +on Broadcom Northstar devices using Corex-A7 CPU.
>>>> +
>>>> +This clock is part of PMU (Power Management Unit), a Broadcom's device
>>>> +handing power-related aspects. Please note PMU contains more
>>>> subdevices,
>>>> +ILP is only one of them.
>>>> +
>>>> +ILP's rate has to be calculated on runtime and it depends on ALP clock
>>>> +which has to be referenced.
>>>> +
>>>> +Required properties:
>>>> +- compatible: "brcm,ns-ilp"
>>>> +- reg: iomem address range of PMU (Power Management Unit)
>>>> +- reg-names: "pmu", the only needed & supported reg right now
>>>> +- clocks: has to reference an ALP clock
>>>> +- #clock-cells: should be <0>
>>>> +
>>>> +Example:
>>>> +
>>>> +pmu@18012000 {
>>>> +       compatible = "simple-bus";
>>>> +       ranges = <0x00000000 0x18012000 0x00001000>;
>>>
>>>
>>> I don't see a corresponding DT entry in this patch, but 18012000 is
>>> the PCI block.  So, I am concerned this will collide if used there.
>>>
>>> I looked at the NS register reference guide, and I cannot find the
>>> registers you are trying to reference.  Is this supposed to be
>>> referencing the LCPLL clock registers in DMU?  If so, there is already
>>> a driver in there for this (see drivers/clk/bcm/clk-nsp.c).
>>
>>
>> This patch is for BCM53573 family, not BCM4708 family you are looking at.
>>
>> Found chip with id 53573, rev 0x02 and package 0x01
>> Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x36, class 0x0)
>> Core 1 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
>> Core 2 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x05, class 0x0)
>> Core 3 found: ARM CA7 (manuf 0x4BF, id 0x847, rev 0x00, class 0x0)
>> Core 4 found: USB 2.0 Host (manuf 0x4BF, id 0x819, rev 0x05, class 0x0)
>> Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
>> Core 6 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
>> Core 7 found: CNDS DDR2/3 memory controller (manuf 0x4BF, id 0x846,
>> rev 0x00, class 0x0)
>> Core 8 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01,
>> class 0x0)
>> Core 9 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
>> Core 10 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
>> Core 11 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
>> Core 12 found: GCI (manuf 0x4BF, id 0x840, rev 0x08, class 0x0)
>> Core 13 found: PMU (manuf 0x4BF, id 0x827, rev 0x1C, class 0x0)
>>
>
> Out of curiosity, I searched the datasheet and found this is a wireless
> router SoC done by the WLAN team. It happens to share some peripherals with
> other iProc based SoCs.
>
> I cannot find a code name for this SoC from our internal documents. I guess
> that name "Northstar" used here has confused both Jon and me.
>
> Thanks,
>
> Ray

Ray is right.  I just spoke to one of the people here with knowledge
of the HW, and this is not related at all to the 4708/9/5301X.  It MAY
have some of the same peripherals, but the core is different (Cortex
A7 instead of A9).

I think we are best off to change the name and turn this into a
separate device tree, driver base, etc.  I wasn't able to get a code
name, so perhaps simply call it "BCM53573".

Thanks,
Jon

Re: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[Rafał Miłecki]

On 10 August 2016 at 20:21, Jon Mason <jon.mason@broadcom.com> wrote:
> On Wed, Aug 10, 2016 at 1:44 PM, Ray Jui <ray.jui@broadcom.com> wrote:
>> On 8/10/2016 10:28 AM, Rafał Miłecki wrote:
>>>
>>> On 10 August 2016 at 19:22, Jon Mason <jon.mason@broadcom.com> wrote:
>>>>
>>>> On Wed, Aug 10, 2016 at 8:05 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>> b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>> new file mode 100644
>>>>> index 0000000..a18c73f
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>> @@ -0,0 +1,40 @@
>>>>> +Broadcom Northstar ILP clock
>>>>> +============================
>>>>> +
>>>>> +This binding uses the common clock binding:
>>>>> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
>>>>> +
>>>>> +This binding is used for ILP clock (sometimes referred as "slow clock")
>>>>> +on Broadcom Northstar devices using Corex-A7 CPU.
>>>>> +
>>>>> +This clock is part of PMU (Power Management Unit), a Broadcom's device
>>>>> +handing power-related aspects. Please note PMU contains more
>>>>> subdevices,
>>>>> +ILP is only one of them.
>>>>> +
>>>>> +ILP's rate has to be calculated on runtime and it depends on ALP clock
>>>>> +which has to be referenced.
>>>>> +
>>>>> +Required properties:
>>>>> +- compatible: "brcm,ns-ilp"
>>>>> +- reg: iomem address range of PMU (Power Management Unit)
>>>>> +- reg-names: "pmu", the only needed & supported reg right now
>>>>> +- clocks: has to reference an ALP clock
>>>>> +- #clock-cells: should be <0>
>>>>> +
>>>>> +Example:
>>>>> +
>>>>> +pmu@18012000 {
>>>>> +       compatible = "simple-bus";
>>>>> +       ranges = <0x00000000 0x18012000 0x00001000>;
>>>>
>>>>
>>>> I don't see a corresponding DT entry in this patch, but 18012000 is
>>>> the PCI block.  So, I am concerned this will collide if used there.
>>>>
>>>> I looked at the NS register reference guide, and I cannot find the
>>>> registers you are trying to reference.  Is this supposed to be
>>>> referencing the LCPLL clock registers in DMU?  If so, there is already
>>>> a driver in there for this (see drivers/clk/bcm/clk-nsp.c).
>>>
>>>
>>> This patch is for BCM53573 family, not BCM4708 family you are looking at.
>>>
>>> Found chip with id 53573, rev 0x02 and package 0x01
>>> Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x36, class 0x0)
>>> Core 1 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
>>> Core 2 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x05, class 0x0)
>>> Core 3 found: ARM CA7 (manuf 0x4BF, id 0x847, rev 0x00, class 0x0)
>>> Core 4 found: USB 2.0 Host (manuf 0x4BF, id 0x819, rev 0x05, class 0x0)
>>> Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
>>> Core 6 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
>>> Core 7 found: CNDS DDR2/3 memory controller (manuf 0x4BF, id 0x846,
>>> rev 0x00, class 0x0)
>>> Core 8 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01,
>>> class 0x0)
>>> Core 9 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
>>> Core 10 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
>>> Core 11 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
>>> Core 12 found: GCI (manuf 0x4BF, id 0x840, rev 0x08, class 0x0)
>>> Core 13 found: PMU (manuf 0x4BF, id 0x827, rev 0x1C, class 0x0)
>>>
>>
>> Out of curiosity, I searched the datasheet and found this is a wireless
>> router SoC done by the WLAN team. It happens to share some peripherals with
>> other iProc based SoCs.
>>
>> I cannot find a code name for this SoC from our internal documents. I guess
>> that name "Northstar" used here has confused both Jon and me.
>
> Ray is right.  I just spoke to one of the people here with knowledge
> of the HW, and this is not related at all to the 4708/9/5301X.  It MAY
> have some of the same peripherals, but the core is different (Cortex
> A7 instead of A9).
>
> I think we are best off to change the name and turn this into a
> separate device tree, driver base, etc.  I wasn't able to get a code
> name, so perhaps simply call it "BCM53573".

Yes, I said clearly it uses Corex-A7 in the commit message and
Documentation entry.

Florian already shared his doubts about BCM53573 belonging to the
Northstar, but I found out [1] that your (Broadcom's) SDK treats it as
Northstar device:

Asus RT-AC1200G+

# cat /proc/cpuinfo
Processor : ARMv7 Processor rev 5 (v7l)
BogoMIPS : 1795.68
Features : swp half thumb fastmult edsp
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc07
CPU revision : 5

Hardware : Northstar Prototype
Revision : 0000
Serial : 0000000000000000


It seems Broadcom's WLAN team claims it's a Northstar and you claim
it's not. Could you discuss this internally and let us know, please?

[1] https://lkml.org/lkml/2016/7/29/345

-- 
Rafał

Re: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[Jon Mason]

On Thu, Aug 11, 2016 at 4:49 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
> On 10 August 2016 at 20:21, Jon Mason <jon.mason@broadcom.com> wrote:
>> On Wed, Aug 10, 2016 at 1:44 PM, Ray Jui <ray.jui@broadcom.com> wrote:
>>> On 8/10/2016 10:28 AM, Rafał Miłecki wrote:
>>>>
>>>> On 10 August 2016 at 19:22, Jon Mason <jon.mason@broadcom.com> wrote:
>>>>>
>>>>> On Wed, Aug 10, 2016 at 8:05 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>>> b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>>> new file mode 100644
>>>>>> index 0000000..a18c73f
>>>>>> --- /dev/null
>>>>>> +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>>> @@ -0,0 +1,40 @@
>>>>>> +Broadcom Northstar ILP clock
>>>>>> +============================
>>>>>> +
>>>>>> +This binding uses the common clock binding:
>>>>>> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
>>>>>> +
>>>>>> +This binding is used for ILP clock (sometimes referred as "slow clock")
>>>>>> +on Broadcom Northstar devices using Corex-A7 CPU.
>>>>>> +
>>>>>> +This clock is part of PMU (Power Management Unit), a Broadcom's device
>>>>>> +handing power-related aspects. Please note PMU contains more
>>>>>> subdevices,
>>>>>> +ILP is only one of them.
>>>>>> +
>>>>>> +ILP's rate has to be calculated on runtime and it depends on ALP clock
>>>>>> +which has to be referenced.
>>>>>> +
>>>>>> +Required properties:
>>>>>> +- compatible: "brcm,ns-ilp"
>>>>>> +- reg: iomem address range of PMU (Power Management Unit)
>>>>>> +- reg-names: "pmu", the only needed & supported reg right now
>>>>>> +- clocks: has to reference an ALP clock
>>>>>> +- #clock-cells: should be <0>
>>>>>> +
>>>>>> +Example:
>>>>>> +
>>>>>> +pmu@18012000 {
>>>>>> +       compatible = "simple-bus";
>>>>>> +       ranges = <0x00000000 0x18012000 0x00001000>;
>>>>>
>>>>>
>>>>> I don't see a corresponding DT entry in this patch, but 18012000 is
>>>>> the PCI block.  So, I am concerned this will collide if used there.
>>>>>
>>>>> I looked at the NS register reference guide, and I cannot find the
>>>>> registers you are trying to reference.  Is this supposed to be
>>>>> referencing the LCPLL clock registers in DMU?  If so, there is already
>>>>> a driver in there for this (see drivers/clk/bcm/clk-nsp.c).
>>>>
>>>>
>>>> This patch is for BCM53573 family, not BCM4708 family you are looking at.
>>>>
>>>> Found chip with id 53573, rev 0x02 and package 0x01
>>>> Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x36, class 0x0)
>>>> Core 1 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
>>>> Core 2 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x05, class 0x0)
>>>> Core 3 found: ARM CA7 (manuf 0x4BF, id 0x847, rev 0x00, class 0x0)
>>>> Core 4 found: USB 2.0 Host (manuf 0x4BF, id 0x819, rev 0x05, class 0x0)
>>>> Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
>>>> Core 6 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
>>>> Core 7 found: CNDS DDR2/3 memory controller (manuf 0x4BF, id 0x846,
>>>> rev 0x00, class 0x0)
>>>> Core 8 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01,
>>>> class 0x0)
>>>> Core 9 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
>>>> Core 10 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
>>>> Core 11 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
>>>> Core 12 found: GCI (manuf 0x4BF, id 0x840, rev 0x08, class 0x0)
>>>> Core 13 found: PMU (manuf 0x4BF, id 0x827, rev 0x1C, class 0x0)
>>>>
>>>
>>> Out of curiosity, I searched the datasheet and found this is a wireless
>>> router SoC done by the WLAN team. It happens to share some peripherals with
>>> other iProc based SoCs.
>>>
>>> I cannot find a code name for this SoC from our internal documents. I guess
>>> that name "Northstar" used here has confused both Jon and me.
>>
>> Ray is right.  I just spoke to one of the people here with knowledge
>> of the HW, and this is not related at all to the 4708/9/5301X.  It MAY
>> have some of the same peripherals, but the core is different (Cortex
>> A7 instead of A9).
>>
>> I think we are best off to change the name and turn this into a
>> separate device tree, driver base, etc.  I wasn't able to get a code
>> name, so perhaps simply call it "BCM53573".
>
> Yes, I said clearly it uses Corex-A7 in the commit message and
> Documentation entry.
>
> Florian already shared his doubts about BCM53573 belonging to the
> Northstar, but I found out [1] that your (Broadcom's) SDK treats it as
> Northstar device:
>
> Asus RT-AC1200G+
>
> # cat /proc/cpuinfo
> Processor : ARMv7 Processor rev 5 (v7l)
> BogoMIPS : 1795.68
> Features : swp half thumb fastmult edsp
> CPU implementer : 0x41
> CPU architecture: 7
> CPU variant : 0x0
> CPU part : 0xc07
> CPU revision : 5
>
> Hardware : Northstar Prototype
> Revision : 0000
> Serial : 0000000000000000
>
>
> It seems Broadcom's WLAN team claims it's a Northstar and you claim
> it's not. Could you discuss this internally and let us know, please?

I discussed it with a member of the WLAN team prior to my previous
email, which is why I made the previous statement.  It is a completely
different SoC than the 5301x family.  It appears that someone in
Marketing decided to reuse the name without discussing it with anyone
in WLAN SW.  It is a completely different family of products than the
iProc Northstar.  If we want to use the Northstar name, then perhaps
we could call it something like "WLAN Northstar".  Either way, it
needs to have a different mach-bcm entry.

BTW, neither Ray, nor I, (and not even Florian) are in the WLAN
Business unit.  So, the best that we can do is to ask around
internally and try to provide as much help as possible.

Thanks,
Jon

>
> [1] https://lkml.org/lkml/2016/7/29/345
>
> --
> Rafał

Re: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock

[Rafał Miłecki]

On 11 August 2016 at 16:25, Jon Mason <jon.mason@broadcom.com> wrote:
> On Thu, Aug 11, 2016 at 4:49 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>> On 10 August 2016 at 20:21, Jon Mason <jon.mason@broadcom.com> wrote:
>>> On Wed, Aug 10, 2016 at 1:44 PM, Ray Jui <ray.jui@broadcom.com> wrote:
>>>> On 8/10/2016 10:28 AM, Rafał Miłecki wrote:
>>>>>
>>>>> On 10 August 2016 at 19:22, Jon Mason <jon.mason@broadcom.com> wrote:
>>>>>>
>>>>>> On Wed, Aug 10, 2016 at 8:05 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
>>>>>>>
>>>>>>> diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>>>> b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>>>> new file mode 100644
>>>>>>> index 0000000..a18c73f
>>>>>>> --- /dev/null
>>>>>>> +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>>>>>> @@ -0,0 +1,40 @@
>>>>>>> +Broadcom Northstar ILP clock
>>>>>>> +============================
>>>>>>> +
>>>>>>> +This binding uses the common clock binding:
>>>>>>> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
>>>>>>> +
>>>>>>> +This binding is used for ILP clock (sometimes referred as "slow clock")
>>>>>>> +on Broadcom Northstar devices using Corex-A7 CPU.
>>>>>>> +
>>>>>>> +This clock is part of PMU (Power Management Unit), a Broadcom's device
>>>>>>> +handing power-related aspects. Please note PMU contains more
>>>>>>> subdevices,
>>>>>>> +ILP is only one of them.
>>>>>>> +
>>>>>>> +ILP's rate has to be calculated on runtime and it depends on ALP clock
>>>>>>> +which has to be referenced.
>>>>>>> +
>>>>>>> +Required properties:
>>>>>>> +- compatible: "brcm,ns-ilp"
>>>>>>> +- reg: iomem address range of PMU (Power Management Unit)
>>>>>>> +- reg-names: "pmu", the only needed & supported reg right now
>>>>>>> +- clocks: has to reference an ALP clock
>>>>>>> +- #clock-cells: should be <0>
>>>>>>> +
>>>>>>> +Example:
>>>>>>> +
>>>>>>> +pmu@18012000 {
>>>>>>> +       compatible = "simple-bus";
>>>>>>> +       ranges = <0x00000000 0x18012000 0x00001000>;
>>>>>>
>>>>>>
>>>>>> I don't see a corresponding DT entry in this patch, but 18012000 is
>>>>>> the PCI block.  So, I am concerned this will collide if used there.
>>>>>>
>>>>>> I looked at the NS register reference guide, and I cannot find the
>>>>>> registers you are trying to reference.  Is this supposed to be
>>>>>> referencing the LCPLL clock registers in DMU?  If so, there is already
>>>>>> a driver in there for this (see drivers/clk/bcm/clk-nsp.c).
>>>>>
>>>>>
>>>>> This patch is for BCM53573 family, not BCM4708 family you are looking at.
>>>>>
>>>>> Found chip with id 53573, rev 0x02 and package 0x01
>>>>> Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x36, class 0x0)
>>>>> Core 1 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
>>>>> Core 2 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x05, class 0x0)
>>>>> Core 3 found: ARM CA7 (manuf 0x4BF, id 0x847, rev 0x00, class 0x0)
>>>>> Core 4 found: USB 2.0 Host (manuf 0x4BF, id 0x819, rev 0x05, class 0x0)
>>>>> Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
>>>>> Core 6 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
>>>>> Core 7 found: CNDS DDR2/3 memory controller (manuf 0x4BF, id 0x846,
>>>>> rev 0x00, class 0x0)
>>>>> Core 8 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01,
>>>>> class 0x0)
>>>>> Core 9 found: IEEE 802.11 (manuf 0x4BF, id 0x812, rev 0x38, class 0x0)
>>>>> Core 10 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x08, class 0x0)
>>>>> Core 11 found: I2S (manuf 0x4BF, id 0x834, rev 0x06, class 0x0)
>>>>> Core 12 found: GCI (manuf 0x4BF, id 0x840, rev 0x08, class 0x0)
>>>>> Core 13 found: PMU (manuf 0x4BF, id 0x827, rev 0x1C, class 0x0)
>>>>>
>>>>
>>>> Out of curiosity, I searched the datasheet and found this is a wireless
>>>> router SoC done by the WLAN team. It happens to share some peripherals with
>>>> other iProc based SoCs.
>>>>
>>>> I cannot find a code name for this SoC from our internal documents. I guess
>>>> that name "Northstar" used here has confused both Jon and me.
>>>
>>> Ray is right.  I just spoke to one of the people here with knowledge
>>> of the HW, and this is not related at all to the 4708/9/5301X.  It MAY
>>> have some of the same peripherals, but the core is different (Cortex
>>> A7 instead of A9).
>>>
>>> I think we are best off to change the name and turn this into a
>>> separate device tree, driver base, etc.  I wasn't able to get a code
>>> name, so perhaps simply call it "BCM53573".
>>
>> Yes, I said clearly it uses Corex-A7 in the commit message and
>> Documentation entry.
>>
>> Florian already shared his doubts about BCM53573 belonging to the
>> Northstar, but I found out [1] that your (Broadcom's) SDK treats it as
>> Northstar device:
>>
>> Asus RT-AC1200G+
>>
>> # cat /proc/cpuinfo
>> Processor : ARMv7 Processor rev 5 (v7l)
>> BogoMIPS : 1795.68
>> Features : swp half thumb fastmult edsp
>> CPU implementer : 0x41
>> CPU architecture: 7
>> CPU variant : 0x0
>> CPU part : 0xc07
>> CPU revision : 5
>>
>> Hardware : Northstar Prototype
>> Revision : 0000
>> Serial : 0000000000000000
>>
>>
>> It seems Broadcom's WLAN team claims it's a Northstar and you claim
>> it's not. Could you discuss this internally and let us know, please?
>
> I discussed it with a member of the WLAN team prior to my previous
> email, which is why I made the previous statement.  It is a completely
> different SoC than the 5301x family.  It appears that someone in
> Marketing decided to reuse the name without discussing it with anyone
> in WLAN SW.  It is a completely different family of products than the
> iProc Northstar.  If we want to use the Northstar name, then perhaps
> we could call it something like "WLAN Northstar".  Either way, it
> needs to have a different mach-bcm entry.

Sorry, it wasn't clear to me initially, thanks for clarification. I'll
resend using different prefix.

-- 
Rafał

[PATCH V4] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

From: Rafał Miłecki <rafal@milecki.pl>

This clock is present on BCM53573 devices (including BCM47189) that use
Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should
be defined as one of its subnodes (subdevices). For more details see
Documentation entry.

Unfortunately there isn't a set of registers related to ILP clock only.
We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
"retention*" and "control_ext" regs. This is why this driver maps all
0x1000 B of space.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
V2: Rebase on top of clk-next
    Use ALP as parent clock
    Improve comments
    Switch from ioremap_nocache to ioremap
    Check of_clk_add_provide result for error
V3: Drop #include <linux/moduleh>
    Make ILP DT entry part of PMU
    Describe ILP as subdevice of PMU in Documentation
V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
    (even if used in some resources) should be used in relation to
    Cortex-A9 devices only.
---
 .../bindings/clock/brcm,bcm53573-ilp.txt           |  40 ++++++
 drivers/clk/bcm/Makefile                           |   1 +
 drivers/clk/bcm/clk-bcm53573-ilp.c                 | 146 +++++++++++++++++++++
 3 files changed, 187 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
 create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
new file mode 100644
index 0000000..73f7d2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
@@ -0,0 +1,40 @@
+Broadcom BCM53573 ILP clock
+===========================
+
+This binding uses the common clock binding:
+    Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+This binding is used for ILP clock (sometimes referred as "slow clock")
+on Broadcom BCM53573 devices using Cortex-A7 CPU.
+
+This clock is part of PMU (Power Management Unit), a Broadcom's device
+handing power-related aspects. Please note PMU contains more subdevices,
+ILP is only one of them.
+
+ILP's rate has to be calculated on runtime and it depends on ALP clock
+which has to be referenced.
+
+Required properties:
+- compatible: "brcm,ns-ilp"
+- reg: iomem address range of PMU (Power Management Unit)
+- reg-names: "pmu", the only needed & supported reg right now
+- clocks: has to reference an ALP clock
+- #clock-cells: should be <0>
+
+Example:
+
+pmu@18012000 {
+	compatible = "simple-bus";
+	ranges = <0x00000000 0x18012000 0x00001000>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	ilp: ilp@0 {
+		compatible = "brcm,ns-ilp";
+		reg = <0 0x1000>;
+		reg-names = "pmu";
+		clocks = <&alp>;
+		#clock-cells = <0>;
+		clock-output-names = "ilp";
+	};
+};
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 1d79bd2..4b8c56d 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-ns2.o
 obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
 obj-$(CONFIG_ARCH_BCM_NSP)	+= clk-nsp.o
 obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-nsp.o
+obj-$(CONFIG_ARCH_BCM_53573)	+= clk-bcm53573-ilp.o
diff --git a/drivers/clk/bcm/clk-bcm53573-ilp.c b/drivers/clk/bcm/clk-bcm53573-ilp.c
new file mode 100644
index 0000000..53b4a23
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+#define PMU_XTAL_FREQ_RATIO			0x66c
+#define  XTAL_ALP_PER_4ILP			0x00001fff
+#define  XTAL_CTL_EN				0x80000000
+#define PMU_SLOW_CLK_PERIOD			0x6dc
+
+struct ns_ilp {
+	struct clk *clk;
+	struct clk_hw hw;
+	void __iomem *pmu;
+};
+
+static int ns_ilp_enable(struct clk_hw *hw)
+{
+	struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw);
+
+	writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
+	writel(0x10000, ilp->pmu + 0x674);
+
+	return 0;
+}
+
+static unsigned long ns_ilp_recalc_rate(struct clk_hw *hw,
+					unsigned long parent_rate)
+{
+	struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw);
+	void __iomem *pmu = ilp->pmu;
+	u32 last_val, cur_val;
+	u32 sum = 0, num = 0, loop_num = 0;
+	u32 avg;
+
+	/* Enable measurement */
+	writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
+
+	/* Read initial value */
+	last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
+
+	/*
+	 * At minimum we should loop for a bit to let hardware do the
+	 * measurement. This isn't very accurate however, so for a better
+	 * precision lets try getting 20 different values for and use average.
+	 */
+	while (num < 20) {
+		cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
+
+		if (cur_val != last_val) {
+			/* Got different value, use it */
+			sum += cur_val;
+			num++;
+			loop_num = 0;
+			last_val = cur_val;
+		} else if (++loop_num > 5000) {
+			/* Same value over and over, give up */
+			sum += cur_val;
+			num++;
+			break;
+		}
+	}
+
+	/* Disable measurement to save power */
+	writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
+
+	avg = sum / num;
+
+	return parent_rate * 4 / avg;
+}
+
+static const struct clk_ops ns_ilp_clk_ops = {
+	.enable = ns_ilp_enable,
+	.recalc_rate = ns_ilp_recalc_rate,
+};
+
+static void ns_ilp_init(struct device_node *np)
+{
+	struct ns_ilp *ilp;
+	struct resource res;
+	struct clk_init_data init = { 0 };
+	const char *parent_name;
+	int index;
+	int err;
+
+	ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
+	if (!ilp)
+		return;
+
+	parent_name = of_clk_get_parent_name(np, 0);
+	if (!parent_name) {
+		err = -ENOENT;
+		goto err_free_ilp;
+	}
+
+	/* TODO: This looks generic, try making it OF helper. */
+	index = of_property_match_string(np, "reg-names", "pmu");
+	if (index < 0) {
+		err = index;
+		goto err_free_ilp;
+	}
+	err = of_address_to_resource(np, index, &res);
+	if (err)
+		goto err_free_ilp;
+	ilp->pmu = ioremap(res.start, resource_size(&res));
+	if (IS_ERR(ilp->pmu)) {
+		err = PTR_ERR(ilp->pmu);
+		goto err_free_ilp;
+	}
+
+	init.name = np->name;
+	init.ops = &ns_ilp_clk_ops;
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+
+	ilp->hw.init = &init;
+	ilp->clk = clk_register(NULL, &ilp->hw);
+	if (WARN_ON(IS_ERR(ilp->clk)))
+		goto err_unmap_pmu;
+
+	err = of_clk_add_provider(np, of_clk_src_simple_get, ilp->clk);
+	if (err)
+		goto err_clk_unregister;
+
+	return;
+
+err_clk_unregister:
+	clk_unregister(ilp->clk);
+err_unmap_pmu:
+	iounmap(ilp->pmu);
+err_free_ilp:
+	kfree(ilp);
+	pr_err("Failed to init ILP clock: %d\n", err);
+}
+CLK_OF_DECLARE(ns_ilp_clk, "brcm,ns-ilp", ns_ilp_init);
-- 
2.9.3

[PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

From: Rafał Miłecki <rafal@milecki.pl>

This clock is present on BCM53573 devices (including BCM47189) that use
Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should
be defined as one of its subnodes (subdevices). For more details see
Documentation entry.

Unfortunately there isn't a set of registers related to ILP clock only.
We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
"retention*" and "control_ext" regs. This is why this driver maps all
0x1000 B of space.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
V2: Rebase on top of clk-next
    Use ALP as parent clock
    Improve comments
    Switch from ioremap_nocache to ioremap
    Check of_clk_add_provide result for error
V3: Drop #include <linux/moduleh>
    Make ILP DT entry part of PMU
    Describe ILP as subdevice of PMU in Documentation
V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
    (even if used in some resources) should be used in relation to
    Cortex-A9 devices only.
V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too
    early.
---
 .../bindings/clock/brcm,bcm53573-ilp.txt           |  40 ++++++
 drivers/clk/bcm/Makefile                           |   1 +
 drivers/clk/bcm/clk-bcm53573-ilp.c                 | 146 +++++++++++++++++++++
 3 files changed, 187 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
 create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
new file mode 100644
index 0000000..5ab3107
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
@@ -0,0 +1,40 @@
+Broadcom BCM53573 ILP clock
+===========================
+
+This binding uses the common clock binding:
+    Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+This binding is used for ILP clock (sometimes referred as "slow clock")
+on Broadcom BCM53573 devices using Cortex-A7 CPU.
+
+This clock is part of PMU (Power Management Unit), a Broadcom's device
+handing power-related aspects. Please note PMU contains more subdevices,
+ILP is only one of them.
+
+ILP's rate has to be calculated on runtime and it depends on ALP clock
+which has to be referenced.
+
+Required properties:
+- compatible: "brcm,bcm53573-ilp"
+- reg: iomem address range of PMU (Power Management Unit)
+- reg-names: "pmu", the only needed & supported reg right now
+- clocks: has to reference an ALP clock
+- #clock-cells: should be <0>
+
+Example:
+
+pmu@18012000 {
+	compatible = "simple-bus";
+	ranges = <0x00000000 0x18012000 0x00001000>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	ilp: ilp@0 {
+		compatible = "brcm,bcm53573-ilp";
+		reg = <0 0x1000>;
+		reg-names = "pmu";
+		clocks = <&alp>;
+		#clock-cells = <0>;
+		clock-output-names = "ilp";
+	};
+};
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 1d79bd2..4b8c56d 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-ns2.o
 obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
 obj-$(CONFIG_ARCH_BCM_NSP)	+= clk-nsp.o
 obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-nsp.o
+obj-$(CONFIG_ARCH_BCM_53573)	+= clk-bcm53573-ilp.o
diff --git a/drivers/clk/bcm/clk-bcm53573-ilp.c b/drivers/clk/bcm/clk-bcm53573-ilp.c
new file mode 100644
index 0000000..b7ac0eb
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+#define PMU_XTAL_FREQ_RATIO			0x66c
+#define  XTAL_ALP_PER_4ILP			0x00001fff
+#define  XTAL_CTL_EN				0x80000000
+#define PMU_SLOW_CLK_PERIOD			0x6dc
+
+struct bcm53573_ilp {
+	struct clk *clk;
+	struct clk_hw hw;
+	void __iomem *pmu;
+};
+
+static int bcm53573_ilp_enable(struct clk_hw *hw)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+
+	writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
+	writel(0x10000, ilp->pmu + 0x674);
+
+	return 0;
+}
+
+static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
+					      unsigned long parent_rate)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+	void __iomem *pmu = ilp->pmu;
+	u32 last_val, cur_val;
+	u32 sum = 0, num = 0, loop_num = 0;
+	u32 avg;
+
+	/* Enable measurement */
+	writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
+
+	/* Read initial value */
+	last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
+
+	/*
+	 * At minimum we should loop for a bit to let hardware do the
+	 * measurement. This isn't very accurate however, so for a better
+	 * precision lets try getting 20 different values for and use average.
+	 */
+	while (num < 20) {
+		cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
+
+		if (cur_val != last_val) {
+			/* Got different value, use it */
+			sum += cur_val;
+			num++;
+			loop_num = 0;
+			last_val = cur_val;
+		} else if (++loop_num > 5000) {
+			/* Same value over and over, give up */
+			sum += cur_val;
+			num++;
+			break;
+		}
+	}
+
+	/* Disable measurement to save power */
+	writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
+
+	avg = sum / num;
+
+	return parent_rate * 4 / avg;
+}
+
+static const struct clk_ops bcm53573_ilp_clk_ops = {
+	.enable = bcm53573_ilp_enable,
+	.recalc_rate = bcm53573_ilp_recalc_rate,
+};
+
+static void bcm53573_ilp_init(struct device_node *np)
+{
+	struct bcm53573_ilp *ilp;
+	struct resource res;
+	struct clk_init_data init = { 0 };
+	const char *parent_name;
+	int index;
+	int err;
+
+	ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
+	if (!ilp)
+		return;
+
+	parent_name = of_clk_get_parent_name(np, 0);
+	if (!parent_name) {
+		err = -ENOENT;
+		goto err_free_ilp;
+	}
+
+	/* TODO: This looks generic, try making it OF helper. */
+	index = of_property_match_string(np, "reg-names", "pmu");
+	if (index < 0) {
+		err = index;
+		goto err_free_ilp;
+	}
+	err = of_address_to_resource(np, index, &res);
+	if (err)
+		goto err_free_ilp;
+	ilp->pmu = ioremap(res.start, resource_size(&res));
+	if (IS_ERR(ilp->pmu)) {
+		err = PTR_ERR(ilp->pmu);
+		goto err_free_ilp;
+	}
+
+	init.name = np->name;
+	init.ops = &bcm53573_ilp_clk_ops;
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+
+	ilp->hw.init = &init;
+	ilp->clk = clk_register(NULL, &ilp->hw);
+	if (WARN_ON(IS_ERR(ilp->clk)))
+		goto err_unmap_pmu;
+
+	err = of_clk_add_provider(np, of_clk_src_simple_get, ilp->clk);
+	if (err)
+		goto err_clk_unregister;
+
+	return;
+
+err_clk_unregister:
+	clk_unregister(ilp->clk);
+err_unmap_pmu:
+	iounmap(ilp->pmu);
+err_free_ilp:
+	kfree(ilp);
+	pr_err("Failed to init ILP clock: %d\n", err);
+}
+CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);
-- 
2.9.3

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Rob Herring]

On Tue, Aug 23, 2016 at 08:25:59AM +0200, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> This clock is present on BCM53573 devices (including BCM47189) that use
> Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should
> be defined as one of its subnodes (subdevices). For more details see
> Documentation entry.
> 
> Unfortunately there isn't a set of registers related to ILP clock only.
> We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
> "retention*" and "control_ext" regs. This is why this driver maps all
> 0x1000 B of space.

Then describe the block as a syscon which has several functions of 
which clocks are one.

> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
> V2: Rebase on top of clk-next
>     Use ALP as parent clock
>     Improve comments
>     Switch from ioremap_nocache to ioremap
>     Check of_clk_add_provide result for error
> V3: Drop #include <linux/moduleh>
>     Make ILP DT entry part of PMU
>     Describe ILP as subdevice of PMU in Documentation
> V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
>     (even if used in some resources) should be used in relation to
>     Cortex-A9 devices only.
> V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too
>     early.
> ---
>  .../bindings/clock/brcm,bcm53573-ilp.txt           |  40 ++++++

Acked-by: Rob Herring <robh@kernel.org>

>  drivers/clk/bcm/Makefile                           |   1 +
>  drivers/clk/bcm/clk-bcm53573-ilp.c                 | 146 +++++++++++++++++++++
>  3 files changed, 187 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
>  create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c
> 
> diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
> new file mode 100644
> index 0000000..5ab3107
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
> @@ -0,0 +1,40 @@
> +Broadcom BCM53573 ILP clock
> +===========================
> +
> +This binding uses the common clock binding:
> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
> +
> +This binding is used for ILP clock (sometimes referred as "slow clock")
> +on Broadcom BCM53573 devices using Cortex-A7 CPU.
> +
> +This clock is part of PMU (Power Management Unit), a Broadcom's device
> +handing power-related aspects. Please note PMU contains more subdevices,
> +ILP is only one of them.
> +
> +ILP's rate has to be calculated on runtime and it depends on ALP clock
> +which has to be referenced.
> +
> +Required properties:
> +- compatible: "brcm,bcm53573-ilp"
> +- reg: iomem address range of PMU (Power Management Unit)
> +- reg-names: "pmu", the only needed & supported reg right now

right now? Please describe all of the h/w. You don't get to change it 
later.

Rob

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Stephen Boyd]

On 08/23, Rafał Miłecki wrote:
> diff --git a/drivers/clk/bcm/clk-bcm53573-ilp.c b/drivers/clk/bcm/clk-bcm53573-ilp.c
> new file mode 100644
> index 0000000..b7ac0eb
> --- /dev/null
> +++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
> @@ -0,0 +1,146 @@
> +/*
> + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/clk.h>

Is this include used?

> +#include <linux/clk-provider.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/slab.h>
> +
> +#define PMU_XTAL_FREQ_RATIO			0x66c
> +#define  XTAL_ALP_PER_4ILP			0x00001fff
> +#define  XTAL_CTL_EN				0x80000000
> +#define PMU_SLOW_CLK_PERIOD			0x6dc
> +
> +struct bcm53573_ilp {
> +	struct clk *clk;
> +	struct clk_hw hw;
> +	void __iomem *pmu;
> +};
> +
> +static int bcm53573_ilp_enable(struct clk_hw *hw)
> +{
> +	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
> +
> +	writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
> +	writel(0x10000, ilp->pmu + 0x674);

Is there a name for 0x674?
> +
> +	return 0;
> +}
> +
> +static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
> +					      unsigned long parent_rate)
> +{
> +	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
> +	void __iomem *pmu = ilp->pmu;
> +	u32 last_val, cur_val;
> +	u32 sum = 0, num = 0, loop_num = 0;

Should these just be plain ints? Do we care about sizes for these
variables?

> +	u32 avg;

This one too.

> +
> +	/* Enable measurement */
> +	writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
> +
> +	/* Read initial value */
> +	last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
> +
> +	/*
> +	 * At minimum we should loop for a bit to let hardware do the
> +	 * measurement. This isn't very accurate however, so for a better
> +	 * precision lets try getting 20 different values for and use average.
> +	 */
> +	while (num < 20) {
> +		cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
> +
> +		if (cur_val != last_val) {
> +			/* Got different value, use it */
> +			sum += cur_val;
> +			num++;
> +			loop_num = 0;
> +			last_val = cur_val;
> +		} else if (++loop_num > 5000) {
> +			/* Same value over and over, give up */
> +			sum += cur_val;
> +			num++;
> +			break;
> +		}

Should there be a udelay() here? Or we're expected to tight loop
read the hardware? If so we should throw in a cpu_relax() here to
indicate tight loop.

> +	}
> +
> +	/* Disable measurement to save power */
> +	writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
> +
> +	avg = sum / num;
> +
> +	return parent_rate * 4 / avg;
> +}
> +
> +static const struct clk_ops bcm53573_ilp_clk_ops = {
> +	.enable = bcm53573_ilp_enable,

No disable? Or .is_enabled?

> +	.recalc_rate = bcm53573_ilp_recalc_rate,
> +};
> +
> +static void bcm53573_ilp_init(struct device_node *np)
> +{
> +	struct bcm53573_ilp *ilp;
> +	struct resource res;
> +	struct clk_init_data init = { 0 };
> +	const char *parent_name;
> +	int index;
> +	int err;
> +
> +	ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
> +	if (!ilp)
> +		return;
> +
> +	parent_name = of_clk_get_parent_name(np, 0);
> +	if (!parent_name) {
> +		err = -ENOENT;
> +		goto err_free_ilp;
> +	}
> +
> +	/* TODO: This looks generic, try making it OF helper. */
> +	index = of_property_match_string(np, "reg-names", "pmu");
> +	if (index < 0) {
> +		err = index;
> +		goto err_free_ilp;
> +	}
> +	err = of_address_to_resource(np, index, &res);
> +	if (err)
> +		goto err_free_ilp;
> +	ilp->pmu = ioremap(res.start, resource_size(&res));
> +	if (IS_ERR(ilp->pmu)) {
> +		err = PTR_ERR(ilp->pmu);
> +		goto err_free_ilp;
> +	}
> +
> +	init.name = np->name;
> +	init.ops = &bcm53573_ilp_clk_ops;
> +	init.parent_names = &parent_name;
> +	init.num_parents = 1;
> +
> +	ilp->hw.init = &init;
> +	ilp->clk = clk_register(NULL, &ilp->hw);

please use clk_hw_register() and of_clk_add_hw_provider().

> +	if (WARN_ON(IS_ERR(ilp->clk)))
> +		goto err_unmap_pmu;
> +
> +	err = of_clk_add_provider(np, of_clk_src_simple_get, ilp->clk);
> +	if (err)
> +		goto err_clk_unregister;
> +
> +	return;
> +
> +err_clk_unregister:
> +	clk_unregister(ilp->clk);
> +err_unmap_pmu:
> +	iounmap(ilp->pmu);
> +err_free_ilp:
> +	kfree(ilp);
> +	pr_err("Failed to init ILP clock: %d\n", err);
> +}
> +CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);

Can this be a platform driver instead?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

On 23 August 2016 at 21:55, Rob Herring <robh@kernel.org> wrote:
> On Tue, Aug 23, 2016 at 08:25:59AM +0200, Rafał Miłecki wrote:
>> From: Rafał Miłecki <rafal@milecki.pl>
>>
>> This clock is present on BCM53573 devices (including BCM47189) that use
>> Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should
>> be defined as one of its subnodes (subdevices). For more details see
>> Documentation entry.
>>
>> Unfortunately there isn't a set of registers related to ILP clock only.
>> We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
>> "retention*" and "control_ext" regs. This is why this driver maps all
>> 0x1000 B of space.
>
> Then describe the block as a syscon which has several functions of
> which clocks are one.

This isn't clear to me, sorry, could you describe it? Would you like
me to update commit message or documentation? Is code fine as is?

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

On 24 August 2016 at 10:47, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 08/23, Rafał Miłecki wrote:
>> diff --git a/drivers/clk/bcm/clk-bcm53573-ilp.c b/drivers/clk/bcm/clk-bcm53573-ilp.c
>> new file mode 100644
>> index 0000000..b7ac0eb
>> --- /dev/null
>> +++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
>> @@ -0,0 +1,146 @@
>> +/*
>> + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/clk.h>
>
> Is this include used?

No. Good point.


>> +#include <linux/clk-provider.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/slab.h>
>> +
>> +#define PMU_XTAL_FREQ_RATIO                  0x66c
>> +#define  XTAL_ALP_PER_4ILP                   0x00001fff
>> +#define  XTAL_CTL_EN                         0x80000000
>> +#define PMU_SLOW_CLK_PERIOD                  0x6dc
>> +
>> +struct bcm53573_ilp {
>> +     struct clk *clk;
>> +     struct clk_hw hw;
>> +     void __iomem *pmu;
>> +};
>> +
>> +static int bcm53573_ilp_enable(struct clk_hw *hw)
>> +{
>> +     struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
>> +
>> +     writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
>> +     writel(0x10000, ilp->pmu + 0x674);
>
> Is there a name for 0x674?
>> +
>> +     return 0;
>> +}
>> +
>> +static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
>> +                                           unsigned long parent_rate)
>> +{
>> +     struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
>> +     void __iomem *pmu = ilp->pmu;
>> +     u32 last_val, cur_val;
>> +     u32 sum = 0, num = 0, loop_num = 0;
>
> Should these just be plain ints? Do we care about sizes for these
> variables?
>
>> +     u32 avg;
>
> This one too.

Right.


>> +
>> +     /* Enable measurement */
>> +     writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
>> +
>> +     /* Read initial value */
>> +     last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
>> +
>> +     /*
>> +      * At minimum we should loop for a bit to let hardware do the
>> +      * measurement. This isn't very accurate however, so for a better
>> +      * precision lets try getting 20 different values for and use average.
>> +      */
>> +     while (num < 20) {
>> +             cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
>> +
>> +             if (cur_val != last_val) {
>> +                     /* Got different value, use it */
>> +                     sum += cur_val;
>> +                     num++;
>> +                     loop_num = 0;
>> +                     last_val = cur_val;
>> +             } else if (++loop_num > 5000) {
>> +                     /* Same value over and over, give up */
>> +                     sum += cur_val;
>> +                     num++;
>> +                     break;
>> +             }
>
> Should there be a udelay() here? Or we're expected to tight loop
> read the hardware? If so we should throw in a cpu_relax() here to
> indicate tight loop.
>
>> +     }
>> +
>> +     /* Disable measurement to save power */
>> +     writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
>> +
>> +     avg = sum / num;
>> +
>> +     return parent_rate * 4 / avg;
>> +}
>> +
>> +static const struct clk_ops bcm53573_ilp_clk_ops = {
>> +     .enable = bcm53573_ilp_enable,
>
> No disable? Or .is_enabled?

The beauty of working without datasheets... I'll compare initial reg
state with one after enabling and see if there is sth obvious.


>> +     .recalc_rate = bcm53573_ilp_recalc_rate,
>> +};
>> +
>> +static void bcm53573_ilp_init(struct device_node *np)
>> +{
>> +     struct bcm53573_ilp *ilp;
>> +     struct resource res;
>> +     struct clk_init_data init = { 0 };
>> +     const char *parent_name;
>> +     int index;
>> +     int err;
>> +
>> +     ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
>> +     if (!ilp)
>> +             return;
>> +
>> +     parent_name = of_clk_get_parent_name(np, 0);
>> +     if (!parent_name) {
>> +             err = -ENOENT;
>> +             goto err_free_ilp;
>> +     }
>> +
>> +     /* TODO: This looks generic, try making it OF helper. */
>> +     index = of_property_match_string(np, "reg-names", "pmu");
>> +     if (index < 0) {
>> +             err = index;
>> +             goto err_free_ilp;
>> +     }
>> +     err = of_address_to_resource(np, index, &res);
>> +     if (err)
>> +             goto err_free_ilp;
>> +     ilp->pmu = ioremap(res.start, resource_size(&res));
>> +     if (IS_ERR(ilp->pmu)) {
>> +             err = PTR_ERR(ilp->pmu);
>> +             goto err_free_ilp;
>> +     }
>> +
>> +     init.name = np->name;
>> +     init.ops = &bcm53573_ilp_clk_ops;
>> +     init.parent_names = &parent_name;
>> +     init.num_parents = 1;
>> +
>> +     ilp->hw.init = &init;
>> +     ilp->clk = clk_register(NULL, &ilp->hw);
>
> please use clk_hw_register() and of_clk_add_hw_provider().

I wasn't aware of this API change, thanks.


>> +     if (WARN_ON(IS_ERR(ilp->clk)))
>> +             goto err_unmap_pmu;
>> +
>> +     err = of_clk_add_provider(np, of_clk_src_simple_get, ilp->clk);
>> +     if (err)
>> +             goto err_clk_unregister;
>> +
>> +     return;
>> +
>> +err_clk_unregister:
>> +     clk_unregister(ilp->clk);
>> +err_unmap_pmu:
>> +     iounmap(ilp->pmu);
>> +err_free_ilp:
>> +     kfree(ilp);
>> +     pr_err("Failed to init ILP clock: %d\n", err);
>> +}
>> +CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);
>
> Can this be a platform driver instead?

I guess it can. Should it? It's not clear to me when CLK_OF_DECLARE is
preferred and when it's not.

-- 
Rafał

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

On 24 August 2016 at 10:47, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 08/23, Rafał Miłecki wrote:
>> +static int bcm53573_ilp_enable(struct clk_hw *hw)
>> +{
>> +     struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
>> +
>> +     writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
>> +     writel(0x10000, ilp->pmu + 0x674);
>
> Is there a name for 0x674?

No in any sources published by Broadcom. I was experimenting with bit
0x10000 in PMU_SLOW_CLK_PERIOD and 0x10000 in 0x674. Both have to be
set. I was suspecting that maybe one of them is just some trigger and
it can be switched back to 0, but it's not the case. I definitely need
to set both of them to get clock working.

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Stephen Boyd]

On 08/25, Rafał Miłecki wrote:
> On 24 August 2016 at 10:47, Stephen Boyd <sboyd@codeaurora.org> wrote:
> > On 08/23, Rafał Miłecki wrote:
> >> +     }
> >> +
> >> +     /* Disable measurement to save power */
> >> +     writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
> >> +
> >> +     avg = sum / num;
> >> +
> >> +     return parent_rate * 4 / avg;
> >> +}
> >> +
> >> +static const struct clk_ops bcm53573_ilp_clk_ops = {
> >> +     .enable = bcm53573_ilp_enable,
> >
> > No disable? Or .is_enabled?
> 
> The beauty of working without datasheets... I'll compare initial reg
> state with one after enabling and see if there is sth obvious.
> 
> 

Ok.

> >
> > Can this be a platform driver instead?
> 
> I guess it can. Should it? It's not clear to me when CLK_OF_DECLARE is
> preferred and when it's not.

We've been taking an approach of using CLK_OF_DECLARE() for clks
that must be registered for timers and interrupt controllers (as
these things are done before the device model is initialized),
and struct drivers otherwise. If the DT node has a mix of
timer/interrupt controller clks and other clks then
CLK_OF_DECLARE_DRIVER() can be used and then we can still have a
builtin driver.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Stephen Boyd]

On 08/25, Rafał Miłecki wrote:
> On 24 August 2016 at 10:47, Stephen Boyd <sboyd@codeaurora.org> wrote:
> > On 08/23, Rafał Miłecki wrote:
> >> +static int bcm53573_ilp_enable(struct clk_hw *hw)
> >> +{
> >> +     struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
> >> +
> >> +     writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
> >> +     writel(0x10000, ilp->pmu + 0x674);
> >
> > Is there a name for 0x674?
> 
> No in any sources published by Broadcom. I was experimenting with bit
> 0x10000 in PMU_SLOW_CLK_PERIOD and 0x10000 in 0x674. Both have to be
> set. I was suspecting that maybe one of them is just some trigger and
> it can be switched back to 0, but it's not the case. I definitely need
> to set both of them to get clock working.

Ok no worries, raw number is fine.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH V6] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

From: Rafał Miłecki <rafal@milecki.pl>

This clock is present on BCM53573 devices (including BCM47189) that use
Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should
be defined as one of its subnodes (subdevices). For more details see
Documentation entry.

Unfortunately there isn't a set of registers related to ILP clock only.
We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
"retention*" and "control_ext" regs. This is why this driver maps all
0x1000 B of space.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
V2: Rebase on top of clk-next
    Use ALP as parent clock
    Improve comments
    Switch from ioremap_nocache to ioremap
    Check of_clk_add_provide result for error
V3: Drop #include <linux/moduleh>
    Make ILP DT entry part of PMU
    Describe ILP as subdevice of PMU in Documentation
V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
    (even if used in some resources) should be used in relation to
    Cortex-A9 devices only.
V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too
    early.
V6: Drop #include <linux/clk.h>
    Use "int" as type where it matches usage
    Add cpu_relax() in the loop
    Add disable callback
    Use _hw_ functions for registering struct clk_hw (new API)

    Thanks a lot Stephen!
---
 .../bindings/clock/brcm,bcm53573-ilp.txt           |  40 ++++++
 drivers/clk/bcm/Makefile                           |   1 +
 drivers/clk/bcm/clk-bcm53573-ilp.c                 | 157 +++++++++++++++++++++
 3 files changed, 198 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
 create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
new file mode 100644
index 0000000..5ab3107
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
@@ -0,0 +1,40 @@
+Broadcom BCM53573 ILP clock
+===========================
+
+This binding uses the common clock binding:
+    Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+This binding is used for ILP clock (sometimes referred as "slow clock")
+on Broadcom BCM53573 devices using Cortex-A7 CPU.
+
+This clock is part of PMU (Power Management Unit), a Broadcom's device
+handing power-related aspects. Please note PMU contains more subdevices,
+ILP is only one of them.
+
+ILP's rate has to be calculated on runtime and it depends on ALP clock
+which has to be referenced.
+
+Required properties:
+- compatible: "brcm,bcm53573-ilp"
+- reg: iomem address range of PMU (Power Management Unit)
+- reg-names: "pmu", the only needed & supported reg right now
+- clocks: has to reference an ALP clock
+- #clock-cells: should be <0>
+
+Example:
+
+pmu@18012000 {
+	compatible = "simple-bus";
+	ranges = <0x00000000 0x18012000 0x00001000>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	ilp: ilp@0 {
+		compatible = "brcm,bcm53573-ilp";
+		reg = <0 0x1000>;
+		reg-names = "pmu";
+		clocks = <&alp>;
+		#clock-cells = <0>;
+		clock-output-names = "ilp";
+	};
+};
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 1d79bd2..4b8c56d 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-ns2.o
 obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
 obj-$(CONFIG_ARCH_BCM_NSP)	+= clk-nsp.o
 obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-nsp.o
+obj-$(CONFIG_ARCH_BCM_53573)	+= clk-bcm53573-ilp.o
diff --git a/drivers/clk/bcm/clk-bcm53573-ilp.c b/drivers/clk/bcm/clk-bcm53573-ilp.c
new file mode 100644
index 0000000..faf2b0a
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+#define PMU_XTAL_FREQ_RATIO			0x66c
+#define  XTAL_ALP_PER_4ILP			0x00001fff
+#define  XTAL_CTL_EN				0x80000000
+#define PMU_SLOW_CLK_PERIOD			0x6dc
+
+struct bcm53573_ilp {
+	struct clk_hw hw;
+	void __iomem *pmu;
+};
+
+static int bcm53573_ilp_enable(struct clk_hw *hw)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+
+	writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
+	writel(0x10000, ilp->pmu + 0x674);
+
+	return 0;
+}
+
+static void bcm53573_ilp_disable(struct clk_hw *hw)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+
+	writel(0, ilp->pmu + PMU_SLOW_CLK_PERIOD);
+	writel(0, ilp->pmu + 0x674);
+}
+
+static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
+					      unsigned long parent_rate)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+	void __iomem *pmu = ilp->pmu;
+	u32 last_val, cur_val;
+	int sum = 0, num = 0, loop_num = 0;
+	int avg;
+
+	/* Enable measurement */
+	writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
+
+	/* Read initial value */
+	last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
+
+	/*
+	 * At minimum we should loop for a bit to let hardware do the
+	 * measurement. This isn't very accurate however, so for a better
+	 * precision lets try getting 20 different values for and use average.
+	 */
+	while (num < 20) {
+		cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
+
+		if (cur_val != last_val) {
+			/* Got different value, use it */
+			sum += cur_val;
+			num++;
+			loop_num = 0;
+			last_val = cur_val;
+		} else if (++loop_num > 5000) {
+			/* Same value over and over, give up */
+			sum += cur_val;
+			num++;
+			break;
+		}
+
+		cpu_relax();
+	}
+
+	/* Disable measurement to save power */
+	writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
+
+	avg = sum / num;
+
+	return parent_rate * 4 / avg;
+}
+
+static const struct clk_ops bcm53573_ilp_clk_ops = {
+	.enable = bcm53573_ilp_enable,
+	.disable = bcm53573_ilp_disable,
+	.recalc_rate = bcm53573_ilp_recalc_rate,
+};
+
+static void bcm53573_ilp_init(struct device_node *np)
+{
+	struct bcm53573_ilp *ilp;
+	struct resource res;
+	struct clk_init_data init = { 0 };
+	const char *parent_name;
+	int index;
+	int err;
+
+	ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
+	if (!ilp)
+		return;
+
+	parent_name = of_clk_get_parent_name(np, 0);
+	if (!parent_name) {
+		err = -ENOENT;
+		goto err_free_ilp;
+	}
+
+	/* TODO: This looks generic, try making it OF helper. */
+	index = of_property_match_string(np, "reg-names", "pmu");
+	if (index < 0) {
+		err = index;
+		goto err_free_ilp;
+	}
+	err = of_address_to_resource(np, index, &res);
+	if (err)
+		goto err_free_ilp;
+	ilp->pmu = ioremap(res.start, resource_size(&res));
+	if (IS_ERR(ilp->pmu)) {
+		err = PTR_ERR(ilp->pmu);
+		goto err_free_ilp;
+	}
+
+	init.name = np->name;
+	init.ops = &bcm53573_ilp_clk_ops;
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+
+	ilp->hw.init = &init;
+	err = clk_hw_register(NULL, &ilp->hw);
+	if (err)
+		goto err_unmap_pmu;
+
+	err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw);
+	if (err)
+		goto err_clk_hw_unregister;
+
+	return;
+
+err_clk_hw_unregister:
+	clk_hw_unregister(&ilp->hw);
+err_unmap_pmu:
+	iounmap(ilp->pmu);
+err_free_ilp:
+	kfree(ilp);
+	pr_err("Failed to init ILP clock: %d\n", err);
+}
+
+/* We need it very early for arch code, before device model gets ready */
+CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);
-- 
2.9.3

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Rob Herring]

On Thu, Aug 25, 2016 at 02:42:52PM +0200, Rafał Miłecki wrote:
> On 23 August 2016 at 21:55, Rob Herring <robh@kernel.org> wrote:
> > On Tue, Aug 23, 2016 at 08:25:59AM +0200, Rafał Miłecki wrote:
> >> From: Rafał Miłecki <rafal@milecki.pl>
> >>
> >> This clock is present on BCM53573 devices (including BCM47189) that use
> >> Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should
> >> be defined as one of its subnodes (subdevices). For more details see
> >> Documentation entry.
> >>
> >> Unfortunately there isn't a set of registers related to ILP clock only.
> >> We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
> >> "retention*" and "control_ext" regs. This is why this driver maps all
> >> 0x1000 B of space.
> >
> > Then describe the block as a syscon which has several functions of
> > which clocks are one.
> 
> This isn't clear to me, sorry, could you describe it? Would you like
> me to update commit message or documentation? Is code fine as is?

Let me put it another way, when you need to use the other registers, how 
do you plan to describe them in DT? We don't really want a node per 
register, nor do I want to get binding docs one by one as you add each 
function. Instead describe the block with all the misc functions as a 
whole. What would you call that block? Still ILP or something else? 

Also, you if you do have multiple drivers all needing to access this 
single block, then that is when you need syscon and regmap.

Rob

Re: [PATCH V5] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

On 31 August 2016 at 18:16, Rob Herring <robh@kernel.org> wrote:
> On Thu, Aug 25, 2016 at 02:42:52PM +0200, Rafał Miłecki wrote:
>> On 23 August 2016 at 21:55, Rob Herring <robh@kernel.org> wrote:
>> > On Tue, Aug 23, 2016 at 08:25:59AM +0200, Rafał Miłecki wrote:
>> >> From: Rafał Miłecki <rafal@milecki.pl>
>> >>
>> >> This clock is present on BCM53573 devices (including BCM47189) that use
>> >> Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should
>> >> be defined as one of its subnodes (subdevices). For more details see
>> >> Documentation entry.
>> >>
>> >> Unfortunately there isn't a set of registers related to ILP clock only.
>> >> We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
>> >> "retention*" and "control_ext" regs. This is why this driver maps all
>> >> 0x1000 B of space.
>> >
>> > Then describe the block as a syscon which has several functions of
>> > which clocks are one.
>>
>> This isn't clear to me, sorry, could you describe it? Would you like
>> me to update commit message or documentation? Is code fine as is?
>
> Let me put it another way, when you need to use the other registers, how
> do you plan to describe them in DT? We don't really want a node per
> register, nor do I want to get binding docs one by one as you add each
> function. Instead describe the block with all the misc functions as a
> whole. What would you call that block? Still ILP or something else?
>
> Also, you if you do have multiple drivers all needing to access this
> single block, then that is when you need syscon and regmap.

I got this now, thanks for your patience.

One last question: what is preferred register reference:
1) Parent-child (of_get_parent + syscon_node_to_regmap)
or
2) DT property (syscon_regmap_lookup_by_phandle(dt, "foo"))

-- 
Rafał

[PATCH V7] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

From: Rafał Miłecki <rafal@milecki.pl>

This clock is present on BCM53573 devices (including BCM47189) that use
Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
device so we use syscon (and regmap) for it.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
V2: Rebase on top of clk-next
    Use ALP as parent clock
    Improve comments
    Switch from ioremap_nocache to ioremap
    Check of_clk_add_provide result for error
V3: Drop #include <linux/moduleh>
    Make ILP DT entry part of PMU
    Describe ILP as subdevice of PMU in Documentation
V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
    (even if used in some resources) should be used in relation to
    Cortex-A9 devices only.
V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too
    early.
V6: Drop #include <linux/clk.h>
    Use "int" as type where it matches usage
    Add cpu_relax() in the loop
    Add disable callback
    Use _hw_ functions for registering struct clk_hw (new API)

    Thanks a lot Stephen!
V7: Use syscon and regmap (thanks Rob!)
---
 .../bindings/clock/brcm,bcm53573-ilp.txt           |  36 +++++
 drivers/clk/bcm/Makefile                           |   1 +
 drivers/clk/bcm/clk-bcm53573-ilp.c                 | 148 +++++++++++++++++++++
 3 files changed, 185 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
 create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
new file mode 100644
index 0000000..4554f70
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
@@ -0,0 +1,36 @@
+Broadcom BCM53573 ILP clock
+===========================
+
+This binding uses the common clock binding:
+    Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+This binding is used for ILP clock (sometimes referred as "slow clock")
+on Broadcom BCM53573 devices using Cortex-A7 CPU.
+
+ILP's rate has to be calculated on runtime and it depends on ALP clock
+which has to be referenced.
+
+This clock is part of PMU (Power Management Unit), a Broadcom's device
+handing power-related aspects. Its node must be sub-node of the PMU
+device.
+
+Required properties:
+- compatible: "brcm,bcm53573-ilp"
+- reg: iomem address range of PMU (Power Management Unit)
+- reg-names: "pmu", the only needed & supported reg right now
+- clocks: has to reference an ALP clock
+- #clock-cells: should be <0>
+
+Example:
+
+pmu@18012000 {
+	compatible = "simple-mfd", "syscon";
+	reg = <0x18012000 0x00001000>;
+
+	ilp: ilp@0 {
+		compatible = "brcm,bcm53573-ilp";
+		clocks = <&alp>;
+		#clock-cells = <0>;
+		clock-output-names = "ilp";
+	};
+};
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 1d79bd2..4b8c56d 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-ns2.o
 obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
 obj-$(CONFIG_ARCH_BCM_NSP)	+= clk-nsp.o
 obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-nsp.o
+obj-$(CONFIG_ARCH_BCM_53573)	+= clk-bcm53573-ilp.o
diff --git a/drivers/clk/bcm/clk-bcm53573-ilp.c b/drivers/clk/bcm/clk-bcm53573-ilp.c
new file mode 100644
index 0000000..1f4e30d
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
@@ -0,0 +1,148 @@
+/*
+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+#define PMU_XTAL_FREQ_RATIO			0x66c
+#define  XTAL_ALP_PER_4ILP			0x00001fff
+#define  XTAL_CTL_EN				0x80000000
+#define PMU_SLOW_CLK_PERIOD			0x6dc
+
+struct bcm53573_ilp {
+	struct clk_hw hw;
+	struct regmap *regmap;
+};
+
+static int bcm53573_ilp_enable(struct clk_hw *hw)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+
+	regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199);
+	regmap_write(ilp->regmap, 0x674, 0x10000);
+
+	return 0;
+}
+
+static void bcm53573_ilp_disable(struct clk_hw *hw)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+
+	regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0);
+	regmap_write(ilp->regmap, 0x674, 0);
+}
+
+static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
+					      unsigned long parent_rate)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+	struct regmap *regmap = ilp->regmap;
+	u32 last_val, cur_val;
+	int sum = 0, num = 0, loop_num = 0;
+	int avg;
+
+	/* Enable measurement */
+	regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN);
+
+	/* Read initial value */
+	regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val);
+	last_val &= XTAL_ALP_PER_4ILP;
+
+	/*
+	 * At minimum we should loop for a bit to let hardware do the
+	 * measurement. This isn't very accurate however, so for a better
+	 * precision lets try getting 20 different values for and use average.
+	 */
+	while (num < 20) {
+		regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val);
+		cur_val &= XTAL_ALP_PER_4ILP;
+
+		if (cur_val != last_val) {
+			/* Got different value, use it */
+			sum += cur_val;
+			num++;
+			loop_num = 0;
+			last_val = cur_val;
+		} else if (++loop_num > 5000) {
+			/* Same value over and over, give up */
+			sum += cur_val;
+			num++;
+			break;
+		}
+
+		cpu_relax();
+	}
+
+	/* Disable measurement to save power */
+	regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0);
+
+	avg = sum / num;
+
+	return parent_rate * 4 / avg;
+}
+
+static const struct clk_ops bcm53573_ilp_clk_ops = {
+	.enable = bcm53573_ilp_enable,
+	.disable = bcm53573_ilp_disable,
+	.recalc_rate = bcm53573_ilp_recalc_rate,
+};
+
+static void bcm53573_ilp_init(struct device_node *np)
+{
+	struct bcm53573_ilp *ilp;
+	struct clk_init_data init = { 0 };
+	const char *parent_name;
+	int err;
+
+	ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
+	if (!ilp)
+		return;
+
+	parent_name = of_clk_get_parent_name(np, 0);
+	if (!parent_name) {
+		err = -ENOENT;
+		goto err_free_ilp;
+	}
+
+	ilp->regmap = syscon_node_to_regmap(of_get_parent(np));
+	if (IS_ERR(ilp->regmap)) {
+		err = PTR_ERR(ilp->regmap);
+		goto err_free_ilp;
+	}
+
+	init.name = np->name;
+	init.ops = &bcm53573_ilp_clk_ops;
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+
+	ilp->hw.init = &init;
+	err = clk_hw_register(NULL, &ilp->hw);
+	if (err)
+		goto err_free_ilp;
+
+	err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw);
+	if (err)
+		goto err_clk_hw_unregister;
+
+	return;
+
+err_clk_hw_unregister:
+	clk_hw_unregister(&ilp->hw);
+err_free_ilp:
+	kfree(ilp);
+	pr_err("Failed to init ILP clock: %d\n", err);
+}
+
+/* We need it very early for arch code, before device model gets ready */
+CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);
-- 
2.9.3

Re: [PATCH V7] clk: bcm: Add driver for BCM53573 ILP clock

[Rob Herring]

On Mon, Sep 05, 2016 at 04:29:27PM +0200, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> This clock is present on BCM53573 devices (including BCM47189) that use
> Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
> device so we use syscon (and regmap) for it.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
> V2: Rebase on top of clk-next
>     Use ALP as parent clock
>     Improve comments
>     Switch from ioremap_nocache to ioremap
>     Check of_clk_add_provide result for error
> V3: Drop #include <linux/moduleh>
>     Make ILP DT entry part of PMU
>     Describe ILP as subdevice of PMU in Documentation
> V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
>     (even if used in some resources) should be used in relation to
>     Cortex-A9 devices only.
> V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too
>     early.
> V6: Drop #include <linux/clk.h>
>     Use "int" as type where it matches usage
>     Add cpu_relax() in the loop
>     Add disable callback
>     Use _hw_ functions for registering struct clk_hw (new API)
> 
>     Thanks a lot Stephen!
> V7: Use syscon and regmap (thanks Rob!)
> ---
>  .../bindings/clock/brcm,bcm53573-ilp.txt           |  36 +++++
>  drivers/clk/bcm/Makefile                           |   1 +
>  drivers/clk/bcm/clk-bcm53573-ilp.c                 | 148 +++++++++++++++++++++
>  3 files changed, 185 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
>  create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c
> 
> diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
> new file mode 100644
> index 0000000..4554f70
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
> @@ -0,0 +1,36 @@
> +Broadcom BCM53573 ILP clock
> +===========================
> +
> +This binding uses the common clock binding:
> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
> +
> +This binding is used for ILP clock (sometimes referred as "slow clock")
> +on Broadcom BCM53573 devices using Cortex-A7 CPU.
> +
> +ILP's rate has to be calculated on runtime and it depends on ALP clock
> +which has to be referenced.
> +
> +This clock is part of PMU (Power Management Unit), a Broadcom's device
> +handing power-related aspects. Its node must be sub-node of the PMU
> +device.
> +
> +Required properties:
> +- compatible: "brcm,bcm53573-ilp"
> +- reg: iomem address range of PMU (Power Management Unit)
> +- reg-names: "pmu", the only needed & supported reg right now

There's no reg prop in the example.

> +- clocks: has to reference an ALP clock
> +- #clock-cells: should be <0>
> +
> +Example:
> +
> +pmu@18012000 {
> +	compatible = "simple-mfd", "syscon";
> +	reg = <0x18012000 0x00001000>;
> +
> +	ilp: ilp@0 {

Drop the unit address if there is in fact no reg prop.

> +		compatible = "brcm,bcm53573-ilp";
> +		clocks = <&alp>;
> +		#clock-cells = <0>;
> +		clock-output-names = "ilp";
> +	};
> +};

[PATCH V8] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

From: Rafał Miłecki <rafal@milecki.pl>

This clock is present on BCM53573 devices (including BCM47189) that use
Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
device so we use syscon (and regmap) for it.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
V2: Rebase on top of clk-next
    Use ALP as parent clock
    Improve comments
    Switch from ioremap_nocache to ioremap
    Check of_clk_add_provide result for error
V3: Drop #include <linux/moduleh>
    Make ILP DT entry part of PMU
    Describe ILP as subdevice of PMU in Documentation
V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
    (even if used in some resources) should be used in relation to
    Cortex-A9 devices only.
V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too
    early.
V6: Drop #include <linux/clk.h>
    Use "int" as type where it matches usage
    Add cpu_relax() in the loop
    Add disable callback
    Use _hw_ functions for registering struct clk_hw (new API)

    Thanks a lot Stephen!
V7: Use syscon and regmap (thanks Rob!)
V8: Update Documentation (drop unused "reg", unit address)
---
 .../bindings/clock/brcm,bcm53573-ilp.txt           |  36 +++++
 drivers/clk/bcm/Makefile                           |   1 +
 drivers/clk/bcm/clk-bcm53573-ilp.c                 | 148 +++++++++++++++++++++
 3 files changed, 185 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
 create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
new file mode 100644
index 0000000..2ebb107
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
@@ -0,0 +1,36 @@
+Broadcom BCM53573 ILP clock
+===========================
+
+This binding uses the common clock binding:
+    Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+This binding is used for ILP clock (sometimes referred as "slow clock")
+on Broadcom BCM53573 devices using Cortex-A7 CPU.
+
+ILP's rate has to be calculated on runtime and it depends on ALP clock
+which has to be referenced.
+
+This clock is part of PMU (Power Management Unit), a Broadcom's device
+handing power-related aspects. Its node must be sub-node of the PMU
+device.
+
+Required properties:
+- compatible: "brcm,bcm53573-ilp"
+- clocks: has to reference an ALP clock
+- #clock-cells: should be <0>
+- clock-output-names: from common clock bindings, should contain clock
+		      name
+
+Example:
+
+pmu@18012000 {
+	compatible = "simple-mfd", "syscon";
+	reg = <0x18012000 0x00001000>;
+
+	ilp {
+		compatible = "brcm,bcm53573-ilp";
+		clocks = <&alp>;
+		#clock-cells = <0>;
+		clock-output-names = "ilp";
+	};
+};
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 1d79bd2..4b8c56d 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-ns2.o
 obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
 obj-$(CONFIG_ARCH_BCM_NSP)	+= clk-nsp.o
 obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-nsp.o
+obj-$(CONFIG_ARCH_BCM_53573)	+= clk-bcm53573-ilp.o
diff --git a/drivers/clk/bcm/clk-bcm53573-ilp.c b/drivers/clk/bcm/clk-bcm53573-ilp.c
new file mode 100644
index 0000000..1f4e30d
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
@@ -0,0 +1,148 @@
+/*
+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+#define PMU_XTAL_FREQ_RATIO			0x66c
+#define  XTAL_ALP_PER_4ILP			0x00001fff
+#define  XTAL_CTL_EN				0x80000000
+#define PMU_SLOW_CLK_PERIOD			0x6dc
+
+struct bcm53573_ilp {
+	struct clk_hw hw;
+	struct regmap *regmap;
+};
+
+static int bcm53573_ilp_enable(struct clk_hw *hw)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+
+	regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199);
+	regmap_write(ilp->regmap, 0x674, 0x10000);
+
+	return 0;
+}
+
+static void bcm53573_ilp_disable(struct clk_hw *hw)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+
+	regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0);
+	regmap_write(ilp->regmap, 0x674, 0);
+}
+
+static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
+					      unsigned long parent_rate)
+{
+	struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
+	struct regmap *regmap = ilp->regmap;
+	u32 last_val, cur_val;
+	int sum = 0, num = 0, loop_num = 0;
+	int avg;
+
+	/* Enable measurement */
+	regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN);
+
+	/* Read initial value */
+	regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val);
+	last_val &= XTAL_ALP_PER_4ILP;
+
+	/*
+	 * At minimum we should loop for a bit to let hardware do the
+	 * measurement. This isn't very accurate however, so for a better
+	 * precision lets try getting 20 different values for and use average.
+	 */
+	while (num < 20) {
+		regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val);
+		cur_val &= XTAL_ALP_PER_4ILP;
+
+		if (cur_val != last_val) {
+			/* Got different value, use it */
+			sum += cur_val;
+			num++;
+			loop_num = 0;
+			last_val = cur_val;
+		} else if (++loop_num > 5000) {
+			/* Same value over and over, give up */
+			sum += cur_val;
+			num++;
+			break;
+		}
+
+		cpu_relax();
+	}
+
+	/* Disable measurement to save power */
+	regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0);
+
+	avg = sum / num;
+
+	return parent_rate * 4 / avg;
+}
+
+static const struct clk_ops bcm53573_ilp_clk_ops = {
+	.enable = bcm53573_ilp_enable,
+	.disable = bcm53573_ilp_disable,
+	.recalc_rate = bcm53573_ilp_recalc_rate,
+};
+
+static void bcm53573_ilp_init(struct device_node *np)
+{
+	struct bcm53573_ilp *ilp;
+	struct clk_init_data init = { 0 };
+	const char *parent_name;
+	int err;
+
+	ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
+	if (!ilp)
+		return;
+
+	parent_name = of_clk_get_parent_name(np, 0);
+	if (!parent_name) {
+		err = -ENOENT;
+		goto err_free_ilp;
+	}
+
+	ilp->regmap = syscon_node_to_regmap(of_get_parent(np));
+	if (IS_ERR(ilp->regmap)) {
+		err = PTR_ERR(ilp->regmap);
+		goto err_free_ilp;
+	}
+
+	init.name = np->name;
+	init.ops = &bcm53573_ilp_clk_ops;
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+
+	ilp->hw.init = &init;
+	err = clk_hw_register(NULL, &ilp->hw);
+	if (err)
+		goto err_free_ilp;
+
+	err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw);
+	if (err)
+		goto err_clk_hw_unregister;
+
+	return;
+
+err_clk_hw_unregister:
+	clk_hw_unregister(&ilp->hw);
+err_free_ilp:
+	kfree(ilp);
+	pr_err("Failed to init ILP clock: %d\n", err);
+}
+
+/* We need it very early for arch code, before device model gets ready */
+CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);
-- 
2.9.3

Re: [PATCH V8] clk: bcm: Add driver for BCM53573 ILP clock

[Rob Herring]

On Tue, Sep 13, 2016 at 2:06 AM, Rafał Miłecki <zajec5@gmail.com> wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
>
> This clock is present on BCM53573 devices (including BCM47189) that use
> Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
> device so we use syscon (and regmap) for it.
>
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
> V2: Rebase on top of clk-next
>     Use ALP as parent clock
>     Improve comments
>     Switch from ioremap_nocache to ioremap
>     Check of_clk_add_provide result for error
> V3: Drop #include <linux/moduleh>
>     Make ILP DT entry part of PMU
>     Describe ILP as subdevice of PMU in Documentation
> V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
>     (even if used in some resources) should be used in relation to
>     Cortex-A9 devices only.
> V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too
>     early.
> V6: Drop #include <linux/clk.h>
>     Use "int" as type where it matches usage
>     Add cpu_relax() in the loop
>     Add disable callback
>     Use _hw_ functions for registering struct clk_hw (new API)
>
>     Thanks a lot Stephen!
> V7: Use syscon and regmap (thanks Rob!)
> V8: Update Documentation (drop unused "reg", unit address)
> ---
>  .../bindings/clock/brcm,bcm53573-ilp.txt           |  36 +++++

Acked-by: Rob Herring <robh@kernel.org>

>  drivers/clk/bcm/Makefile                           |   1 +
>  drivers/clk/bcm/clk-bcm53573-ilp.c                 | 148 +++++++++++++++++++++
>  3 files changed, 185 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
>  create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c

Re: [PATCH V8] clk: bcm: Add driver for BCM53573 ILP clock

[Stephen Boyd]

On 09/13, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> This clock is present on BCM53573 devices (including BCM47189) that use
> Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
> device so we use syscon (and regmap) for it.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH V8] clk: bcm: Add driver for BCM53573 ILP clock

[Rafał Miłecki]

On 17 September 2016 at 01:23, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 09/13, Rafał Miłecki wrote:
>> From: Rafał Miłecki <rafal@milecki.pl>
>>
>> This clock is present on BCM53573 devices (including BCM47189) that use
>> Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
>> device so we use syscon (and regmap) for it.
>>
>> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
>> ---
>
> Applied to clk-next

Thank you and everyone who helped me getting this driver into a proper
shape. I appreciate your help!

-- 
Rafał