From: Greentime Hu <green.hu@gmail.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Greentime <greentime@andestech.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arch <linux-arch@vger.kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Networking <netdev@vger.kernel.org>,
Vincent Chen <vincentc@andestech.com>
Subject: Re: [PATCH 26/31] nds32: Build infrastructure
Date: Thu, 9 Nov 2017 17:02:54 +0800 [thread overview]
Message-ID: <CAEbi=3d91XPe0oGFfSB0T4tCU9FN=0SNLk7xKFifrV+-06u8AA@mail.gmail.com> (raw)
In-Reply-To: <CAK8P3a11Mk3XcmP5Ecbv55TuNRjrrp_43GX8hPDfdLh6JMHE=g@mail.gmail.com>
2017-11-08 18:16 GMT+08:00 Arnd Bergmann <arnd@arndb.de>:
> On Wed, Nov 8, 2017 at 6:55 AM, Greentime Hu <green.hu@gmail.com> wrote:
>
>> diff --git a/arch/nds32/Kconfig b/arch/nds32/Kconfig
>> new file mode 100644
>> index 0000000..112f470
>> --- /dev/null
>> +++ b/arch/nds32/Kconfig
>> @@ -0,0 +1,107 @@
>> +#
>> +# For a description of the syntax of this configuration file,
>> +# see Documentation/kbuild/kconfig-language.txt.
>> +#
>> +
>> +config NDS32
>> + def_bool y
>> + select ARCH_HAS_RAW_COPY_USER
>> + select ARCH_WANT_FRAME_POINTERS if FTRACE
>> + select ARCH_WANT_IPC_PARSE_VERSION
>> + select CLKSRC_MMIO
>> + select CLONE_BACKWARDS
>> + select TIMER_OF
>> + select FRAME_POINTER
>> + select GENERIC_ATOMIC64
>> + select GENERIC_CPU_DEVICES
>> + select GENERIC_CLOCKEVENTS
>> + select GENERIC_IOMAP
>> + select GENERIC_IRQ_CHIP
>> + select GENERIC_IRQ_PROBE
>> + select GENERIC_IRQ_SHOW
>> + select GENERIC_STRNCPY_FROM_USER
>> + select GENERIC_STRNLEN_USER
>> + select GENERIC_TIME_VSYSCALL
>> + select HAVE_ARCH_TRACEHOOK
>> + select HAVE_GENERIC_IOMAP
>
> You normally don't want HAVE_GENERIC_IOMAP, at least unless the CPU
> has special instructions to trigger PCI I/O port access.
Thanks.
I will remove it in the next version patch.
>> + select HAVE_DEBUG_KMEMLEAK
>> + select HAVE_IDE
>
> You certainly don't want HAVE_IDE
Thanks.
I will remove it in the next version patch.
>> + select HAVE_MEMBLOCK
>> + select HAVE_MEMBLOCK_NODE_MAP
>> + select HAVE_UID16
>
> HAVE_UID16 shouldn't be used on new architectures, as mentioned in the
> comment about asm/posix_types.h
Thanks.
I will remove it in the next version patch.
>> + select HAVE_REGS_AND_STACK_ACCESS_API
>> + select IRQ_DOMAIN
>> + select LOCKDEP_SUPPORT
>> + select MODULES_USE_ELF_REL
>> + select MODULES_USE_ELF_RELA
>
> I would think that you use either MODULES_USE_ELF_REL or
> MODULES_USE_ELF_RELA, but not both.
Thanks.
I will check which one we used and remove the other one if posible.
>> + select OF
>> + select OF_EARLY_FLATTREE
>> + select OLD_SIGACTION
>> + select OLD_SIGSUSPEND3
>
> What are the OLD_SIG* ones for? It sounds like something you shouldn't
> need, although I'm not familiar wiht them.
Thanks I will check if we need it or not.
>> + select NO_IOPORT_MAP
>> + select RTC_LIB
>> + select THREAD_INFO_IN_TASK
>> + select SYS_SUPPORTS_APM_EMULATION
>
> I don't see what SYS_SUPPORTS_APM_EMULATION gains you.
Thanks.
I will remove it in the next version patch.
>> +config GENERIC_CALIBRATE_DELAY
>> + def_bool y
>
> It's better to avoid the delay loop completely and skip the calibration,
> if your hardware allows.
Thanks.
Do you mean that this config should be def_bool n?
why? Almost all arch enable it.
>> +
>> +config NDS32_BUILTIN_DTB
>> + string "Builtin DTB"
>> + default ""
>> + help
>> + User can use it to specify the dts of the SoC
>
> Better leave this up to the boot loader.
Thanks.
uboot will pass it too.
>> +config ALIGNMENT_TRAP
>> + tristate "Kernel support unaligned access handling"
>> + default y
>> + help
>> + Andes processors cannot fetch/store information which is not
>> + naturally aligned on the bus, i.e., a 4 byte fetch must start at an
>> + address divisible by 4. On 32-bit Andes processors, these non-aligned
>> + fetch/store instructions will be emulated in software if you say
>> + here, which has a severe performance impact. This is necessary for
>> + correct operation of some network protocols. With an IP-only
>> + configuration it is safe to say N, otherwise say Y.
>
> Which network protocols are you referring to?
I will modify these descriptions. It was written by someone I don't know. :p
This case only happened when I found is compiler code gen issue or
wrong pointer usage.
>> +config HIGHMEM
>> + bool "High Memory Support"
>> + depends on MMU && CPU_CACHE_NONALIASING
>> + help
>> + The address space of Andes processors is only 4 Gigabytes large
>> + and it has to accommodate user address space, kernel address
>> + space as well as some memory mapped IO. That means that, if you
>> + have a large amount of physical memory and/or IO, not all of the
>> + memory can be "permanently mapped" by the kernel. The physical
>> + memory that is not permanently mapped is called "high memory".
>> +
>> + Depending on the selected kernel/user memory split, minimum
>> + vmalloc space and actual amount of RAM, you may not need this
>> + option which should result in a slightly faster kernel.
>> +
>> + If unsure, say N.
>
> Generally speaking, highmem support is a mess, and it's better to avoid it.
>
> I see that the two device tree files you have list 1GB of memory. Do you think
> that is a common configuration for actual products? Do you expect any to
> have more than 1GB (or more than 4GB) in the future, or is that the upper
> end of the scale?
>
> If 1GB is a reasonable upper bound, then you could change the vmsplit
> to give slightly less address space to user space and have 1GB of direct-mapped
> kernel memory plus 256MB of vmalloc space reserved for the kernel,
> and completely avoid highmem.
Thanks.
We do realy use 1GB ram in some products.
We also verify CONFIG_HIGHMEM with LTP too.
It seems fine but I will study vmsplit to see if we should use it.
>> +config MEMORY_START
>> + hex "Physical memory start address"
>> + default "0x00000000"
>> + help
>> + Physical memory start address, you may modify it if it is porting to
>> + a new SoC with different start address.
>> +endmenu
>
> On ARM, we found options like this to be rather problematic since it prevents
> you from running the same kernel on boards that are otherwise compatible.
>
> If the architecture easily allows the memory to start at address 0, could
> you require this address for all SoCs that want to run Linux, and get
> rid of the compile-time option?
Thanks.
The reason we need this config is because we need to define PHYS_OFFSET.
#define PHYS_OFFSET (CONFIG_MEMORY_START)
It needs to be set in compile-time. I don't know how to get rid of it.
next prev parent reply other threads:[~2017-11-09 9:03 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-08 5:54 [PATCH 00/31] Andes(nds32) Linux Kernel Port Greentime Hu
2017-11-08 5:54 ` [PATCH 01/31] nds32: Assembly macros and definitions Greentime Hu
2017-11-08 5:54 ` [PATCH 02/31] nds32: Kernel booting and initialization Greentime Hu
2017-11-08 13:38 ` Rob Herring
2017-11-09 9:49 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 03/31] nds32: Support early_printk Greentime Hu
2017-11-08 9:47 ` Tobias Klauser
2017-11-09 7:19 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 04/31] nds32: Exception handling Greentime Hu
2017-11-08 8:23 ` Arnd Bergmann
[not found] ` <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B4974CE@ATCPCS16.andestech.com>
2017-11-13 10:54 ` Fwd: FW: " Vincent Chen
2017-11-08 5:54 ` [PATCH 05/31] nds32: MMU definitions Greentime Hu
2017-11-08 8:36 ` Arnd Bergmann
2017-11-08 8:46 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 06/31] nds32: MMU initialization Greentime Hu
2017-11-08 5:54 ` [PATCH 07/31] nds32: MMU fault handling and page table management Greentime Hu
2017-11-08 5:54 ` [PATCH 08/31] nds32: Cache and TLB routines Greentime Hu
2017-11-08 8:45 ` Arnd Bergmann
2017-11-08 9:01 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 09/31] nds32: Process management Greentime Hu
2017-11-08 5:54 ` [PATCH 10/31] nds32: IRQ handling Greentime Hu
2017-11-08 8:49 ` Arnd Bergmann
2017-11-08 9:06 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 11/31] nds32: Atomic operations Greentime Hu
2017-11-08 8:54 ` Arnd Bergmann
2017-11-08 9:32 ` vincentc
2017-11-20 14:29 ` Will Deacon
2017-11-22 3:02 ` Vincent Chen
2017-11-08 5:55 ` [PATCH 12/31] nds32: Device specific operations Greentime Hu
2017-11-08 9:04 ` Arnd Bergmann
2017-11-09 7:04 ` Greentime Hu
2017-11-10 16:07 ` Greentime Hu
2017-11-10 16:14 ` Arnd Bergmann
2017-11-22 10:02 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 13/31] nds32: DMA mapping API Greentime Hu
2017-11-08 9:09 ` Arnd Bergmann
2017-11-09 7:12 ` Greentime Hu
2017-11-09 10:14 ` Arnd Bergmann
2017-11-10 8:13 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 14/31] nds32: ELF definitions Greentime Hu
2017-11-08 5:55 ` [PATCH 15/31] nds32: System calls handling Greentime Hu
2017-11-08 9:30 ` Arnd Bergmann
[not found] ` <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B497241@ATCPCS16.andestech.com>
2017-11-13 2:51 ` Fwd: FW: " Vincent Chen
2017-11-13 11:42 ` Arnd Bergmann
2017-11-22 3:13 ` Vincent Chen
2017-11-08 5:55 ` [PATCH 16/31] nds32: VDSO support Greentime Hu
2017-11-08 9:37 ` Arnd Bergmann
2017-11-08 20:00 ` Deepa Dinamani
2017-11-08 20:06 ` Arnd Bergmann
2017-11-08 20:14 ` Deepa Dinamani
2017-11-08 5:55 ` [PATCH 17/31] nds32: Signal handling support Greentime Hu
2017-11-09 1:26 ` Al Viro
[not found] ` <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B497460@ATCPCS16.andestech.com>
2017-11-13 2:34 ` Fwd: FW: " Vincent Chen
2017-11-08 5:55 ` [PATCH 18/31] nds32: Library functions Greentime Hu
2017-11-08 9:45 ` Arnd Bergmann
2017-11-09 0:40 ` Al Viro
[not found] ` <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B497559@ATCPCS16.andestech.com>
2017-11-14 4:47 ` Fwd: FW: " Vincent Chen
2017-11-18 2:44 ` Al Viro
2017-11-08 5:55 ` [PATCH 19/31] nds32: Debugging support Greentime Hu
2017-11-08 5:55 ` [PATCH 20/31] nds32: L2 cache support Greentime Hu
2017-11-08 9:48 ` Arnd Bergmann
2017-11-09 7:24 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 21/31] nds32: Loadable modules Greentime Hu
2017-11-08 5:55 ` [PATCH 22/31] nds32: Generic timers support Greentime Hu
2017-11-08 5:55 ` [PATCH 23/31] nds32: Device tree support Greentime Hu
2017-11-08 9:53 ` Arnd Bergmann
2017-11-09 7:48 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 24/31] nds32: Miscellaneous header files Greentime Hu
2017-11-08 9:57 ` Arnd Bergmann
2017-11-08 5:55 ` [PATCH 25/31] nds32: defconfig Greentime Hu
2017-11-08 10:03 ` Arnd Bergmann
2017-11-09 8:00 ` Greentime Hu
2017-11-09 10:20 ` Arnd Bergmann
2017-11-10 8:16 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 26/31] nds32: Build infrastructure Greentime Hu
2017-11-08 10:16 ` Arnd Bergmann
2017-11-09 9:02 ` Greentime Hu [this message]
2017-11-09 10:33 ` Arnd Bergmann
2017-11-10 8:26 ` Greentime Hu
2017-11-17 12:39 ` Greentime Hu
2017-11-17 12:50 ` Arnd Bergmann
2017-11-17 13:50 ` Greentime Hu
2017-11-13 10:45 ` Geert Uytterhoeven
2017-11-16 10:03 ` Greentime Hu
2017-11-16 10:25 ` Arnd Bergmann
2017-11-17 13:53 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 27/31] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller Greentime Hu
2017-11-08 13:25 ` Rob Herring
2017-11-09 9:43 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 28/31] irqchip: Andestech Internal Vector Interrupt Controller driver Greentime Hu
2017-11-08 14:24 ` Marc Zyngier
2017-11-09 10:10 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 29/31] MAINTAINERS: Add nds32 Greentime Hu
2017-11-08 13:31 ` Rob Herring
2017-11-09 9:46 ` Greentime Hu
2017-11-09 10:36 ` Arnd Bergmann
2017-11-14 15:39 ` Joe Perches
2017-11-16 12:22 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 30/31] dt-bindings: nds32 CPU Bindings Greentime Hu
2017-11-08 13:18 ` Rob Herring
2017-11-09 9:39 ` Greentime Hu
2017-11-09 13:57 ` Rob Herring
2017-11-10 6:22 ` Greentime Hu
2017-11-10 8:25 ` Arnd Bergmann
2017-11-10 8:43 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 31/31] net: faraday add nds32 support Greentime Hu
2017-11-08 8:32 ` [PATCH 00/31] Andes(nds32) Linux Kernel Port David Howells
2017-11-08 8:41 ` Greentime Hu
2017-11-08 10:18 ` Arnd Bergmann
2017-11-09 9:26 ` Greentime Hu
2017-11-08 10:26 ` Arnd Bergmann
2017-11-09 9:33 ` Greentime Hu
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