From: Greentime Hu <green.hu@gmail.com>
To: greentime@andestech.com, linux-kernel@vger.kernel.org,
arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de,
jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org,
netdev@vger.kernel.org
Cc: green.hu@gmail.com, Vincent Chen <vincentc@andestech.com>
Subject: [PATCH 20/31] nds32: L2 cache support
Date: Wed, 8 Nov 2017 13:55:08 +0800 [thread overview]
Message-ID: <b8c4d4dd7b5ce02123300018041923d0dfa97af9.1510118606.git.green.hu@gmail.com> (raw)
In-Reply-To: <cover.1510118606.git.green.hu@gmail.com>
In-Reply-To: <cover.1510118606.git.green.hu@gmail.com>
From: Greentime Hu <greentime@andestech.com>
Signed-off-by: Vincent Chen <vincentc@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
---
arch/nds32/include/asm/l2_cache.h | 158 +++++++++++++++++++++++++++++++++++++
arch/nds32/kernel/atl2c.c | 77 ++++++++++++++++++
2 files changed, 235 insertions(+)
create mode 100644 arch/nds32/include/asm/l2_cache.h
create mode 100644 arch/nds32/kernel/atl2c.c
diff --git a/arch/nds32/include/asm/l2_cache.h b/arch/nds32/include/asm/l2_cache.h
new file mode 100644
index 0000000..b8530bd
--- /dev/null
+++ b/arch/nds32/include/asm/l2_cache.h
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef L2_CACHE_H
+#define L2_CACHE_H
+
+/* This is defined for head.S to use due to device tree is not yet built. */
+#define L2CC_PA_BASE 0x90F00000
+
+/* CCTL_CMD_OP */
+#define L2_CA_CONF_OFF 0x0
+#define L2_IF_CONF_OFF 0x4
+#define L2CC_SETUP_OFF 0x8
+#define L2CC_PROT_OFF 0xC
+#define L2CC_CTRL_OFF 0x10
+#define L2_INT_EN_OFF 0x20
+#define L2_STA_OFF 0x24
+#define RDERR_ADDR_OFF 0x28
+#define WRERR_ADDR_OFF 0x2c
+#define EVDPTERR_ADDR_OFF 0x30
+#define IMPL3ERR_ADDR_OFF 0x34
+#define L2_CNT0_CTRL_OFF 0x40
+#define L2_EVNT_CNT0_OFF 0x44
+#define L2_CNT1_CTRL_OFF 0x48
+#define L2_EVNT_CNT1_OFF 0x4c
+#define L2_CCTL_CMD_OFF 0x60
+#define L2_CCTL_STATUS_OFF 0x64
+#define L2_LINE_TAG_OFF 0x68
+#define L2_LINE_DPT_OFF 0x70
+
+#define CCTL_CMD_L2_IX_INVAL 0x0
+#define CCTL_CMD_L2_PA_INVAL 0x1
+#define CCTL_CMD_L2_IX_WB 0x2
+#define CCTL_CMD_L2_PA_WB 0x3
+#define CCTL_CMD_L2_PA_WBINVAL 0x5
+#define CCTL_CMD_L2_SYNC 0xa
+
+/* CCTL_CMD_TYPE */
+#define CCTL_SINGLE_CMD 0
+#define CCTL_BLOCK_CMD 0x10
+#define CCTL_ALL_CMD 0x10
+
+/******************************************************************************
+ * L2_CA_CONF (Cache architecture configuration)
+ *****************************************************************************/
+#define L2_CA_CONF_offL2SET 0
+#define L2_CA_CONF_offL2WAY 4
+#define L2_CA_CONF_offL2CLSZ 8
+#define L2_CA_CONF_offL2DW 11
+#define L2_CA_CONF_offL2PT 14
+#define L2_CA_CONF_offL2VER 16
+
+#define L2_CA_CONF_mskL2SET (0xFUL << L2_CA_CONF_offL2SET)
+#define L2_CA_CONF_mskL2WAY (0xFUL << L2_CA_CONF_offL2WAY)
+#define L2_CA_CONF_mskL2CLSZ (0x7UL << L2_CA_CONF_offL2CLSZ)
+#define L2_CA_CONF_mskL2DW (0x7UL << L2_CA_CONF_offL2DW)
+#define L2_CA_CONF_mskL2PT (0x3UL << L2_CA_CONF_offL2PT)
+#define L2_CA_CONF_mskL2VER (0xFFFFUL << L2_CA_CONF_offL2VER)
+
+/******************************************************************************
+ * L2CC_SETUP (L2CC Setup register)
+ *****************************************************************************/
+#define L2CC_SETUP_offPART 0
+#define L2CC_SETUP_mskPART (0x3UL << L2CC_SETUP_offPART)
+#define L2CC_SETUP_offDDLATC 4
+#define L2CC_SETUP_mskDDLATC (0x3UL << L2CC_SETUP_offDDLATC)
+#define L2CC_SETUP_offTDLATC 8
+#define L2CC_SETUP_mskTDLATC (0x3UL << L2CC_SETUP_offTDLATC)
+
+/******************************************************************************
+ * L2CC_PROT (L2CC Protect register)
+ *****************************************************************************/
+#define L2CC_PROT_offMRWEN 31
+#define L2CC_PROT_mskMRWEN (0x1UL << L2CC_PROT_offMRWEN)
+
+/******************************************************************************
+ * L2_CCTL_STATUS_Mn (The L2CCTL command working status for Master n)
+ *****************************************************************************/
+#define L2CC_CTRL_offEN 31
+#define L2CC_CTRL_mskEN (0x1UL << L2CC_CTRL_offEN)
+
+/******************************************************************************
+ * L2_CCTL_STATUS_Mn (The L2CCTL command working status for Master n)
+ *****************************************************************************/
+#define L2_CCTL_STATUS_offCMD_COMP 31
+#define L2_CCTL_STATUS_mskCMD_COMP (0x1 << L2_CCTL_STATUS_offCMD_COMP)
+
+#ifndef __ASSEMBLY__
+extern void __iomem *atl2c_base;
+
+#include <linux/smp.h>
+#include <asm/io.h>
+#include <asm/bitfield.h>
+
+#define L2C_R_REG(offset) __raw_readl(atl2c_base + offset)
+#define L2C_W_REG(offset, value) __raw_writel(value, atl2c_base + offset)
+
+#define L2_CMD_RDY() \
+ do{;}while((L2C_R_REG(L2_CCTL_STATUS_OFF) & L2_CCTL_STATUS_mskCMD_COMP) == 0)
+
+static inline unsigned long L2_CACHE_SET(void)
+{
+ return 64 << ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2SET) >>
+ L2_CA_CONF_offL2SET);
+}
+
+static inline unsigned long L2_CACHE_WAY(void)
+{
+ return 1 +
+ ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2WAY) >>
+ L2_CA_CONF_offL2WAY);
+}
+
+static inline unsigned long L2_CACHE_LINE_SIZE(void)
+{
+
+ return 4 << ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2CLSZ) >>
+ L2_CA_CONF_offL2CLSZ);
+}
+
+static inline unsigned long GET_L2CC_CTRL_CPU(unsigned long cpu)
+{
+ if (cpu == smp_processor_id())
+ return L2C_R_REG(L2CC_CTRL_OFF);
+ return L2C_R_REG(L2CC_CTRL_OFF + (cpu << 8));
+}
+
+static inline void SET_L2CC_CTRL_CPU(unsigned long cpu, unsigned long val)
+{
+ if (cpu == smp_processor_id())
+ L2C_W_REG(L2CC_CTRL_OFF, val);
+ else
+ L2C_W_REG(L2CC_CTRL_OFF + (cpu << 8), val);
+}
+
+static inline unsigned long GET_L2CC_STATUS_CPU(unsigned long cpu)
+{
+ if (cpu == smp_processor_id())
+ return L2C_R_REG(L2_CCTL_STATUS_OFF);
+ return L2C_R_REG(L2_CCTL_STATUS_OFF + (cpu << 8));
+}
+
+#endif
+
+#endif
diff --git a/arch/nds32/kernel/atl2c.c b/arch/nds32/kernel/atl2c.c
new file mode 100644
index 0000000..dd87fc9
--- /dev/null
+++ b/arch/nds32/kernel/atl2c.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/compiler.h>
+#include <linux/of_address.h>
+#include <linux/of_fdt.h>
+#include <linux/of_platform.h>
+#include <asm/l2_cache.h>
+
+void __iomem *atl2c_base;
+static const struct of_device_id atl2c_ids[] __initconst = {
+ {.compatible = "andestech,atl2c",}
+};
+
+static int __init atl2c_of_init(void)
+{
+ struct device_node *np;
+ struct resource res;
+ unsigned long tmp = 0;
+ unsigned long l2set, l2way, l2clsz;
+
+ if (!(__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskL2C))
+ return -ENODEV;
+
+ np = of_find_matching_node(NULL, atl2c_ids);
+ if (!np)
+ return -ENODEV;
+
+ if (of_address_to_resource(np, 0, &res))
+ return -ENODEV;
+
+ atl2c_base = ioremap(res.start, resource_size(&res));
+ if (!atl2c_base)
+ return -ENOMEM;
+
+ l2set =
+ 64 << ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2SET) >>
+ L2_CA_CONF_offL2SET);
+ l2way =
+ 1 +
+ ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2WAY) >>
+ L2_CA_CONF_offL2WAY);
+ l2clsz =
+ 4 << ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2CLSZ) >>
+ L2_CA_CONF_offL2CLSZ);
+ pr_info("L2:%luKB/%luS/%luW/%luB\n",
+ l2set * l2way * l2clsz / 1024, l2set, l2way, l2clsz);
+
+ tmp = L2C_R_REG(L2CC_PROT_OFF);
+ tmp &= ~L2CC_PROT_mskMRWEN;
+ L2C_W_REG(L2CC_PROT_OFF, tmp);
+
+ tmp = L2C_R_REG(L2CC_SETUP_OFF);
+ tmp &= ~L2CC_SETUP_mskPART;
+ L2C_W_REG(L2CC_SETUP_OFF, tmp);
+
+ tmp = L2C_R_REG(L2CC_CTRL_OFF);
+ tmp |= L2CC_CTRL_mskEN;
+ L2C_W_REG(L2CC_CTRL_OFF, tmp);
+
+ return 0;
+}
+
+subsys_initcall(atl2c_of_init);
--
1.7.9.5
next prev parent reply other threads:[~2017-11-08 6:21 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-08 5:54 [PATCH 00/31] Andes(nds32) Linux Kernel Port Greentime Hu
2017-11-08 5:54 ` [PATCH 01/31] nds32: Assembly macros and definitions Greentime Hu
2017-11-08 5:54 ` [PATCH 02/31] nds32: Kernel booting and initialization Greentime Hu
2017-11-08 13:38 ` Rob Herring
2017-11-09 9:49 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 03/31] nds32: Support early_printk Greentime Hu
2017-11-08 9:47 ` Tobias Klauser
2017-11-09 7:19 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 04/31] nds32: Exception handling Greentime Hu
2017-11-08 8:23 ` Arnd Bergmann
[not found] ` <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B4974CE@ATCPCS16.andestech.com>
2017-11-13 10:54 ` Fwd: FW: " Vincent Chen
2017-11-08 5:54 ` [PATCH 05/31] nds32: MMU definitions Greentime Hu
2017-11-08 8:36 ` Arnd Bergmann
2017-11-08 8:46 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 06/31] nds32: MMU initialization Greentime Hu
2017-11-08 5:54 ` [PATCH 07/31] nds32: MMU fault handling and page table management Greentime Hu
2017-11-08 5:54 ` [PATCH 08/31] nds32: Cache and TLB routines Greentime Hu
2017-11-08 8:45 ` Arnd Bergmann
2017-11-08 9:01 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 09/31] nds32: Process management Greentime Hu
2017-11-08 5:54 ` [PATCH 10/31] nds32: IRQ handling Greentime Hu
2017-11-08 8:49 ` Arnd Bergmann
2017-11-08 9:06 ` Greentime Hu
2017-11-08 5:54 ` [PATCH 11/31] nds32: Atomic operations Greentime Hu
2017-11-08 8:54 ` Arnd Bergmann
2017-11-08 9:32 ` vincentc
2017-11-20 14:29 ` Will Deacon
2017-11-22 3:02 ` Vincent Chen
2017-11-08 5:55 ` [PATCH 12/31] nds32: Device specific operations Greentime Hu
2017-11-08 9:04 ` Arnd Bergmann
2017-11-09 7:04 ` Greentime Hu
2017-11-10 16:07 ` Greentime Hu
2017-11-10 16:14 ` Arnd Bergmann
2017-11-22 10:02 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 13/31] nds32: DMA mapping API Greentime Hu
2017-11-08 9:09 ` Arnd Bergmann
2017-11-09 7:12 ` Greentime Hu
2017-11-09 10:14 ` Arnd Bergmann
2017-11-10 8:13 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 14/31] nds32: ELF definitions Greentime Hu
2017-11-08 5:55 ` [PATCH 15/31] nds32: System calls handling Greentime Hu
2017-11-08 9:30 ` Arnd Bergmann
[not found] ` <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B497241@ATCPCS16.andestech.com>
2017-11-13 2:51 ` Fwd: FW: " Vincent Chen
2017-11-13 11:42 ` Arnd Bergmann
2017-11-22 3:13 ` Vincent Chen
2017-11-08 5:55 ` [PATCH 16/31] nds32: VDSO support Greentime Hu
2017-11-08 9:37 ` Arnd Bergmann
2017-11-08 20:00 ` Deepa Dinamani
2017-11-08 20:06 ` Arnd Bergmann
2017-11-08 20:14 ` Deepa Dinamani
2017-11-08 5:55 ` [PATCH 17/31] nds32: Signal handling support Greentime Hu
2017-11-09 1:26 ` Al Viro
[not found] ` <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B497460@ATCPCS16.andestech.com>
2017-11-13 2:34 ` Fwd: FW: " Vincent Chen
2017-11-08 5:55 ` [PATCH 18/31] nds32: Library functions Greentime Hu
2017-11-08 9:45 ` Arnd Bergmann
2017-11-09 0:40 ` Al Viro
[not found] ` <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B497559@ATCPCS16.andestech.com>
2017-11-14 4:47 ` Fwd: FW: " Vincent Chen
2017-11-18 2:44 ` Al Viro
2017-11-08 5:55 ` [PATCH 19/31] nds32: Debugging support Greentime Hu
2017-11-08 5:55 ` Greentime Hu [this message]
2017-11-08 9:48 ` [PATCH 20/31] nds32: L2 cache support Arnd Bergmann
2017-11-09 7:24 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 21/31] nds32: Loadable modules Greentime Hu
2017-11-08 5:55 ` [PATCH 22/31] nds32: Generic timers support Greentime Hu
2017-11-08 5:55 ` [PATCH 23/31] nds32: Device tree support Greentime Hu
2017-11-08 9:53 ` Arnd Bergmann
2017-11-09 7:48 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 24/31] nds32: Miscellaneous header files Greentime Hu
2017-11-08 9:57 ` Arnd Bergmann
2017-11-08 5:55 ` [PATCH 25/31] nds32: defconfig Greentime Hu
2017-11-08 10:03 ` Arnd Bergmann
2017-11-09 8:00 ` Greentime Hu
2017-11-09 10:20 ` Arnd Bergmann
2017-11-10 8:16 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 26/31] nds32: Build infrastructure Greentime Hu
2017-11-08 10:16 ` Arnd Bergmann
2017-11-09 9:02 ` Greentime Hu
2017-11-09 10:33 ` Arnd Bergmann
2017-11-10 8:26 ` Greentime Hu
2017-11-17 12:39 ` Greentime Hu
2017-11-17 12:50 ` Arnd Bergmann
2017-11-17 13:50 ` Greentime Hu
2017-11-13 10:45 ` Geert Uytterhoeven
2017-11-16 10:03 ` Greentime Hu
2017-11-16 10:25 ` Arnd Bergmann
2017-11-17 13:53 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 27/31] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller Greentime Hu
2017-11-08 13:25 ` Rob Herring
2017-11-09 9:43 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 28/31] irqchip: Andestech Internal Vector Interrupt Controller driver Greentime Hu
2017-11-08 14:24 ` Marc Zyngier
2017-11-09 10:10 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 29/31] MAINTAINERS: Add nds32 Greentime Hu
2017-11-08 13:31 ` Rob Herring
2017-11-09 9:46 ` Greentime Hu
2017-11-09 10:36 ` Arnd Bergmann
2017-11-14 15:39 ` Joe Perches
2017-11-16 12:22 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 30/31] dt-bindings: nds32 CPU Bindings Greentime Hu
2017-11-08 13:18 ` Rob Herring
2017-11-09 9:39 ` Greentime Hu
2017-11-09 13:57 ` Rob Herring
2017-11-10 6:22 ` Greentime Hu
2017-11-10 8:25 ` Arnd Bergmann
2017-11-10 8:43 ` Greentime Hu
2017-11-08 5:55 ` [PATCH 31/31] net: faraday add nds32 support Greentime Hu
2017-11-08 8:32 ` [PATCH 00/31] Andes(nds32) Linux Kernel Port David Howells
2017-11-08 8:41 ` Greentime Hu
2017-11-08 10:18 ` Arnd Bergmann
2017-11-09 9:26 ` Greentime Hu
2017-11-08 10:26 ` Arnd Bergmann
2017-11-09 9:33 ` Greentime Hu
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