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From: Chen-Yu Tsai <wens@csie.org>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: Linux Media Mailing List <linux-media@vger.kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	devel@driverdev.osuosl.org,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-sunxi@googlegroups.com, Hans Verkuil <hverkuil@xs4all.nl>,
	Sakari Ailus <sakari.ailus@linux.intel.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH 10/15] arm64: dts: allwinner: a64: Add support for the SRAM C1 section
Date: Fri, 16 Nov 2018 00:39:59 +0800	[thread overview]
Message-ID: <CAGb2v66twfxzMzO-E1WH78N6O9N1J_AcPQcKp3FApE1gTKmn3Q@mail.gmail.com> (raw)
In-Reply-To: <20181115145013.3378-11-paul.kocialkowski@bootlin.com>

On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
<paul.kocialkowski@bootlin.com> wrote:
>
> Add the description for the SRAM C1 section to the A64 device-tree.
>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index f3a66f888205..88b3e9110833 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -277,6 +277,20 @@
>                                         reg = <0x0000 0x28000>;
>                                 };
>                         };
> +
> +                       sram_c1: sram@1d00000 {
> +                               compatible = "mmio-sram";
> +                               reg = <0x01d00000 0x80000>;

I can confirm that this SRAM region is indeed at this address. However the
size is only 0x40000, not 0x80000. The address ranges should be fixed.

One hiccup is that the VE reset has to be de-asserted and the VE bus clock
has to be ungated for the CPU to access this region when it's mapped to the
CPU.

One other thing I find interesting is that in the previous SoCs, the bits
that control this mapping says 50K, but in reality it is 512K for the older
SoCs, and 256K for this one.

ChenYu

> +                               #address-cells = <1>;
> +                               #size-cells = <1>;
> +                               ranges = <0 0x01d00000 0x80000>;
> +
> +                               ve_sram: sram-section@0 {
> +                                       compatible = "allwinner,sun50i-a64-sram-c1",
> +                                                    "allwinner,sun4i-a10-sram-c1";
> +                                       reg = <0x000000 0x80000>;
> +                               };
> +                       };
>                 };
>
>                 dma: dma-controller@1c02000 {
> --
> 2.19.1
>

  reply	other threads:[~2018-11-15 16:40 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-15 14:49 [PATCH 00/15] Cedrus support for the Allwinner H5 and A64 platforms Paul Kocialkowski
2018-11-15 14:49 ` [PATCH 01/15] ARM: dts: sun8i-a33: Remove heading 0 in video-codec unit address Paul Kocialkowski
2018-11-15 15:50   ` Chen-Yu Tsai
2018-11-16  9:59     ` Paul Kocialkowski
2018-11-15 14:50 ` [PATCH 02/15] ARM: dts: sun8i-h3: " Paul Kocialkowski
2018-11-15 15:50   ` Chen-Yu Tsai
2018-11-15 14:50 ` [PATCH 03/15] ARM: dts: sun8i-h3: Fix the system-control register range Paul Kocialkowski
2018-11-15 15:51   ` Chen-Yu Tsai
2018-11-15 14:50 ` [PATCH 04/15] soc: sunxi: sram: Enable EMAC clock access for H3 variant Paul Kocialkowski
2018-11-15 15:53   ` Chen-Yu Tsai
2018-11-15 14:50 ` [PATCH 05/15] dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1 Paul Kocialkowski
2018-12-04 21:46   ` Rob Herring
2018-11-15 14:50 ` [PATCH 06/15] soc: sunxi: sram: Add support for the H5 SoC system control Paul Kocialkowski
2018-11-15 14:50 ` [PATCH 07/15] arm64: dts: allwinner: h5: Add system-control node with SRAM C1 Paul Kocialkowski
2018-11-15 16:52   ` Chen-Yu Tsai
2018-11-30  3:38     ` Chen-Yu Tsai
2018-11-30 13:26       ` Paul Kocialkowski
2018-11-15 14:50 ` [PATCH 08/15] ARM/arm64: sunxi: Move H3/H5 syscon label over to soc-specific nodes Paul Kocialkowski
2018-11-16  9:39   ` Maxime Ripard
2018-11-16  9:47     ` Chen-Yu Tsai
2018-11-16  9:56       ` Paul Kocialkowski
2018-11-16 16:39       ` Maxime Ripard
2018-11-15 14:50 ` [PATCH 09/15] dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1 Paul Kocialkowski
2018-12-04 21:47   ` Rob Herring
2018-11-15 14:50 ` [PATCH 10/15] arm64: dts: allwinner: a64: Add support for the SRAM C1 section Paul Kocialkowski
2018-11-15 16:39   ` Chen-Yu Tsai [this message]
2018-11-15 14:50 ` [PATCH 11/15] dt-bindings: media: cedrus: Add compatibles for the A64 and H5 Paul Kocialkowski
2018-12-04 21:47   ` Rob Herring
2018-11-15 14:50 ` [PATCH 12/15] media: cedrus: Add device-tree compatible and variant for H5 support Paul Kocialkowski
2018-11-15 14:50 ` [PATCH 13/15] media: cedrus: Add device-tree compatible and variant for A64 support Paul Kocialkowski
2018-11-15 14:50 ` [PATCH 14/15] arm64: dts: allwinner: h5: Add Video Engine and reserved memory node Paul Kocialkowski
2018-11-15 15:35   ` [linux-sunxi] " Chen-Yu Tsai
2018-11-30 13:16     ` Paul Kocialkowski
2018-11-15 14:50 ` [PATCH 15/15] arm64: dts: allwinner: a64: " Paul Kocialkowski
2018-11-16  9:41   ` Maxime Ripard

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