* [PATCH v2 1/3] reset: hisilicon: Add media reset controller binding
2016-06-16 10:29 [PATCH v2 0/3] Add hi6220 media subsystem reset controller driver Xinliang Liu
@ 2016-06-16 10:29 ` Xinliang Liu
2016-06-16 10:46 ` Philipp Zabel
2016-06-16 10:29 ` [PATCH v2 2/3] arm64: dts: hi6220: Add media subsystem reset dts Xinliang Liu
2016-06-16 10:30 ` [PATCH v2 3/3] reset: hisilicon: Add hi6220 media subsystem reset support Xinliang Liu
2 siblings, 1 reply; 8+ messages in thread
From: Xinliang Liu @ 2016-06-16 10:29 UTC (permalink / raw)
To: p.zabel
Cc: linux-kernel, robh+dt, xuwei5, puck.chen, saberlily.xia,
kong.kongxinwei, guodong.xu, Xinliang Liu
Add compatible for media reset controller.
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
---
Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
index e0b185a944ba..c25da39df707 100644
--- a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
+++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
@@ -8,7 +8,9 @@ The reset controller registers are part of the system-ctl block on
hi6220 SoC.
Required properties:
-- compatible: may be "hisilicon,hi6220-sysctrl"
+- compatible: should be one of the following:
+ - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
+ - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.
- reg: should be register base and length as documented in the
datasheet
- #reset-cells: 1, see below
--
2.8.3
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/3] arm64: dts: hi6220: Add media subsystem reset dts
2016-06-16 10:29 [PATCH v2 0/3] Add hi6220 media subsystem reset controller driver Xinliang Liu
2016-06-16 10:29 ` [PATCH v2 1/3] reset: hisilicon: Add media reset controller binding Xinliang Liu
@ 2016-06-16 10:29 ` Xinliang Liu
2016-06-16 10:30 ` [PATCH v2 3/3] reset: hisilicon: Add hi6220 media subsystem reset support Xinliang Liu
2 siblings, 0 replies; 8+ messages in thread
From: Xinliang Liu @ 2016-06-16 10:29 UTC (permalink / raw)
To: p.zabel
Cc: linux-kernel, robh+dt, xuwei5, puck.chen, saberlily.xia,
kong.kongxinwei, guodong.xu, Xinliang Liu
Add media subsystem reset support.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 ++
include/dt-bindings/reset/hisi,hi6220-resets.h | 8 ++++++++
2 files changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 189d21541f9c..c19b82799a34 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -5,6 +5,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/hisi,hi6220-resets.h>
#include <dt-bindings/clock/hi6220-clock.h>
#include <dt-bindings/pinctrl/hisi.h>
#include <dt-bindings/thermal/thermal.h>
@@ -252,6 +253,7 @@
compatible = "hisilicon,hi6220-mediactrl", "syscon";
reg = <0x0 0xf4410000 0x0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
pm_ctrl: pm_ctrl@f7032000 {
diff --git a/include/dt-bindings/reset/hisi,hi6220-resets.h b/include/dt-bindings/reset/hisi,hi6220-resets.h
index ca08a7e5248e..322ec5335b65 100644
--- a/include/dt-bindings/reset/hisi,hi6220-resets.h
+++ b/include/dt-bindings/reset/hisi,hi6220-resets.h
@@ -64,4 +64,12 @@
#define PERIPH_RSDIST9_CARM_SOCDBG 0x507
#define PERIPH_RSDIST9_CARM_ETM 0x508
+#define MEDIA_G3D 0
+#define MEDIA_CODEC_VPU 2
+#define MEDIA_CODEC_JPEG 3
+#define MEDIA_ISP 4
+#define MEDIA_ADE 5
+#define MEDIA_MMU 6
+#define MEDIA_XG2RAM1 7
+
#endif /*_DT_BINDINGS_RESET_CONTROLLER_HI6220*/
--
2.8.3
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 3/3] reset: hisilicon: Add hi6220 media subsystem reset support
2016-06-16 10:29 [PATCH v2 0/3] Add hi6220 media subsystem reset controller driver Xinliang Liu
2016-06-16 10:29 ` [PATCH v2 1/3] reset: hisilicon: Add media reset controller binding Xinliang Liu
2016-06-16 10:29 ` [PATCH v2 2/3] arm64: dts: hi6220: Add media subsystem reset dts Xinliang Liu
@ 2016-06-16 10:30 ` Xinliang Liu
2016-06-16 10:52 ` Philipp Zabel
2 siblings, 1 reply; 8+ messages in thread
From: Xinliang Liu @ 2016-06-16 10:30 UTC (permalink / raw)
To: p.zabel
Cc: linux-kernel, robh+dt, xuwei5, puck.chen, saberlily.xia,
kong.kongxinwei, guodong.xu, Xinliang Liu
From: Chen Feng <puck.chen@hisilicon.com>
Add media subsystem reset support for hi6220.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Xia Qing <saberlily.xia@hisilicon.com>
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
---
drivers/reset/hisilicon/hi6220_reset.c | 122 +++++++++++++++++++++++----------
1 file changed, 86 insertions(+), 36 deletions(-)
diff --git a/drivers/reset/hisilicon/hi6220_reset.c b/drivers/reset/hisilicon/hi6220_reset.c
index 8f55fd4a2630..35ce53edabf9 100644
--- a/drivers/reset/hisilicon/hi6220_reset.c
+++ b/drivers/reset/hisilicon/hi6220_reset.c
@@ -1,7 +1,8 @@
/*
* Hisilicon Hi6220 reset controller driver
*
- * Copyright (c) 2015 Hisilicon Limited.
+ * Copyright (c) 2016 Linaro Limited.
+ * Copyright (c) 2015-2016 Hisilicon Limited.
*
* Author: Feng Chen <puck.chen@hisilicon.com>
*
@@ -15,81 +16,130 @@
#include <linux/module.h>
#include <linux/bitops.h>
#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
#include <linux/reset-controller.h>
#include <linux/reset.h>
#include <linux/platform_device.h>
-#define ASSERT_OFFSET 0x300
-#define DEASSERT_OFFSET 0x304
-#define MAX_INDEX 0x509
+#define PERIPH_ASSERT_OFFSET 0x300
+#define PERIPH_DEASSERT_OFFSET 0x304
+#define PERIPH_MAX_INDEX 0x509
+
+#define SC_MEDIA_RSTEN 0x052C
+#define SC_MEDIA_RSTDIS 0x0530
+#define MEDIA_MAX_INDEX 8
#define to_reset_data(x) container_of(x, struct hi6220_reset_data, rc_dev)
+enum hi6220_reset_ctrl_type {
+ PERIPHERAL,
+ MEDIA,
+};
+
struct hi6220_reset_data {
- void __iomem *assert_base;
- void __iomem *deassert_base;
- struct reset_controller_dev rc_dev;
+ struct reset_controller_dev rc_dev;
+ struct regmap *regmap;
};
-static int hi6220_reset_assert(struct reset_controller_dev *rc_dev,
- unsigned long idx)
+static int hi6220_peripheral_assert(struct reset_controller_dev *rc_dev,
+ unsigned long idx)
{
struct hi6220_reset_data *data = to_reset_data(rc_dev);
+ struct regmap *regmap = data->regmap;
+ u32 bank = idx >> 8;
+ u32 offset = idx & 0xff;
+ u32 reg = PERIPH_ASSERT_OFFSET + bank * 0x10;
- int bank = idx >> 8;
- int offset = idx & 0xff;
+ return regmap_write(regmap, reg, BIT(offset));
+}
- writel(BIT(offset), data->assert_base + (bank * 0x10));
+static int hi6220_peripheral_deassert(struct reset_controller_dev *rc_dev,
+ unsigned long idx)
+{
+ struct hi6220_reset_data *data = to_reset_data(rc_dev);
+ struct regmap *regmap = data->regmap;
+ u32 bank = idx >> 8;
+ u32 offset = idx & 0xff;
+ u32 reg = PERIPH_DEASSERT_OFFSET + bank * 0x10;
- return 0;
+ return regmap_write(regmap, reg, BIT(offset));
}
-static int hi6220_reset_deassert(struct reset_controller_dev *rc_dev,
- unsigned long idx)
+static const struct reset_control_ops hi6220_peripheral_reset_ops = {
+ .assert = hi6220_peripheral_assert,
+ .deassert = hi6220_peripheral_deassert,
+};
+
+static int hi6220_media_assert(struct reset_controller_dev *rc_dev,
+ unsigned long idx)
{
struct hi6220_reset_data *data = to_reset_data(rc_dev);
+ struct regmap *regmap = data->regmap;
- int bank = idx >> 8;
- int offset = idx & 0xff;
+ return regmap_write(regmap, SC_MEDIA_RSTEN, BIT(idx));
+}
- writel(BIT(offset), data->deassert_base + (bank * 0x10));
+static int hi6220_media_deassert(struct reset_controller_dev *rc_dev,
+ unsigned long idx)
+{
+ struct hi6220_reset_data *data = to_reset_data(rc_dev);
+ struct regmap *regmap = data->regmap;
- return 0;
+ return regmap_write(regmap, SC_MEDIA_RSTDIS, BIT(idx));
}
-static const struct reset_control_ops hi6220_reset_ops = {
- .assert = hi6220_reset_assert,
- .deassert = hi6220_reset_deassert,
+static const struct reset_control_ops hi6220_media_reset_ops = {
+ .assert = hi6220_media_assert,
+ .deassert = hi6220_media_deassert,
};
static int hi6220_reset_probe(struct platform_device *pdev)
{
+ struct device_node *np = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ enum hi6220_reset_ctrl_type type;
struct hi6220_reset_data *data;
- struct resource *res;
- void __iomem *src_base;
+ struct regmap *regmap;
- data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- src_base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(src_base))
- return PTR_ERR(src_base);
+ type = (enum hi6220_reset_ctrl_type)of_device_get_match_data(dev);
+
+ regmap = syscon_node_to_regmap(np);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "failed to get reset controller regmap\n");
+ return PTR_ERR(regmap);
+ }
- data->assert_base = src_base + ASSERT_OFFSET;
- data->deassert_base = src_base + DEASSERT_OFFSET;
- data->rc_dev.nr_resets = MAX_INDEX;
- data->rc_dev.ops = &hi6220_reset_ops;
- data->rc_dev.of_node = pdev->dev.of_node;
+ data->regmap = regmap;
+ data->rc_dev.of_node = np;
+ if (type == MEDIA) {
+ data->rc_dev.ops = &hi6220_media_reset_ops;
+ data->rc_dev.nr_resets = MEDIA_MAX_INDEX;
+ } else {
+ data->rc_dev.ops = &hi6220_peripheral_reset_ops;
+ data->rc_dev.nr_resets = PERIPH_MAX_INDEX;
+ }
return reset_controller_register(&data->rc_dev);
}
static const struct of_device_id hi6220_reset_match[] = {
- { .compatible = "hisilicon,hi6220-sysctrl" },
- { },
+ {
+ .compatible = "hisilicon,hi6220-sysctrl",
+ .data = (void *)PERIPHERAL,
+ },
+ {
+ .compatible = "hisilicon,hi6220-mediactrl",
+ .data = (void *)MEDIA,
+ },
+ { /* sentinel */ },
};
+MODULE_DEVICE_TABLE(of, hi6220_reset_match);
static struct platform_driver hi6220_reset_driver = {
.probe = hi6220_reset_probe,
--
2.8.3
^ permalink raw reply related [flat|nested] 8+ messages in thread