From: Bruno Thomsen <bruno.thomsen@gmail.com>
To: Hugo Villeneuve <hugo@hugovil.com>
Cc: a.zummo@towertech.it, alexandre.belloni@bootlin.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
linux-rtc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Hugo Villeneuve <hvilleneuve@dimonoff.com>
Subject: Re: [PATCH v3 11/14] rtc: pcf2127: adapt time/date registers write sequence for PCF2131
Date: Sat, 7 Jan 2023 19:44:23 +0100 [thread overview]
Message-ID: <CAH+2xPBD4ezWPzMj4YzF63duWnw3_af6KkC7eq1EWS=5F_5NGw@mail.gmail.com> (raw)
In-Reply-To: <20221215150214.1109074-12-hugo@hugovil.com>
Den tor. 15. dec. 2022 kl. 16.19 skrev Hugo Villeneuve <hugo@hugovil.com>:
>
> From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
>
> The sequence for updating the time/date registers is slightly
> different between PCF2127/29 and PCF2131.
>
> For PCF2127/29, during write operations, the time counting
> circuits (memory locations 03h through 09h) are automatically blocked.
>
> For PCF2131, time/date registers write access requires setting the
> STOP bit and sending the clear prescaler instruction (CPR). STOP then
> needs to be released once write operation is completed.
>
> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> ---
> drivers/rtc/rtc-pcf2127.c | 38 +++++++++++++++++++++++++++++++++++++-
> 1 file changed, 37 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> index e4b78b9c03f9..11fbdab6bf01 100644
> --- a/drivers/rtc/rtc-pcf2127.c
> +++ b/drivers/rtc/rtc-pcf2127.c
> @@ -39,6 +39,7 @@
> #define PCF2127_REG_CTRL1 0x00
> #define PCF2127_BIT_CTRL1_POR_OVRD BIT(3)
> #define PCF2127_BIT_CTRL1_TSF1 BIT(4)
> +#define PCF2127_BIT_CTRL1_STOP BIT(5)
> /* Control register 2 */
> #define PCF2127_REG_CTRL2 0x01
> #define PCF2127_BIT_CTRL2_AIE BIT(1)
> @@ -70,6 +71,7 @@
> #define PCF2131_REG_SR_RESET 0x05
> #define PCF2131_SR_RESET_READ_PATTERN 0b00100100 /* Fixed pattern. */
> #define PCF2131_SR_RESET_RESET_CMD 0x2C /* SR is bit 3. */
> +#define PCF2131_SR_RESET_CPR_CMD 0xA4 /* CPR is bit 7. */
Replace 0xA4 with (BIT(2) | BIT(5) | BIT(7)) or
(PCF2131_SR_RESET_READ_PATTERN | BIT(7))
> /* Time and date registers */
> #define PCF2127_REG_TIME_DATE_BASE 0x03
> #define PCF2131_REG_TIME_DATE_BASE 0x07 /* Register 0x06 is 100th seconds,
> @@ -307,7 +309,31 @@ static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
> /* year */
> buf[i++] = bin2bcd(tm->tm_year - 100);
>
> - /* write register's data */
> + /* Write access to time registers:
> + * PCF2127/29: no special action required.
> + * PCF2131: requires setting the STOP bit. STOP bit needs to
> + * be cleared after time registers are updated.
> + * It is also recommended to set CPR bit, although
> + * write access will work without it.
> + */
> + if (pcf2127->cfg->has_reset_reg) {
> + err = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
> + PCF2127_BIT_CTRL1_STOP,
> + PCF2127_BIT_CTRL1_STOP);
> + if (err) {
> + dev_err(dev, "setting STOP bit failed\n");
> + return err;
> + }
> +
> + err = regmap_write(pcf2127->regmap, pcf2127->cfg->reg_reset,
> + PCF2131_SR_RESET_CPR_CMD);
> + if (err) {
> + dev_err(dev, "sending CPR cmd failed\n");
> + return err;
> + }
> + }
> +
> + /* write time register's data */
> err = regmap_bulk_write(pcf2127->regmap, pcf2127->cfg->regs_td_base, buf, i);
> if (err) {
> dev_err(dev,
> @@ -315,6 +341,16 @@ static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
> return err;
> }
>
> + if (pcf2127->cfg->has_reset_reg) {
> + /* Clear STOP bit (PCF2131 only) after write is completed. */
> + err = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
> + PCF2127_BIT_CTRL1_STOP, 0);
> + if (err) {
> + dev_err(dev, "clearing STOP bit failed\n");
> + return err;
> + }
> + }
> +
> return 0;
> }
>
> --
> 2.30.2
>
next prev parent reply other threads:[~2023-01-07 18:44 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-15 15:02 [PATCH v3 00/14] rtc: pcf2127: add PCF2131 driver Hugo Villeneuve
2022-12-15 15:02 ` [PATCH v3 01/14] rtc: pcf2127: add variant-specific configuration structure Hugo Villeneuve
2022-12-19 9:05 ` Bruno Thomsen
2022-12-19 15:15 ` Hugo Villeneuve
2022-12-19 17:17 ` Bruno Thomsen
2022-12-19 18:30 ` Hugo Villeneuve
2023-01-07 16:52 ` Bruno Thomsen
2022-12-15 15:02 ` [PATCH v3 02/14] rtc: pcf2127: adapt for time/date registers at any offset Hugo Villeneuve
2022-12-19 9:34 ` Bruno Thomsen
2022-12-19 16:27 ` Hugo Villeneuve
2023-01-07 16:49 ` Bruno Thomsen
2023-01-20 18:47 ` Alexandre Belloni
2023-01-23 15:54 ` Hugo Villeneuve
2023-06-21 18:18 ` Alexandre Belloni
2022-12-15 15:02 ` [PATCH v3 03/14] rtc: pcf2127: adapt for alarm " Hugo Villeneuve
2023-01-07 16:57 ` Bruno Thomsen
2023-01-20 17:10 ` Alexandre Belloni
2023-01-23 16:02 ` Hugo Villeneuve
2022-12-15 15:02 ` [PATCH v3 04/14] rtc: pcf2127: adapt for WD " Hugo Villeneuve
2023-01-07 16:59 ` Bruno Thomsen
2022-12-15 15:02 ` [PATCH v3 05/14] rtc: pcf2127: adapt for CLKOUT register " Hugo Villeneuve
2023-01-07 17:01 ` Bruno Thomsen
2022-12-15 15:02 ` [PATCH v3 06/14] rtc: pcf2127: add support for multiple TS functions Hugo Villeneuve
2023-01-07 17:58 ` Bruno Thomsen
2023-01-23 20:41 ` Hugo Villeneuve
2022-12-15 15:02 ` [PATCH v3 07/14] rtc: pcf2127: add support for PCF2131 RTC Hugo Villeneuve
2023-01-07 18:15 ` Bruno Thomsen
2023-01-23 19:06 ` Hugo Villeneuve
2023-01-20 18:57 ` Alexandre Belloni
2023-01-23 17:27 ` Hugo Villeneuve
2022-12-15 15:02 ` [PATCH v3 08/14] rtc: pcf2127: add support for PCF2131 interrupts on output INT_A Hugo Villeneuve
2023-01-07 18:17 ` Bruno Thomsen
2023-01-20 16:56 ` Alexandre Belloni
2023-01-23 20:52 ` Hugo Villeneuve
2023-05-11 17:19 ` Hugo Villeneuve
2023-06-21 19:24 ` Alexandre Belloni
2023-06-21 19:26 ` Alexandre Belloni
2023-06-22 14:21 ` Hugo Villeneuve
2022-12-15 15:02 ` [PATCH v3 09/14] rtc: pcf2127: set PWRMNG value for PCF2131 Hugo Villeneuve
2023-01-07 18:36 ` Bruno Thomsen
2023-01-20 16:39 ` Alexandre Belloni
2023-01-23 22:07 ` Hugo Villeneuve
2022-12-15 15:02 ` [PATCH v3 10/14] rtc: pcf2127: read and validate PCF2131 device signature Hugo Villeneuve
2023-01-20 17:01 ` Alexandre Belloni
2023-01-23 17:31 ` Hugo Villeneuve
2022-12-15 15:02 ` [PATCH v3 11/14] rtc: pcf2127: adapt time/date registers write sequence for PCF2131 Hugo Villeneuve
2023-01-07 18:44 ` Bruno Thomsen [this message]
2023-01-23 20:55 ` Hugo Villeneuve
2023-01-20 17:09 ` Alexandre Belloni
2023-01-23 21:57 ` Hugo Villeneuve
2023-06-21 19:36 ` Alexandre Belloni
2022-12-15 15:02 ` [PATCH v3 12/14] rtc: pcf2127: support generic watchdog timing configuration Hugo Villeneuve
2023-01-18 13:23 ` Philipp Rosenberger
2023-01-19 17:48 ` Hugo Villeneuve
2023-01-20 8:06 ` Philipp Rosenberger
2023-01-20 14:44 ` Hugo Villeneuve
2022-12-15 15:02 ` [PATCH v3 13/14] rtc: pcf2127: add flag for watchdog register value read support Hugo Villeneuve
2023-01-07 18:47 ` Bruno Thomsen
2022-12-15 15:02 ` [PATCH v3 14/14] dt-bindings: rtc: pcf2127: add PCF2131 Hugo Villeneuve
2022-12-16 13:24 ` Krzysztof Kozlowski
2022-12-19 9:14 ` Bruno Thomsen
2022-12-19 16:25 ` Hugo Villeneuve
2022-12-19 17:18 ` Bruno Thomsen
2022-12-19 18:31 ` Hugo Villeneuve
2023-01-20 19:05 ` [PATCH v3 00/14] rtc: pcf2127: add PCF2131 driver Alexandre Belloni
2023-01-23 15:51 ` Hugo Villeneuve
2023-06-21 14:14 ` Hugo Villeneuve
2023-06-21 16:59 ` Hugo Villeneuve
2023-06-21 18:14 ` Alexandre Belloni
2023-06-21 18:28 ` Hugo Villeneuve
2023-07-05 13:40 ` Hugo Villeneuve
2023-07-07 14:16 ` Alexandre Belloni
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