From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PING][PATCH v3 0/2] serial: 8250: Fixes for Oxford Semiconductor 950 UARTs
Date: Thu, 14 Apr 2022 15:45:37 +0300 [thread overview]
Message-ID: <CAHp75VdOf3+j8yQh=-f6iCN_gRhisgoQjov2kK1fhgv7xaBJRg@mail.gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2204132103190.9383@angie.orcam.me.uk>
On Thu, Apr 14, 2022 at 1:53 AM Maciej W. Rozycki <macro@orcam.me.uk> wrote:
> On Thu, 31 Mar 2022, Maciej W. Rozycki wrote:
>
> > Here's v3 of the outstanding fixes for Oxford Semiconductor 950 UARTs.
> > As the change for the default FIFO rx trigger level has been already
> > merged with commit d7aff291d069 ("serial: 8250: Define RX trigger levels
> > for OxSemi 950 devices") only one patch of the original series remains.
>
> Ping for:
> <https://lore.kernel.org/lkml/alpine.DEB.2.21.2203310114210.44113@angie.orcam.me.uk/>
I still didn't get the answer why BOTHER can't be used instead of
spreading the old hack. You mentioned fractional baud rates and
something else, and I asked why do you need them and from where you
got the limitation of 16-bit values for dividers when using BOTHER.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2022-04-14 12:46 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-31 7:11 [RESEND][PATCH v3 0/2] serial: 8250: Fixes for Oxford Semiconductor 950 UARTs Maciej W. Rozycki
2022-03-31 7:11 ` [RESEND][PATCH v3 1/2] serial: 8250: Fold EndRun device support into OxSemi Tornado code Maciej W. Rozycki
2022-04-15 9:13 ` Greg Kroah-Hartman
2022-04-17 23:02 ` Maciej W. Rozycki
2022-04-20 14:48 ` Greg Kroah-Hartman
2022-04-21 21:38 ` Maciej W. Rozycki
2022-04-15 9:13 ` Greg Kroah-Hartman
2022-04-17 23:03 ` Maciej W. Rozycki
2022-03-31 7:11 ` [RESEND][PATCH v3 2/2] serial: 8250: Add proper clock handling for OxSemi PCIe devices Maciej W. Rozycki
2022-04-13 22:53 ` [PING][PATCH v3 0/2] serial: 8250: Fixes for Oxford Semiconductor 950 UARTs Maciej W. Rozycki
2022-04-14 12:45 ` Andy Shevchenko [this message]
2022-04-14 13:47 ` Maciej W. Rozycki
2022-04-14 13:55 ` Andy Shevchenko
-- strict thread matches above, loose matches on Subject: below --
2022-02-12 8:41 [PATCH " Maciej W. Rozycki
2022-03-01 20:52 ` [PING][PATCH " Maciej W. Rozycki
2022-03-18 12:10 ` Greg Kroah-Hartman
2022-03-31 7:12 ` Maciej W. Rozycki
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