[PATCH] dt-bindings: timer: sifive,clint: Fix number of interrupts

[PATCH] dt-bindings: timer: sifive,clint: Fix number of interrupts

[Geert Uytterhoeven]

To improve human readability and enable automatic validation, the tuples
in "interrupts-extended" properties should be grouped using angle
brackets.  As the DT bindings lack an upper bound on the number of
interrupts, thus assuming one, proper grouping is currently flagged as
an error.

Fix this by adding the missing "maxItems", limiting it to 10 interrupts
(two interrupts for a system management core, and two interrupts per
core for other cores), which should be sufficient for now.

Group the tuples in the example.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
---
 .../devicetree/bindings/timer/sifive,clint.yaml          | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index a35952f487426988..55bec2d059807c48 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -43,6 +43,7 @@ properties:
 
   interrupts-extended:
     minItems: 1
+    maxItems: 10
 
 additionalProperties: false
 
@@ -55,10 +56,10 @@ examples:
   - |
     timer@2000000 {
       compatible = "sifive,fu540-c000-clint", "sifive,clint0";
-      interrupts-extended = <&cpu1intc 3 &cpu1intc 7
-                             &cpu2intc 3 &cpu2intc 7
-                             &cpu3intc 3 &cpu3intc 7
-                             &cpu4intc 3 &cpu4intc 7>;
+      interrupts-extended = <&cpu1intc 3>, <&cpu1intc 7>,
+                            <&cpu2intc 3>, <&cpu2intc 7>,
+                            <&cpu3intc 3>, <&cpu3intc 7>,
+                            <&cpu4intc 3>, <&cpu4intc 7>;
        reg = <0x2000000 0x10000>;
     };
 ...
-- 
2.25.1

Re: [PATCH] dt-bindings: timer: sifive,clint: Fix number of interrupts

[Geert Uytterhoeven]

On Thu, Nov 25, 2021 at 4:23 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> To improve human readability and enable automatic validation, the tuples
> in "interrupts-extended" properties should be grouped using angle
> brackets.  As the DT bindings lack an upper bound on the number of
> interrupts, thus assuming one, proper grouping is currently flagged as
> an error.
>
> Fix this by adding the missing "maxItems", limiting it to 10 interrupts
> (two interrupts for a system management core, and two interrupts per
> core for other cores), which should be sufficient for now.
>
> Group the tuples in the example.
>
> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> ---
>  .../devicetree/bindings/timer/sifive,clint.yaml          | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> index a35952f487426988..55bec2d059807c48 100644
> --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> @@ -43,6 +43,7 @@ properties:
>
>    interrupts-extended:
>      minItems: 1
> +    maxItems: 10

Cfr. Jessica's comment on my PLIC patch:

The maximum supported by the CLINT memory map is 8192.
Device-specific limits would be 4 for k210 and jh7100, and 10 for
fu540.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH] dt-bindings: timer: sifive, clint: Fix number of interrupts

[Anup Patel]

On Fri, Nov 26, 2021 at 2:34 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> On Thu, Nov 25, 2021 at 4:23 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > To improve human readability and enable automatic validation, the tuples
> > in "interrupts-extended" properties should be grouped using angle
> > brackets.  As the DT bindings lack an upper bound on the number of
> > interrupts, thus assuming one, proper grouping is currently flagged as
> > an error.
> >
> > Fix this by adding the missing "maxItems", limiting it to 10 interrupts
> > (two interrupts for a system management core, and two interrupts per
> > core for other cores), which should be sufficient for now.
> >
> > Group the tuples in the example.
> >
> > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > ---
> >  .../devicetree/bindings/timer/sifive,clint.yaml          | 9 +++++----
> >  1 file changed, 5 insertions(+), 4 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > index a35952f487426988..55bec2d059807c48 100644
> > --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > @@ -43,6 +43,7 @@ properties:
> >
> >    interrupts-extended:
> >      minItems: 1
> > +    maxItems: 10
>
> Cfr. Jessica's comment on my PLIC patch:
>
> The maximum supported by the CLINT memory map is 8192.
> Device-specific limits would be 4 for k210 and jh7100, and 10 for
> fu540.

As-per CLINT chapter of SiFive FU740 manual:
1) Offset 0x0000 to 0x3fff is MSIPx registers (up to 4096 registers)
2) Offset 0x4000 to 0xbff7 is MTIMECMPx registers (up to 4095 registers)
3) Offset 0xbff8 to 0xc000 is MTIME register
(Refer, https://sifive.cdn.prismic.io/sifive/28560457-c5a4-4f88-866c-8098d02afea1_FU740-C000-Manual-v1p0.pdf)

The "maxItems" for SiFive CLINT should be 4095.

Regards,
Anup

>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH] dt-bindings: timer: sifive, clint: Fix number of interrupts

[Geert Uytterhoeven]

Hi Anup,

On Fri, Nov 26, 2021 at 10:15 AM Anup Patel <anup@brainfault.org> wrote:
> On Fri, Nov 26, 2021 at 2:34 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Thu, Nov 25, 2021 at 4:23 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > To improve human readability and enable automatic validation, the tuples
> > > in "interrupts-extended" properties should be grouped using angle
> > > brackets.  As the DT bindings lack an upper bound on the number of
> > > interrupts, thus assuming one, proper grouping is currently flagged as
> > > an error.
> > >
> > > Fix this by adding the missing "maxItems", limiting it to 10 interrupts
> > > (two interrupts for a system management core, and two interrupts per
> > > core for other cores), which should be sufficient for now.
> > >
> > > Group the tuples in the example.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > > ---
> > >  .../devicetree/bindings/timer/sifive,clint.yaml          | 9 +++++----
> > >  1 file changed, 5 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > > index a35952f487426988..55bec2d059807c48 100644
> > > --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > > +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > > @@ -43,6 +43,7 @@ properties:
> > >
> > >    interrupts-extended:
> > >      minItems: 1
> > > +    maxItems: 10
> >
> > Cfr. Jessica's comment on my PLIC patch:
> >
> > The maximum supported by the CLINT memory map is 8192.
> > Device-specific limits would be 4 for k210 and jh7100, and 10 for
> > fu540.
>
> As-per CLINT chapter of SiFive FU740 manual:
> 1) Offset 0x0000 to 0x3fff is MSIPx registers (up to 4096 registers)
> 2) Offset 0x4000 to 0xbff7 is MTIMECMPx registers (up to 4095 registers)

Thanks, I had missed these are 64-bit (and did wonder about the extra
space ;-)

> 3) Offset 0xbff8 to 0xc000 is MTIME register
> (Refer, https://sifive.cdn.prismic.io/sifive/28560457-c5a4-4f88-866c-8098d02afea1_FU740-C000-Manual-v1p0.pdf)
>
> The "maxItems" for SiFive CLINT should be 4095.

OK.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds