From: Julius Werner <jwerner@chromium.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Julius Werner <jwerner@chromium.org>,
Rob Herring <robh@kernel.org>, Dmitry Osipenko <digetx@gmail.com>,
linux-tegra@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
devicetree@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
Thierry Reding <thierry.reding@gmail.com>
Subject: Re: [PATCH v5 3/9] dt-bindings: memory: lpddr2: Add revision-id properties
Date: Tue, 8 Feb 2022 15:46:52 -0800 [thread overview]
Message-ID: <CAODwPW-AMqQ+ZbnvUTuxP5Bbxdcy08GSXnhcLC+V6BW=OPYaqg@mail.gmail.com> (raw)
In-Reply-To: <d69f99ed-75a4-9b8c-addb-3eaa2b2be6a6@canonical.com>
> Unfortunately I have no clue what patch you talk about ("this patch").
> There is no context here, no link except the older LPDDR3.
Sorry, I tried to reply to
https://lore.kernel.org/all/20211006224659.21434-4-digetx@gmail.com/
([PATCH v5 3/9] dt-bindings: memory: lpddr2: Add revision-id
properties) and was hoping that would automatically provide context.
That patch added two one-cell properties `revision-id1` and
`revision-id2` to "jedec,lpddr2". Earlier in
https://www.spinics.net/lists/devicetree/msg413733.html ([PATCH]
dt-bindings: ddr: Add optional manufacturer and revision ID to
LPDDR3), I had added a single two-cell property `revision-id` for the
same purpose to "jedec,lpddr3".
I think it would be better if this was consistent between the two
types of LPDDR memory. Should I just send a patch that replaces the
two revision IDs in "jedec,lpddr2" with a single one according to the
principle of "jedec,lpddr3"? Or is it too late for that now and the
binding already considered stable and unchangeable?
next prev parent reply other threads:[~2022-02-08 23:47 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-06 22:46 [PATCH v5 0/9] tegra20-emc: Identify memory chip by LPDDR configuration Dmitry Osipenko
2021-10-06 22:46 ` [PATCH v5 1/9] dt-bindings: Relocate DDR bindings Dmitry Osipenko
2021-10-14 21:22 ` Rob Herring
2021-10-06 22:46 ` [PATCH v5 2/9] dt-bindings: memory: lpddr2: Convert to schema Dmitry Osipenko
2021-10-14 21:50 ` Rob Herring
2021-10-06 22:46 ` [PATCH v5 3/9] dt-bindings: memory: lpddr2: Add revision-id properties Dmitry Osipenko
2021-10-14 21:51 ` Rob Herring
2022-02-08 2:06 ` Julius Werner
2022-02-08 8:10 ` Krzysztof Kozlowski
2022-02-08 23:46 ` Julius Werner [this message]
2022-02-09 8:58 ` Krzysztof Kozlowski
2022-02-09 11:49 ` Dmitry Osipenko
2022-02-10 0:32 ` Julius Werner
2022-02-10 23:17 ` Dmitry Osipenko
2022-02-11 7:55 ` Krzysztof Kozlowski
2021-10-06 22:46 ` [PATCH v5 4/9] dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F Dmitry Osipenko
2021-10-14 21:51 ` Rob Herring
2021-10-06 22:46 ` [PATCH v5 5/9] dt-bindings: Add vendor prefix for Elpida Memory Dmitry Osipenko
2021-10-14 21:51 ` Rob Herring
2021-10-06 22:46 ` [PATCH v5 6/9] ARM: dts: elpida_ecb240abacn: Change Elpida compatible Dmitry Osipenko
2021-10-06 22:46 ` [PATCH v5 7/9] dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node Dmitry Osipenko
2021-10-14 21:52 ` Rob Herring
2021-10-06 22:46 ` [PATCH v5 8/9] memory: Add LPDDR2-info helpers Dmitry Osipenko
2021-10-06 22:46 ` [PATCH v5 9/9] memory: tegra20-emc: Support matching timings by LPDDR2 configuration Dmitry Osipenko
2021-10-15 7:20 ` [PATCH v5 0/9] tegra20-emc: Identify memory chip by LPDDR configuration Krzysztof Kozlowski
2021-10-18 18:10 ` Dmitry Osipenko
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