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* [PATCH] arm64: dts: imx8mm: Fix pad control of SD1_DATA0
@ 2021-03-23 20:14 Oliver Stäbler
  2021-03-23 20:28 ` Fabio Estevam
  0 siblings, 1 reply; 6+ messages in thread
From: Oliver Stäbler @ 2021-03-23 20:14 UTC (permalink / raw)
  To: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx
  Cc: oliver.staebler, devicetree, linux-arm-kernel, linux-kernel

Fix address of the pad control register
(IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
to be a typo but it leads to an exception when pinctrl is applied due to
wrong memory address access.

Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
---
 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index 5ccc4cc91959d..a003e6af33533 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
@@ -124,7 +124,7 @@
 #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                                     0x0A4 0x30C 0x000 0x0 0x0
 #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1                                      0x0A4 0x30C 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0                                 0x0A8 0x310 0x000 0x0 0x0
-#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x31  0x000 0x5 0x0
+#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x310 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1                                 0x0AC 0x314 0x000 0x0 0x0
 #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3                                    0x0AC 0x314 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2                                 0x0B0 0x318 0x000 0x0 0x0
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: imx8mm: Fix pad control of SD1_DATA0
  2021-03-23 20:14 [PATCH] arm64: dts: imx8mm: Fix pad control of SD1_DATA0 Oliver Stäbler
@ 2021-03-23 20:28 ` Fabio Estevam
  2021-03-24 13:28   ` [PATCH v2] arm64: dts: imx8mm/q: " Oliver Stäbler
  0 siblings, 1 reply; 6+ messages in thread
From: Fabio Estevam @ 2021-03-23 20:28 UTC (permalink / raw)
  To: Oliver Stäbler
  Cc: Rob Herring, Shawn Guo, Sascha Hauer, Sascha Hauer,
	NXP Linux Team,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	linux-kernel

Hi Oliver,

On Tue, Mar 23, 2021 at 5:15 PM Oliver Stäbler
<oliver.staebler@bytesatwork.ch> wrote:
>
> Fix address of the pad control register
> (IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
> to be a typo but it leads to an exception when pinctrl is applied due to
> wrong memory address access.
>
> Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>

I checked in the RM and your patch is correct, thanks:

Reviewed-by: Fabio Estevam <festevam@gmail.com>

I will send a patch fixing imx8mq-pinfunc.h as it has the same error.

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [PATCH v2] arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
  2021-03-23 20:28 ` Fabio Estevam
@ 2021-03-24 13:28   ` Oliver Stäbler
  2021-03-24 13:37     ` Fabio Estevam
                       ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Oliver Stäbler @ 2021-03-24 13:28 UTC (permalink / raw)
  To: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx
  Cc: oliver.staebler, devicetree, linux-arm-kernel, linux-kernel

Fix address of the pad control register
(IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
to be a typo but it leads to an exception when pinctrl is applied due to
wrong memory address access.

Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
---
 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
 arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index 5ccc4cc91959d..a003e6af33533 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
@@ -124,7 +124,7 @@
 #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                                     0x0A4 0x30C 0x000 0x0 0x0
 #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1                                      0x0A4 0x30C 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0                                 0x0A8 0x310 0x000 0x0 0x0
-#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x31  0x000 0x5 0x0
+#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x310 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1                                 0x0AC 0x314 0x000 0x0 0x0
 #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3                                    0x0AC 0x314 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2                                 0x0B0 0x318 0x000 0x0 0x0
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h
index b94b02080a344..68e8fa1729741 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h
@@ -130,7 +130,7 @@
 #define MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                                     0x0A4 0x30C 0x000 0x0 0x0
 #define MX8MQ_IOMUXC_SD1_CMD_GPIO2_IO1                                      0x0A4 0x30C 0x000 0x5 0x0
 #define MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0                                 0x0A8 0x310 0x000 0x0 0x0
-#define MX8MQ_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x31  0x000 0x5 0x0
+#define MX8MQ_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x310 0x000 0x5 0x0
 #define MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1                                 0x0AC 0x314 0x000 0x0 0x0
 #define MX8MQ_IOMUXC_SD1_DATA1_GPIO2_IO3                                    0x0AC 0x314 0x000 0x5 0x0
 #define MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2                                 0x0B0 0x318 0x000 0x0 0x0
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
  2021-03-24 13:28   ` [PATCH v2] arm64: dts: imx8mm/q: " Oliver Stäbler
@ 2021-03-24 13:37     ` Fabio Estevam
  2021-03-27 17:35     ` Rob Herring
  2021-03-29  2:25     ` Shawn Guo
  2 siblings, 0 replies; 6+ messages in thread
From: Fabio Estevam @ 2021-03-24 13:37 UTC (permalink / raw)
  To: Oliver Stäbler
  Cc: Rob Herring, Shawn Guo, Sascha Hauer, Sascha Hauer,
	NXP Linux Team,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	linux-kernel

Hi Oliver,

On Wed, Mar 24, 2021 at 10:28 AM Oliver Stäbler
<oliver.staebler@bytesatwork.ch> wrote:
>
> Fix address of the pad control register
> (IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
> to be a typo but it leads to an exception when pinctrl is applied due to
> wrong memory address access.
>
> Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>

Thanks for the fix:

Reviewed-by: Fabio Estevam <festevam@gmail.com>

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
  2021-03-24 13:28   ` [PATCH v2] arm64: dts: imx8mm/q: " Oliver Stäbler
  2021-03-24 13:37     ` Fabio Estevam
@ 2021-03-27 17:35     ` Rob Herring
  2021-03-29  2:25     ` Shawn Guo
  2 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2021-03-27 17:35 UTC (permalink / raw)
  To: Oliver Stäbler
  Cc: robh+dt, s.hauer, linux-kernel, kernel, shawnguo, linux-imx,
	devicetree, linux-arm-kernel, festevam

On Wed, 24 Mar 2021 14:28:41 +0100, Oliver Stäbler wrote:
> Fix address of the pad control register
> (IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
> to be a typo but it leads to an exception when pinctrl is applied due to
> wrong memory address access.
> 
> Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
> ---
>  arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
>  arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 

Acked-by: Rob Herring <robh@kernel.org>

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
  2021-03-24 13:28   ` [PATCH v2] arm64: dts: imx8mm/q: " Oliver Stäbler
  2021-03-24 13:37     ` Fabio Estevam
  2021-03-27 17:35     ` Rob Herring
@ 2021-03-29  2:25     ` Shawn Guo
  2 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2021-03-29  2:25 UTC (permalink / raw)
  To: Oliver Stäbler
  Cc: robh+dt, s.hauer, kernel, festevam, linux-imx, devicetree,
	linux-arm-kernel, linux-kernel

On Wed, Mar 24, 2021 at 02:28:41PM +0100, Oliver Stäbler wrote:
> Fix address of the pad control register
> (IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
> to be a typo but it leads to an exception when pinctrl is applied due to
> wrong memory address access.
> 
> Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>

Applied, thanks.

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-03-29  2:26 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-23 20:14 [PATCH] arm64: dts: imx8mm: Fix pad control of SD1_DATA0 Oliver Stäbler
2021-03-23 20:28 ` Fabio Estevam
2021-03-24 13:28   ` [PATCH v2] arm64: dts: imx8mm/q: " Oliver Stäbler
2021-03-24 13:37     ` Fabio Estevam
2021-03-27 17:35     ` Rob Herring
2021-03-29  2:25     ` Shawn Guo

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