* [PATCH 0/2] riscv: sophgo: add i2c and spi device to CV180x/SG2000x SoCs
@ 2024-01-29 2:23 Inochi Amaoto
2024-01-29 2:26 ` [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices Inochi Amaoto
2024-01-29 2:26 ` [PATCH 2/2] riscv: dts: sophgo: cv18xx: Add i2c devices Inochi Amaoto
0 siblings, 2 replies; 6+ messages in thread
From: Inochi Amaoto @ 2024-01-29 2:23 UTC (permalink / raw)
To: Chao Wei, Chen Wang, Conor Dooley, Rob Herring,
Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, Inochi Amaoto,
linux-kernel, linux-riscv, devicetree
Add i2c and spi devices
The patch depends on the clk patch:
https://lore.kernel.org/all/IA1PR20MB4953C774D41EDF1EADB6EC18BB6D2@IA1PR20MB4953.namprd20.prod.outlook.com/
Inochi Amaoto (2):
riscv: dts: sophgo: cv18xx: Add spi devices
riscv: dts: sophgo: cv18xx: Add i2c devices
arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 99 ++++++++++++++++++++++++++
1 file changed, 99 insertions(+)
--
2.43.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices
2024-01-29 2:23 [PATCH 0/2] riscv: sophgo: add i2c and spi device to CV180x/SG2000x SoCs Inochi Amaoto
@ 2024-01-29 2:26 ` Inochi Amaoto
2024-01-29 3:01 ` Yixun Lan
2024-01-29 2:26 ` [PATCH 2/2] riscv: dts: sophgo: cv18xx: Add i2c devices Inochi Amaoto
1 sibling, 1 reply; 6+ messages in thread
From: Inochi Amaoto @ 2024-01-29 2:26 UTC (permalink / raw)
To: Chao Wei, Chen Wang, Conor Dooley, Rob Herring,
Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, Inochi Amaoto,
linux-kernel, linux-riscv, devicetree
Add spi devices for the CV180x, CV181x and SG200x soc.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
---
arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 44 ++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index 7c88cbe8e91d..e66f9e9feb48 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -176,6 +176,50 @@ uart3: serial@4170000 {
status = "disabled";
};
+ spi0: spi@4180000 {
+ compatible = "snps,dw-apb-ssi";
+ reg = <0x04180000 0x10000>;
+ interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI0>;
+ clock-names = "ssi_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi1: spi@4190000 {
+ compatible = "snps,dw-apb-ssi";
+ reg = <0x04190000 0x10000>;
+ interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI1>;
+ clock-names = "ssi_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi2: spi@41a0000 {
+ compatible = "snps,dw-apb-ssi";
+ reg = <0x041a0000 0x10000>;
+ interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI2>;
+ clock-names = "ssi_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi3: spi@41b0000 {
+ compatible = "snps,dw-apb-ssi";
+ reg = <0x041b0000 0x10000>;
+ interrupts = <57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI3>;
+ clock-names = "ssi_clk", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
uart4: serial@41c0000 {
compatible = "snps,dw-apb-uart";
reg = <0x041c0000 0x100>;
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] riscv: dts: sophgo: cv18xx: Add i2c devices
2024-01-29 2:23 [PATCH 0/2] riscv: sophgo: add i2c and spi device to CV180x/SG2000x SoCs Inochi Amaoto
2024-01-29 2:26 ` [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices Inochi Amaoto
@ 2024-01-29 2:26 ` Inochi Amaoto
1 sibling, 0 replies; 6+ messages in thread
From: Inochi Amaoto @ 2024-01-29 2:26 UTC (permalink / raw)
To: Chao Wei, Chen Wang, Conor Dooley, Rob Herring,
Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, Inochi Amaoto,
linux-kernel, linux-riscv, devicetree
Add i2c devices for the CV180x, CV181x and SG200x soc.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
---
arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 55 ++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index e66f9e9feb48..d6eb20989bc4 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -132,6 +132,61 @@ portd: gpio-controller@0 {
};
};
+ i2c0: i2c@4000000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x04000000 0x10000>;
+ interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C0>;
+ clock-names = "ref", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@4010000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x04010000 0x10000>;
+ interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C1>;
+ clock-names = "ref", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@4020000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x04020000 0x10000>;
+ interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C2>;
+ clock-names = "ref", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@4030000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x04030000 0x10000>;
+ interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C3>;
+ clock-names = "ref", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@4040000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x04040000 0x10000>;
+ interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C4>;
+ clock-names = "ref", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
uart0: serial@4140000 {
compatible = "snps,dw-apb-uart";
reg = <0x04140000 0x100>;
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices
2024-01-29 2:26 ` [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices Inochi Amaoto
@ 2024-01-29 3:01 ` Yixun Lan
2024-01-29 3:47 ` Inochi Amaoto
0 siblings, 1 reply; 6+ messages in thread
From: Yixun Lan @ 2024-01-29 3:01 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Chao Wei, Chen Wang, Conor Dooley, Rob Herring,
Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Jisheng Zhang, Liu Gui, Jingbao Qiu, linux-kernel, linux-riscv,
devicetree
Hi Inochi Amaoto
On 10:26 Mon 29 Jan , Inochi Amaoto wrote:
> Add spi devices for the CV180x, CV181x and SG200x soc.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> ---
> arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 44 ++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 7c88cbe8e91d..e66f9e9feb48 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -176,6 +176,50 @@ uart3: serial@4170000 {
> status = "disabled";
> };
>
> + spi0: spi@4180000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x04180000 0x10000>;
> + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI0>;
> + clock-names = "ssi_clk", "pclk";
..
> + #address-cells = <1>;
> + #size-cells = <0>;
I'd suggest moving those two above 'interrupts' property
there is an ongoing discussion here..
https://lore.kernel.org/all/20231203174622.18402-1-krzysztof.kozlowski@linaro.org/
> + status = "disabled";
> + };
> +
> + spi1: spi@4190000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x04190000 0x10000>;
> + interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI1>;
> + clock-names = "ssi_clk", "pclk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + spi2: spi@41a0000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x041a0000 0x10000>;
> + interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI2>;
> + clock-names = "ssi_clk", "pclk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + spi3: spi@41b0000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x041b0000 0x10000>;
> + interrupts = <57 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI3>;
> + clock-names = "ssi_clk", "pclk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> uart4: serial@41c0000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x041c0000 0x100>;
> --
> 2.43.0
--
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices
2024-01-29 3:01 ` Yixun Lan
@ 2024-01-29 3:47 ` Inochi Amaoto
2024-01-29 15:40 ` Conor Dooley
0 siblings, 1 reply; 6+ messages in thread
From: Inochi Amaoto @ 2024-01-29 3:47 UTC (permalink / raw)
To: Yixun Lan
Cc: Inochi Amaoto, Chao Wei, Chen Wang, Conor Dooley, Rob Herring,
Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Jisheng Zhang, Liu Gui, Jingbao Qiu, linux-kernel, linux-riscv,
devicetree
>Hi Inochi Amaoto
>
>On 10:26 Mon 29 Jan , Inochi Amaoto wrote:
>> Add spi devices for the CV180x, CV181x and SG200x soc.
>>
>> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
>> ---
>> arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 44 ++++++++++++++++++++++++++
>> 1 file changed, 44 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> index 7c88cbe8e91d..e66f9e9feb48 100644
>> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> @@ -176,6 +176,50 @@ uart3: serial@4170000 {
>> status = "disabled";
>> };
>>
>> + spi0: spi@4180000 {
>> + compatible = "snps,dw-apb-ssi";
>> + reg = <0x04180000 0x10000>;
>> + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI0>;
>> + clock-names = "ssi_clk", "pclk";
>..
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>I'd suggest moving those two above 'interrupts' property
>
>there is an ongoing discussion here..
>https://lore.kernel.org/all/20231203174622.18402-1-krzysztof.kozlowski@linaro.org/
>
Thanks for this info. I will take care of it.
>> + status = "disabled";
>> + };
>> +
>> + spi1: spi@4190000 {
>> + compatible = "snps,dw-apb-ssi";
>> + reg = <0x04190000 0x10000>;
>> + interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI1>;
>> + clock-names = "ssi_clk", "pclk";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + spi2: spi@41a0000 {
>> + compatible = "snps,dw-apb-ssi";
>> + reg = <0x041a0000 0x10000>;
>> + interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI2>;
>> + clock-names = "ssi_clk", "pclk";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + spi3: spi@41b0000 {
>> + compatible = "snps,dw-apb-ssi";
>> + reg = <0x041b0000 0x10000>;
>> + interrupts = <57 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI3>;
>> + clock-names = "ssi_clk", "pclk";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> uart4: serial@41c0000 {
>> compatible = "snps,dw-apb-uart";
>> reg = <0x041c0000 0x100>;
>> --
>> 2.43.0
>
>--
>Yixun Lan (dlan)
>Gentoo Linux Developer
>GPG Key ID AABEFD55
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices
2024-01-29 3:47 ` Inochi Amaoto
@ 2024-01-29 15:40 ` Conor Dooley
0 siblings, 0 replies; 6+ messages in thread
From: Conor Dooley @ 2024-01-29 15:40 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Yixun Lan, Chao Wei, Chen Wang, Rob Herring, Krzysztof Kozlowski,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Jisheng Zhang, Liu Gui,
Jingbao Qiu, linux-kernel, linux-riscv, devicetree
[-- Attachment #1: Type: text/plain, Size: 1517 bytes --]
On Mon, Jan 29, 2024 at 11:47:18AM +0800, Inochi Amaoto wrote:
> >Hi Inochi Amaoto
> >
> >On 10:26 Mon 29 Jan , Inochi Amaoto wrote:
> >> Add spi devices for the CV180x, CV181x and SG200x soc.
> >>
> >> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> >> ---
> >> arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 44 ++++++++++++++++++++++++++
> >> 1 file changed, 44 insertions(+)
> >>
> >> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> >> index 7c88cbe8e91d..e66f9e9feb48 100644
> >> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> >> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> >> @@ -176,6 +176,50 @@ uart3: serial@4170000 {
> >> status = "disabled";
> >> };
> >>
> >> + spi0: spi@4180000 {
> >> + compatible = "snps,dw-apb-ssi";
> >> + reg = <0x04180000 0x10000>;
> >> + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
> >> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI0>;
> >> + clock-names = "ssi_clk", "pclk";
> >..
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >I'd suggest moving those two above 'interrupts' property
> >
> >there is an ongoing discussion here..
Not super important to point out, but this discussion isn't "ongoing",
it was merged into 6.8-rc1:
https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
Cheers,
Conor.
> >https://lore.kernel.org/all/20231203174622.18402-1-krzysztof.kozlowski@linaro.org/
> >
>
> Thanks for this info. I will take care of it.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-01-29 15:40 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2024-01-29 2:23 [PATCH 0/2] riscv: sophgo: add i2c and spi device to CV180x/SG2000x SoCs Inochi Amaoto
2024-01-29 2:26 ` [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices Inochi Amaoto
2024-01-29 3:01 ` Yixun Lan
2024-01-29 3:47 ` Inochi Amaoto
2024-01-29 15:40 ` Conor Dooley
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