[PATCH v5 1/5] usb: fsl: Set USB_EN bit to select ULPI phy

[PATCH v5 1/5] usb: fsl: Set USB_EN bit to select ULPI phy

[Yinbo Zhu]

From: Nikhil Badola <nikhil.badola@freescale.com>

Set USB_EN bit to select ULPI phy for USB controller version 2.5

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
---
 drivers/usb/host/ehci-fsl.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index e3d0c1c..38674b7 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -122,6 +122,12 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
 		tmp |= 0x4;
 		iowrite32be(tmp, hcd->regs + FSL_SOC_USB_CTRL);
 	}
+
+	/* Set USB_EN bit to select ULPI phy for USB controller version 2.5 */
+	if (pdata->controller_ver == FSL_USB_VER_2_5 &&
+	    pdata->phy_mode == FSL_USB2_PHY_ULPI)
+		iowrite32be(USB_CTRL_USB_EN, hcd->regs + FSL_SOC_USB_CTRL);
+
 	/*
 	 * Enable UTMI phy and program PTS field in UTMI mode before asserting
 	 * controller reset for USB Controller version 2.5
-- 
1.7.1

[PATCH v5 2/5] usb: phy: Workaround for USB erratum-A005728

[Yinbo Zhu]

From: Suresh Gupta <B42813@freescale.com>

PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even
if PHY is providing valid clock. Workaround for this
involves resetting of PHY and check PHY_CLK_VALID bit
multiple times. If PHY_CLK_VALID bit is still not set even
after 5 retries, it would be safe to deaclare that PHY
clock is not available.
This erratum is applicable for USBDR less then ver 2.4.

Signed-off-by: Suresh Gupta <B42813@freescale.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
---
Change in v5:
		remove dev_err function unnecessary parameters 

 drivers/usb/host/ehci-fsl.c |   37 ++++++++++++++++++++++++++-----------
 drivers/usb/host/ehci-fsl.h |    3 +++
 2 files changed, 29 insertions(+), 11 deletions(-)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 38674b7..1634ac8 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -183,6 +183,17 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
 	return retval;
 }
 
+static bool usb_phy_clk_valid(struct usb_hcd *hcd)
+{
+	void __iomem *non_ehci = hcd->regs;
+	bool ret = true;
+
+	if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
+		ret = false;
+
+	return ret;
+}
+
 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 			       enum fsl_usb2_phy_modes phy_mode,
 			       unsigned int port_offset)
@@ -226,6 +237,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 		/* fall through */
 	case FSL_USB2_PHY_UTMI:
 	case FSL_USB2_PHY_UTMI_DUAL:
+		/* PHY_CLK_VALID bit is de-featured from all controller
+		 * versions below 2.4 and is to be checked only for
+		 * internal UTMI phy
+		 */
+		if (pdata->controller_ver > FSL_USB_VER_2_4 &&
+		    pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
+			dev_err(dev, "USB PHY clock invalid\n");
+			return -EINVAL;
+		}
+
 		if (pdata->have_sysif_regs && pdata->controller_ver) {
 			/* controller version 1.6 or above */
 			tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
@@ -249,17 +270,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 		break;
 	}
 
-	/*
-	 * check PHY_CLK_VALID to determine phy clock presence before writing
-	 * to portsc
-	 */
-	if (pdata->check_phy_clk_valid) {
-		if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
-		    PHY_CLK_VALID)) {
-			dev_warn(hcd->self.controller,
-				 "USB PHY clock invalid\n");
-			return -EINVAL;
-		}
+	if (pdata->have_sysif_regs &&
+	    pdata->controller_ver > FSL_USB_VER_1_6 &&
+		!usb_phy_clk_valid(hcd)) {
+		dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
+		return -EINVAL;
 	}
 
 	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index cbc4220..9d18c6e 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -50,4 +50,7 @@
 #define UTMI_PHY_EN             (1<<9)
 #define ULPI_PHY_CLK_SEL        (1<<10)
 #define PHY_CLK_VALID		(1<<17)
+
+/* Retry count for checking UTMI PHY CLK validity */
+#define UTMI_PHY_CLK_VALID_CHK_RETRY 5
 #endif				/* _EHCI_FSL_H */
-- 
1.7.1

[PATCH v5 3/5] usb: linux/fsl_device: Add platform member has_fsl_erratum_a006918

[Yinbo Zhu]

From: Yinbo Zhu <yinbo.zhu@nxp.com>

This patch is to add member has_fsl_erratum_a006918 in platform data

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
---
 include/linux/fsl_devices.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 5da56a6..4c613da 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -102,6 +102,7 @@ struct fsl_usb2_platform_data {
 	unsigned	has_fsl_erratum_14:1;
 	unsigned	has_fsl_erratum_a005275:1;
 	unsigned	has_fsl_erratum_a005697:1;
+	unsigned        has_fsl_erratum_a006918:1;
 	unsigned	check_phy_clk_valid:1;
 
 	/* register save area for suspend/resume */
-- 
1.7.1

[PATCH v5 4/5] usb: host: Stops USB controller init if PLL fails to lock

[Yinbo Zhu]

From: Ramneek Mehresh <ramneek.mehresh@freescale.com>

USB erratum-A006918 workaround tries to start internal PHY inside
uboot (when PLL fails to lock). However, if the workaround also
fails, then USB initialization is also stopped inside Linux.
Erratum-A006918 workaround failure creates "fsl,erratum_a006918"
node in device-tree. Presence of this node in device-tree is
used to stop USB controller initialization in Linux

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
---
Change in v5:
		use dev_warn() instead of pr_warn()

 drivers/usb/host/ehci-fsl.c      |    5 +++++
 drivers/usb/host/fsl-mph-dr-of.c |    3 ++-
 2 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 1634ac8..90550a6 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -236,6 +236,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 		portsc |= PORT_PTS_PTW;
 		/* fall through */
 	case FSL_USB2_PHY_UTMI:
+		if (pdata->has_fsl_erratum_a006918) {
+			dev_warn(dev, "USB PHY clock invalid\n");
+			return -EINVAL;
+		}
+
 	case FSL_USB2_PHY_UTMI_DUAL:
 		/* PHY_CLK_VALID bit is de-featured from all controller
 		 * versions below 2.4 and is to be checked only for
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 4f8b8a0..762b976 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -224,13 +224,14 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device *ofdev)
 		of_property_read_bool(np, "fsl,usb-erratum-a005275");
 	pdata->has_fsl_erratum_a005697 =
 		of_property_read_bool(np, "fsl,usb_erratum-a005697");
+	pdata->has_fsl_erratum_a006918 =
+		of_property_read_bool(np, "fsl,usb_erratum-a006918");
 
 	if (of_get_property(np, "fsl,usb_erratum_14", NULL))
 		pdata->has_fsl_erratum_14 = 1;
 	else
 		pdata->has_fsl_erratum_14 = 0;
 
-
 	/*
 	 * Determine whether phy_clk_valid needs to be checked
 	 * by reading property in device tree
-- 
1.7.1

[PATCH v5 5/5] usb :fsl: Change string format for errata property

[Yinbo Zhu]

From: Nikhil Badola <nikhil.badola@freescale.com>

Remove USB errata checking code from driver. Applicability of erratum
is retrieved by reading corresponding property in device tree.
This property is written during device tree fixup.

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
---
 drivers/usb/host/fsl-mph-dr-of.c |    7 ++-----
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 762b976..ae8f60f 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -226,11 +226,8 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device *ofdev)
 		of_property_read_bool(np, "fsl,usb_erratum-a005697");
 	pdata->has_fsl_erratum_a006918 =
 		of_property_read_bool(np, "fsl,usb_erratum-a006918");
-
-	if (of_get_property(np, "fsl,usb_erratum_14", NULL))
-		pdata->has_fsl_erratum_14 = 1;
-	else
-		pdata->has_fsl_erratum_14 = 0;
+	pdata->has_fsl_erratum_14 =
+		of_property_read_bool(np, "fsl,usb_erratum-14");
 
 	/*
 	 * Determine whether phy_clk_valid needs to be checked
-- 
1.7.1

Re: [PATCH v5 2/5] usb: phy: Workaround for USB erratum-A005728

[Alan Stern]

On Wed, 8 May 2019, Yinbo Zhu wrote:

> From: Suresh Gupta <B42813@freescale.com>
> 
> PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even
> if PHY is providing valid clock. Workaround for this
> involves resetting of PHY and check PHY_CLK_VALID bit
> multiple times. If PHY_CLK_VALID bit is still not set even
> after 5 retries, it would be safe to deaclare that PHY
> clock is not available.
> This erratum is applicable for USBDR less then ver 2.4.
> 
> Signed-off-by: Suresh Gupta <B42813@freescale.com>
> Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
> ---
> Change in v5:
> 		remove dev_err function unnecessary parameters 
> 
>  drivers/usb/host/ehci-fsl.c |   37 ++++++++++++++++++++++++++-----------
>  drivers/usb/host/ehci-fsl.h |    3 +++
>  2 files changed, 29 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index 38674b7..1634ac8 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -183,6 +183,17 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
>  	return retval;
>  }
>  
> +static bool usb_phy_clk_valid(struct usb_hcd *hcd)
> +{
> +	void __iomem *non_ehci = hcd->regs;
> +	bool ret = true;
> +
> +	if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
> +		ret = false;
> +
> +	return ret;
> +}
> +
>  static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
>  			       enum fsl_usb2_phy_modes phy_mode,
>  			       unsigned int port_offset)
> @@ -226,6 +237,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
>  		/* fall through */
>  	case FSL_USB2_PHY_UTMI:
>  	case FSL_USB2_PHY_UTMI_DUAL:
> +		/* PHY_CLK_VALID bit is de-featured from all controller
> +		 * versions below 2.4 and is to be checked only for
> +		 * internal UTMI phy
> +		 */
> +		if (pdata->controller_ver > FSL_USB_VER_2_4 &&
> +		    pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
> +			dev_err(dev, "USB PHY clock invalid\n");
> +			return -EINVAL;
> +		}
> +
>  		if (pdata->have_sysif_regs && pdata->controller_ver) {
>  			/* controller version 1.6 or above */
>  			tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
> @@ -249,17 +270,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
>  		break;
>  	}
>  
> -	/*
> -	 * check PHY_CLK_VALID to determine phy clock presence before writing
> -	 * to portsc
> -	 */
> -	if (pdata->check_phy_clk_valid) {
> -		if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
> -		    PHY_CLK_VALID)) {
> -			dev_warn(hcd->self.controller,
> -				 "USB PHY clock invalid\n");
> -			return -EINVAL;
> -		}
> +	if (pdata->have_sysif_regs &&
> +	    pdata->controller_ver > FSL_USB_VER_1_6 &&
> +		!usb_phy_clk_valid(hcd)) {

This is still wrong.  The line above should be indented four characters 
less than it is: the '!' should line up with the 'p' in the line above 
it.

Alan Stern

> +		dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
> +		return -EINVAL;
>  	}
>  
>  	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
> diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
> index cbc4220..9d18c6e 100644
> --- a/drivers/usb/host/ehci-fsl.h
> +++ b/drivers/usb/host/ehci-fsl.h
> @@ -50,4 +50,7 @@
>  #define UTMI_PHY_EN             (1<<9)
>  #define ULPI_PHY_CLK_SEL        (1<<10)
>  #define PHY_CLK_VALID		(1<<17)
> +
> +/* Retry count for checking UTMI PHY CLK validity */
> +#define UTMI_PHY_CLK_VALID_CHK_RETRY 5
>  #endif				/* _EHCI_FSL_H */
> 

Re: [PATCH v5 4/5] usb: host: Stops USB controller init if PLL fails to lock

[Alan Stern]

On Wed, 8 May 2019, Yinbo Zhu wrote:

> From: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> 
> USB erratum-A006918 workaround tries to start internal PHY inside
> uboot (when PLL fails to lock). However, if the workaround also
> fails, then USB initialization is also stopped inside Linux.
> Erratum-A006918 workaround failure creates "fsl,erratum_a006918"
> node in device-tree. Presence of this node in device-tree is
> used to stop USB controller initialization in Linux
> 
> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
> Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
> ---
> Change in v5:
> 		use dev_warn() instead of pr_warn()
> 
>  drivers/usb/host/ehci-fsl.c      |    5 +++++
>  drivers/usb/host/fsl-mph-dr-of.c |    3 ++-
>  2 files changed, 7 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index 1634ac8..90550a6 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -236,6 +236,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
>  		portsc |= PORT_PTS_PTW;
>  		/* fall through */
>  	case FSL_USB2_PHY_UTMI:
> +		if (pdata->has_fsl_erratum_a006918) {
> +			dev_warn(dev, "USB PHY clock invalid\n");
> +			return -EINVAL;
> +		}
> +

You need to add a "Fall through" comment between these two cases.

>  	case FSL_USB2_PHY_UTMI_DUAL:
>  		/* PHY_CLK_VALID bit is de-featured from all controller
>  		 * versions below 2.4 and is to be checked only for

Alan Stern

RE: [EXT] Re: [PATCH v5 2/5] usb: phy: Workaround for USB erratum-A005728

[Yinbo Zhu]

> -----Original Message-----
> From: Alan Stern [mailto:stern@rowland.harvard.edu]
> Sent: 2019年5月8日 22:15
> To: Yinbo Zhu <yinbo.zhu@nxp.com>
> Cc: Xiaobo Xie <xiaobo.xie@nxp.com>; Greg Kroah-Hartman
> <gregkh@linuxfoundation.org>; Ramneek Mehresh
> <ramneek.mehresh@freescale.com>; Nikhil Badola
> <nikhil.badola@freescale.com>; Ran Wang <ran.wang_1@nxp.com>;
> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; Jiafei Pan
> <jiafei.pan@nxp.com>; Suresh Gupta <B42813@freescale.com>
> Subject: [EXT] Re: [PATCH v5 2/5] usb: phy: Workaround for USB
> erratum-A005728
> 
> Caution: EXT Email
> 
> On Wed, 8 May 2019, Yinbo Zhu wrote:
> 
> > From: Suresh Gupta <B42813@freescale.com>
> >
> > PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even if PHY is
> > providing valid clock. Workaround for this involves resetting of PHY
> > and check PHY_CLK_VALID bit multiple times. If PHY_CLK_VALID bit is
> > still not set even after 5 retries, it would be safe to deaclare that
> > PHY clock is not available.
> > This erratum is applicable for USBDR less then ver 2.4.
> >
> > Signed-off-by: Suresh Gupta <B42813@freescale.com>
> > Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
> > ---
> > Change in v5:
> >               remove dev_err function unnecessary parameters
> >
> >  drivers/usb/host/ehci-fsl.c |   37 ++++++++++++++++++++++++++-----------
> >  drivers/usb/host/ehci-fsl.h |    3 +++
> >  2 files changed, 29 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> > index 38674b7..1634ac8 100644
> > --- a/drivers/usb/host/ehci-fsl.c
> > +++ b/drivers/usb/host/ehci-fsl.c
> > @@ -183,6 +183,17 @@ static int fsl_ehci_drv_probe(struct platform_device
> *pdev)
> >       return retval;
> >  }
> >
> > +static bool usb_phy_clk_valid(struct usb_hcd *hcd) {
> > +     void __iomem *non_ehci = hcd->regs;
> > +     bool ret = true;
> > +
> > +     if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
> > +             ret = false;
> > +
> > +     return ret;
> > +}
> > +
> >  static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> >                              enum fsl_usb2_phy_modes phy_mode,
> >                              unsigned int port_offset) @@ -226,6
> > +237,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> >               /* fall through */
> >       case FSL_USB2_PHY_UTMI:
> >       case FSL_USB2_PHY_UTMI_DUAL:
> > +             /* PHY_CLK_VALID bit is de-featured from all controller
> > +              * versions below 2.4 and is to be checked only for
> > +              * internal UTMI phy
> > +              */
> > +             if (pdata->controller_ver > FSL_USB_VER_2_4 &&
> > +                 pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
> > +                     dev_err(dev, "USB PHY clock invalid\n");
> > +                     return -EINVAL;
> > +             }
> > +
> >               if (pdata->have_sysif_regs && pdata->controller_ver) {
> >                       /* controller version 1.6 or above */
> >                       tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
> > @@ -249,17 +270,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> >               break;
> >       }
> >
> > -     /*
> > -      * check PHY_CLK_VALID to determine phy clock presence before writing
> > -      * to portsc
> > -      */
> > -     if (pdata->check_phy_clk_valid) {
> > -             if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
> > -                 PHY_CLK_VALID)) {
> > -                     dev_warn(hcd->self.controller,
> > -                              "USB PHY clock invalid\n");
> > -                     return -EINVAL;
> > -             }
> > +     if (pdata->have_sysif_regs &&
> > +         pdata->controller_ver > FSL_USB_VER_1_6 &&
> > +             !usb_phy_clk_valid(hcd)) {
> 
> This is still wrong.  The line above should be indented four characters less than it
> is: the '!' should line up with the 'p' in the line above it.
> 
> Alan Stern
Hi Alan Stern,

Your meaning is that as following changes?
 +     if (pdata->have_sysif_regs &&
 +         pdata->controller_ver > FSL_USB_VER_1_6 &&
 +         !usb_phy_clk_valid(hcd)) {

Regards,
Yinbo
> 
> > +             dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
> > +             return -EINVAL;
> >       }
> >
> >       ehci_writel(ehci, portsc,
> > &ehci->regs->port_status[port_offset]);
> > diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
> > index cbc4220..9d18c6e 100644
> > --- a/drivers/usb/host/ehci-fsl.h
> > +++ b/drivers/usb/host/ehci-fsl.h
> > @@ -50,4 +50,7 @@
> >  #define UTMI_PHY_EN             (1<<9)
> >  #define ULPI_PHY_CLK_SEL        (1<<10)
> >  #define PHY_CLK_VALID                (1<<17)
> > +
> > +/* Retry count for checking UTMI PHY CLK validity */ #define
> > +UTMI_PHY_CLK_VALID_CHK_RETRY 5
> >  #endif                               /* _EHCI_FSL_H */
> >

RE: [EXT] Re: [PATCH v5 4/5] usb: host: Stops USB controller init if PLL fails to lock

[Yinbo Zhu]

> -----Original Message-----
> From: Alan Stern [mailto:stern@rowland.harvard.edu]
> Sent: 2019年5月9日 0:50
> To: Yinbo Zhu <yinbo.zhu@nxp.com>
> Cc: Xiaobo Xie <xiaobo.xie@nxp.com>; Greg Kroah-Hartman
> <gregkh@linuxfoundation.org>; Ramneek Mehresh
> <ramneek.mehresh@freescale.com>; Nikhil Badola
> <nikhil.badola@freescale.com>; Ran Wang <ran.wang_1@nxp.com>;
> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; Jiafei Pan
> <jiafei.pan@nxp.com>; Suresh Gupta <suresh.gupta@freescale.com>
> Subject: [EXT] Re: [PATCH v5 4/5] usb: host: Stops USB controller init if PLL fails to
> lock
> 
> Caution: EXT Email
> 
> On Wed, 8 May 2019, Yinbo Zhu wrote:
> 
> > From: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> >
> > USB erratum-A006918 workaround tries to start internal PHY inside
> > uboot (when PLL fails to lock). However, if the workaround also fails,
> > then USB initialization is also stopped inside Linux.
> > Erratum-A006918 workaround failure creates "fsl,erratum_a006918"
> > node in device-tree. Presence of this node in device-tree is used to
> > stop USB controller initialization in Linux
> >
> > Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> > Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
> > Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
> > ---
> > Change in v5:
> >               use dev_warn() instead of pr_warn()
> >
> >  drivers/usb/host/ehci-fsl.c      |    5 +++++
> >  drivers/usb/host/fsl-mph-dr-of.c |    3 ++-
> >  2 files changed, 7 insertions(+), 1 deletions(-)
> >
> > diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> > index 1634ac8..90550a6 100644
> > --- a/drivers/usb/host/ehci-fsl.c
> > +++ b/drivers/usb/host/ehci-fsl.c
> > @@ -236,6 +236,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> >               portsc |= PORT_PTS_PTW;
> >               /* fall through */
> >       case FSL_USB2_PHY_UTMI:
> > +             if (pdata->has_fsl_erratum_a006918) {
> > +                     dev_warn(dev, "USB PHY clock invalid\n");
> > +                     return -EINVAL;
> > +             }
> > +
> 
> You need to add a "Fall through" comment between these two cases.
> >       case FSL_USB2_PHY_UTMI_DUAL:
> >               /* PHY_CLK_VALID bit is de-featured from all controller
> >                * versions below 2.4 and is to be checked only for
> 
> Alan Stern
Hi Alan Stern,

Your meaning is to remove "/* fall through*/" or add the erratum commont replace "/* fall through*/"

Regards,
Yinbo