[PATCH v3] Create i2c_writesl_vi() to use with VI I2C

[PATCH v3] Create i2c_writesl_vi() to use with VI I2C

[Sowjanya Komatineni]

Patch in this series is to fix known hardware bug with VI I2C
controller where immediate multiple writes to TX_FIFO gets stuck
resulting in VI I2C controller to be in bad state.

Delta between patch versions:
[v3]:	Includes v2 feedback 
	- uses relaxed writel and readl
	- avoids type casting on data buffer during i2c_writesl_vi()
	- updated comment to clearly mention this as workaround to
	  known hardware bug with VI I2C.

[v2]:	Creates i2c_writesl_vi() for vi i2c based on v1 feedback.

[v1]:	Updates i2c_writesl() to use writel() followed by i2c_readl().

Sowjanya Komatineni (1):
  i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX
    FIFO

 drivers/i2c/busses/i2c-tegra.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

-- 
2.7.4

[PATCH v3] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

[Sowjanya Komatineni]

VI I2C controller has known hardware bug where immediate multiple
writes to TX_FIFO register gets stuck.

Recommended software work around is to read I2C register after
each write to TX_FIFO register to flush out the data.

This patch implements this work around for VI I2C controller.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/i2c/busses/i2c-tegra.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 6f08c0c..4a27782 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -326,6 +326,8 @@ static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned int reg)
 	/* read back register to make sure that register writes completed */
 	if (reg != I2C_TX_FIFO)
 		readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
+	else if (i2c_dev->is_vi)
+		readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, I2C_INT_STATUS));
 }
 
 static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg)
@@ -339,6 +341,21 @@ static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
 	writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
 }
 
+static void i2c_writesl_vi(struct tegra_i2c_dev *i2c_dev, void *data,
+			   unsigned int reg, unsigned int len)
+{
+	u32 *data32 = data;
+
+	/*
+	 * VI I2C controller has known hardware bug where writes get stuck
+	 * when immediate multiple writes happen to TX_FIFO register.
+	 * Recommended software work around is to read I2C register after
+	 * each write to TX_FIFO register to flush out the data.
+	 */
+	while (len--)
+		i2c_writel(i2c_dev, *data32++, reg);
+}
+
 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data,
 		       unsigned int reg, unsigned int len)
 {
@@ -811,7 +828,10 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)
 		i2c_dev->msg_buf_remaining = buf_remaining;
 		i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD;
 
-		i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
+		if (i2c_dev->is_vi)
+			i2c_writesl_vi(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
+		else
+			i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
 
 		buf += words_to_transfer * BYTES_PER_FIFO_WORD;
 	}
-- 
2.7.4

Re: [PATCH v3] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

[Dmitry Osipenko]

12.01.2021 22:02, Sowjanya Komatineni пишет:
> VI I2C controller has known hardware bug where immediate multiple
> writes to TX_FIFO register gets stuck.
> 
> Recommended software work around is to read I2C register after
> each write to TX_FIFO register to flush out the data.
> 
> This patch implements this work around for VI I2C controller.

You could have kept Thierry's ack since it was given to the fix in
general. No need to make v4.

> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
>  drivers/i2c/busses/i2c-tegra.c | 22 +++++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
> index 6f08c0c..4a27782 100644
> --- a/drivers/i2c/busses/i2c-tegra.c
> +++ b/drivers/i2c/busses/i2c-tegra.c
> @@ -326,6 +326,8 @@ static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned int reg)
>  	/* read back register to make sure that register writes completed */
>  	if (reg != I2C_TX_FIFO)
>  		readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
> +	else if (i2c_dev->is_vi)
> +		readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, I2C_INT_STATUS));
>  }
>  
>  static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg)
> @@ -339,6 +341,21 @@ static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
>  	writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
>  }
>  
> +static void i2c_writesl_vi(struct tegra_i2c_dev *i2c_dev, void *data,
> +			   unsigned int reg, unsigned int len)
> +{
> +	u32 *data32 = data;
> +
> +	/*
> +	 * VI I2C controller has known hardware bug where writes get stuck
> +	 * when immediate multiple writes happen to TX_FIFO register.
> +	 * Recommended software work around is to read I2C register after
> +	 * each write to TX_FIFO register to flush out the data.
> +	 */
> +	while (len--)
> +		i2c_writel(i2c_dev, *data32++, reg);
> +}
> +
>  static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data,
>  		       unsigned int reg, unsigned int len)
>  {
> @@ -811,7 +828,10 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)
>  		i2c_dev->msg_buf_remaining = buf_remaining;
>  		i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD;
>  
> -		i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
> +		if (i2c_dev->is_vi)
> +			i2c_writesl_vi(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
> +		else
> +			i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
>  
>  		buf += words_to_transfer * BYTES_PER_FIFO_WORD;
>  	}
> 

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>

Re: [PATCH v3] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

[Thierry Reding]

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On Tue, Jan 12, 2021 at 11:02:41AM -0800, Sowjanya Komatineni wrote:
> VI I2C controller has known hardware bug where immediate multiple
> writes to TX_FIFO register gets stuck.
> 
> Recommended software work around is to read I2C register after
> each write to TX_FIFO register to flush out the data.
> 
> This patch implements this work around for VI I2C controller.
> 
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
>  drivers/i2c/busses/i2c-tegra.c | 22 +++++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)

Acked-by: Thierry Reding <treding@nvidia.com>

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Re: [PATCH v3] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

[Wolfram Sang]

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On Tue, Jan 12, 2021 at 11:02:41AM -0800, Sowjanya Komatineni wrote:
> VI I2C controller has known hardware bug where immediate multiple
> writes to TX_FIFO register gets stuck.
> 
> Recommended software work around is to read I2C register after
> each write to TX_FIFO register to flush out the data.
> 
> This patch implements this work around for VI I2C controller.
> 
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>

Applied to for-current, thanks!


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