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From: Oliver Upton <oliver.upton@linux.dev>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Eric Auger <eauger@redhat.com>, Marc Zyngier <maz@kernel.org>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Shaoqin Huang <shahuang@redhat.com>,
	Jing Zhang <jingzhangos@google.com>,
	Reiji Watanabe <reijiw@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v7 03/12] KVM: arm64: PMU: Clear PM{C,I}NTEN{SET,CLR} and PMOVS{SET,CLR} on vCPU reset
Date: Thu, 19 Oct 2023 19:05:58 +0000	[thread overview]
Message-ID: <ZTF-FlDtvha-6Pw1@linux.dev> (raw)
In-Reply-To: <CAJHc60yQSzsuTJLcyzs5vffgRzR5i0vKQwLnhavAon6hoSkb+A@mail.gmail.com>

Hi Raghu,

Can you please make sure you include leading and trailing whitespace for
your inline replies? The message gets extremely dense and is difficult
to read.

Also -- delete any unrelated context from your replies. If there's a
localized conversation about a particular detail there's no reason to
keep the entire thread in the body.

On Thu, Oct 19, 2023 at 11:46:22AM -0700, Raghavendra Rao Ananta wrote:
> On Wed, Oct 18, 2023 at 2:16 PM Raghavendra Rao Ananta
> <rananta@google.com> wrote:
> > I had a brief discussion about this with Oliver, and it looks like we
> > might need a couple of additional changes for these register accesses:
> > - For the userspace accesses, we have to implement explicit get_user
> > and set_user callbacks that to filter out the unimplemented counters
> > using kvm_pmu_valid_counter_mask().
> Re-thinking the first case: Since these registers go through a reset
> (reset_pmu_reg()) during initialization, where the valid counter mask
> is applied, and since we are sanitizing the registers with the mask
> before running the guest (below case), will implementing the
> {get,set}_user() add any value, apart from just keeping userspace in
> sync with every update of PMCR.N?

KVM's sysreg emulation (as seen from userspace) fails to uphold the RES0
bits of these registers. That's a bug.

-- 
Thanks,
Oliver

  reply	other threads:[~2023-10-19 19:06 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-09 23:08 [PATCH v7 00/12] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 01/12] KVM: arm64: PMU: Introduce helpers to set the guest's PMU Raghavendra Rao Ananta
2023-10-16 19:45   ` Eric Auger
2023-10-09 23:08 ` [PATCH v7 02/12] KVM: arm64: PMU: Set the default PMU for the guest before vCPU reset Raghavendra Rao Ananta
2023-10-10 22:25   ` Oliver Upton
2023-10-13 20:27     ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 03/12] KVM: arm64: PMU: Clear PM{C,I}NTEN{SET,CLR} and PMOVS{SET,CLR} on " Raghavendra Rao Ananta
2023-10-16 19:44   ` Eric Auger
2023-10-16 21:28     ` Raghavendra Rao Ananta
2023-10-17  9:23       ` Eric Auger
2023-10-17 16:59         ` Raghavendra Rao Ananta
2023-10-18 21:16           ` Raghavendra Rao Ananta
2023-10-18 22:17             ` Oliver Upton
2023-10-19 18:46             ` Raghavendra Rao Ananta
2023-10-19 19:05               ` Oliver Upton [this message]
2023-10-19 20:17                 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 04/12] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0 Raghavendra Rao Ananta
2023-10-16 19:47   ` Eric Auger
2023-10-09 23:08 ` [PATCH v7 05/12] KVM: arm64: PMU: Add a helper to read a vCPU's PMCR_EL0 Raghavendra Rao Ananta
2023-10-16 20:02   ` Eric Auger
2023-10-09 23:08 ` [PATCH v7 06/12] KVM: arm64: PMU: Add a helper to read the number of counters Raghavendra Rao Ananta
2023-10-10 22:30   ` Oliver Upton
2023-10-13  5:43     ` Oliver Upton
2023-10-13 20:24       ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Raghavendra Rao Ananta
2023-10-16 13:35   ` Sebastian Ott
2023-10-16 19:02     ` Raghavendra Rao Ananta
2023-10-16 19:15       ` Oliver Upton
2023-10-16 21:35         ` Raghavendra Rao Ananta
2023-10-17  5:52           ` Oliver Upton
2023-10-17  5:55             ` Oliver Upton
2023-10-17 16:58             ` Raghavendra Rao Ananta
2023-10-17 17:09               ` Oliver Upton
2023-10-17 17:25                 ` Raghavendra Rao Ananta
2023-10-17 18:10                   ` Oliver Upton
2023-10-17 18:45                     ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 08/12] KVM: arm64: PMU: Allow userspace to limit PMCR_EL0.N for the guest Raghavendra Rao Ananta
2023-10-17 15:52   ` Sebastian Ott
2023-10-17 16:49     ` Raghavendra Rao Ananta
2023-10-19 10:45       ` Sebastian Ott
2023-10-19 18:05         ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 09/12] tools: Import arm_pmuv3.h Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 10/12] KVM: selftests: aarch64: Introduce vpmu_counter_access test Raghavendra Rao Ananta
2023-10-12 11:24   ` Sebastian Ott
2023-10-12 15:01     ` Sebastian Ott
2023-10-13 21:05       ` Raghavendra Rao Ananta
2023-10-16 10:01         ` Sebastian Ott
2023-10-16 18:56         ` Oliver Upton
2023-10-16 19:05           ` Raghavendra Rao Ananta
2023-10-16 19:07             ` Oliver Upton
2023-10-17 14:51   ` Eric Auger
2023-10-17 17:07     ` Raghavendra Rao Ananta
2023-10-17 15:48   ` Sebastian Ott
2023-10-17 17:10     ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 11/12] KVM: selftests: aarch64: vPMU register test for implemented counters Raghavendra Rao Ananta
2023-10-17 18:54   ` Eric Auger
2023-10-17 21:42     ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 12/12] KVM: selftests: aarch64: vPMU register test for unimplemented counters Raghavendra Rao Ananta
2023-10-18  6:54   ` Eric Auger
2023-10-19 18:09     ` Raghavendra Rao Ananta

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