From: Eric Auger <eauger@redhat.com>
To: Raghavendra Rao Ananta <rananta@google.com>,
Oliver Upton <oliver.upton@linux.dev>,
Marc Zyngier <maz@kernel.org>
Cc: Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Shaoqin Huang <shahuang@redhat.com>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v7 04/12] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0
Date: Mon, 16 Oct 2023 21:47:21 +0200 [thread overview]
Message-ID: <20bdc913-57d2-abe9-d222-d77647281b43@redhat.com> (raw)
In-Reply-To: <20231009230858.3444834-5-rananta@google.com>
Hi,
On 10/10/23 01:08, Raghavendra Rao Ananta wrote:
> From: Reiji Watanabe <reijiw@google.com>
>
> The default reset function for PMU registers (defined by PMU_SYS_REG)
> now simply clears a specified register. Use the default one for
> PMUSERENR_EL0 and PMCCFILTR_EL0, as KVM currently clears those
> registers on vCPU reset (NOTE: All non-RES0 fields of those
> registers have UNKNOWN reset values, and the same fields of
> their AArch32 registers have 0 reset values).
>
> No functional change intended.
>
> Signed-off-by: Reiji Watanabe <reijiw@google.com>
> Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> ---
> arch/arm64/kvm/sys_regs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 3dbb7d276b0e..08af7824e9d8 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -2180,7 +2180,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
> * in 32bit mode. Here we choose to reset it as zero for consistency.
> */
> { PMU_SYS_REG(PMUSERENR_EL0), .access = access_pmuserenr,
> - .reset = reset_val, .reg = PMUSERENR_EL0, .val = 0 },
> + .reg = PMUSERENR_EL0, },
> { PMU_SYS_REG(PMOVSSET_EL0),
> .access = access_pmovs, .reg = PMOVSSET_EL0 },
>
> @@ -2338,7 +2338,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
> * in 32bit mode. Here we choose to reset it as zero for consistency.
> */
> { PMU_SYS_REG(PMCCFILTR_EL0), .access = access_pmu_evtyper,
> - .reset = reset_val, .reg = PMCCFILTR_EL0, .val = 0 },
> + .reg = PMCCFILTR_EL0, },
>
> EL2_REG(VPIDR_EL2, access_rw, reset_unknown, 0),
> EL2_REG(VMPIDR_EL2, access_rw, reset_unknown, 0),
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Thanks
Eric
next prev parent reply other threads:[~2023-10-16 19:48 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-09 23:08 [PATCH v7 00/12] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 01/12] KVM: arm64: PMU: Introduce helpers to set the guest's PMU Raghavendra Rao Ananta
2023-10-16 19:45 ` Eric Auger
2023-10-09 23:08 ` [PATCH v7 02/12] KVM: arm64: PMU: Set the default PMU for the guest before vCPU reset Raghavendra Rao Ananta
2023-10-10 22:25 ` Oliver Upton
2023-10-13 20:27 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 03/12] KVM: arm64: PMU: Clear PM{C,I}NTEN{SET,CLR} and PMOVS{SET,CLR} on " Raghavendra Rao Ananta
2023-10-16 19:44 ` Eric Auger
2023-10-16 21:28 ` Raghavendra Rao Ananta
2023-10-17 9:23 ` Eric Auger
2023-10-17 16:59 ` Raghavendra Rao Ananta
2023-10-18 21:16 ` Raghavendra Rao Ananta
2023-10-18 22:17 ` Oliver Upton
2023-10-19 18:46 ` Raghavendra Rao Ananta
2023-10-19 19:05 ` Oliver Upton
2023-10-19 20:17 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 04/12] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0 Raghavendra Rao Ananta
2023-10-16 19:47 ` Eric Auger [this message]
2023-10-09 23:08 ` [PATCH v7 05/12] KVM: arm64: PMU: Add a helper to read a vCPU's PMCR_EL0 Raghavendra Rao Ananta
2023-10-16 20:02 ` Eric Auger
2023-10-09 23:08 ` [PATCH v7 06/12] KVM: arm64: PMU: Add a helper to read the number of counters Raghavendra Rao Ananta
2023-10-10 22:30 ` Oliver Upton
2023-10-13 5:43 ` Oliver Upton
2023-10-13 20:24 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Raghavendra Rao Ananta
2023-10-16 13:35 ` Sebastian Ott
2023-10-16 19:02 ` Raghavendra Rao Ananta
2023-10-16 19:15 ` Oliver Upton
2023-10-16 21:35 ` Raghavendra Rao Ananta
2023-10-17 5:52 ` Oliver Upton
2023-10-17 5:55 ` Oliver Upton
2023-10-17 16:58 ` Raghavendra Rao Ananta
2023-10-17 17:09 ` Oliver Upton
2023-10-17 17:25 ` Raghavendra Rao Ananta
2023-10-17 18:10 ` Oliver Upton
2023-10-17 18:45 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 08/12] KVM: arm64: PMU: Allow userspace to limit PMCR_EL0.N for the guest Raghavendra Rao Ananta
2023-10-17 15:52 ` Sebastian Ott
2023-10-17 16:49 ` Raghavendra Rao Ananta
2023-10-19 10:45 ` Sebastian Ott
2023-10-19 18:05 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 09/12] tools: Import arm_pmuv3.h Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 10/12] KVM: selftests: aarch64: Introduce vpmu_counter_access test Raghavendra Rao Ananta
2023-10-12 11:24 ` Sebastian Ott
2023-10-12 15:01 ` Sebastian Ott
2023-10-13 21:05 ` Raghavendra Rao Ananta
2023-10-16 10:01 ` Sebastian Ott
2023-10-16 18:56 ` Oliver Upton
2023-10-16 19:05 ` Raghavendra Rao Ananta
2023-10-16 19:07 ` Oliver Upton
2023-10-17 14:51 ` Eric Auger
2023-10-17 17:07 ` Raghavendra Rao Ananta
2023-10-17 15:48 ` Sebastian Ott
2023-10-17 17:10 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 11/12] KVM: selftests: aarch64: vPMU register test for implemented counters Raghavendra Rao Ananta
2023-10-17 18:54 ` Eric Auger
2023-10-17 21:42 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 12/12] KVM: selftests: aarch64: vPMU register test for unimplemented counters Raghavendra Rao Ananta
2023-10-18 6:54 ` Eric Auger
2023-10-19 18:09 ` Raghavendra Rao Ananta
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