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From: Thomas Gleixner <tglx@linutronix.de>
To: "Duran, Leo" <leo.duran@amd.com>
Cc: "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>,
	Borislav Petkov <bp@alien8.de>, "x86@kernel.org" <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Ghannam, Yazen" <Yazen.Ghannam@amd.com>,
	Peter Zijlstra <peterz@infradead.org>
Subject: RE: [PATCH 1/2] x86/CPU/AMD: Present package as die instead of socket
Date: Tue, 27 Jun 2017 18:19:24 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.20.1706271809440.1798@nanos> (raw)
In-Reply-To: <DM5PR12MB12439895F6D748B8AC1A7997F9DC0@DM5PR12MB1243.namprd12.prod.outlook.com>

On Tue, 27 Jun 2017, Duran, Leo wrote:
> > From: Thomas Gleixner [mailto:tglx@linutronix.de]
> > On Tue, 27 Jun 2017, Suravee Suthikulpanit wrote:
> > > On 6/27/17 17:48, Borislav Petkov wrote:
> > > > On Tue, Jun 27, 2017 at 01:40:52AM -0500, Suravee Suthikulpanit wrote:
> > > > > However, this is not the case on AMD family17h multi-die processor
> > > > > platforms, which can have up to 4 dies per socket as shown in the
> > > > > following system topology.
> > > >
> > > > So what exactly does that mean? A die is a package on ZN and you can
> > > > have up to 4 packages on a physical socket?
> > >
> > > Yes. 4 packages (or 4 dies, or 4 NUMA nodes) in a socket.
> > 
> > And why is this relevant at all?
> > 
> > The kernel does not care about sockets. Sockets are electromechanical
> > components and completely irrelevant.
> > 
> > The kernel cares about :
> > 
> >     Threads	 - Single scheduling unit
> > 
> >     Cores	 - Contains one or more threads
> > 
> >     Packages	 - Contains one or more cores. The cores share L3.
> > 
> >     NUMA Node	 - Contains one or more Packages which share a memory
> >     	 	   controller.
> > 
> > 		   I'm not aware of x86 systems which have several Packages
> > 		   sharing a memory controller, so Package == NUMA Node
> > 		   (but I might be wrong here).
> > 
> >     Platform	 - Contains one or more Numa Nodes
> [Duran, Leo] 

> That is my understanding of intent as well... However, regarding the L3:

Obviously is that not your understanding.

> The sentence 'The cores share L3.' under 'Packages' may give the
> impression that all cores in a package share an L3.
> In our case, we define a Package a group of cores sharing a memory
> controller, a 'Die' in hardware terms.
>
> Also, it turns out that within a Package we may have separate groups of
> cores each having their own L3 (in hardware terms we refer to those as a
> 'Core Complex').
>
> Basically, in our case a Package may contain more than one L3 (i.e., in
> hardware terms, there may more than one 'Core complex' in a 'Die').
>
> The important point is that all logical processors (threads) that share
> an L3 have a common "cpu_llc_id".

I don't care at all what you call a package. Really. The only relevant view
is what the kernel thinks a package is. And I made that entirely clear.

If you think that's confusing, then feel free to submit patches which
change the names we are using throughout x86 including the documentation.

Thanks,

	tglx

  parent reply	other threads:[~2017-06-27 16:19 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-27  6:40 [PATCH 0/2] x86/CPU/AMD: Fix multi-die processor topology info Suravee Suthikulpanit
2017-06-27  6:40 ` [PATCH 1/2] x86/CPU/AMD: Present package as die instead of socket Suravee Suthikulpanit
2017-06-27 10:48   ` Borislav Petkov
2017-06-27 13:07     ` Suravee Suthikulpanit
2017-06-27 13:42       ` Borislav Petkov
2017-06-27 16:54         ` Suravee Suthikulpanit
2017-06-27 17:44           ` Borislav Petkov
2017-06-27 18:32             ` Ghannam, Yazen
2017-06-27 18:44               ` Borislav Petkov
2017-06-27 20:26             ` Suravee Suthikulpanit
2017-06-28  9:12               ` Borislav Petkov
2017-06-27 14:21       ` Thomas Gleixner
2017-06-27 14:54         ` Brice Goglin
2017-06-27 15:48         ` Duran, Leo
2017-06-27 16:11           ` Borislav Petkov
2017-06-27 16:23             ` Duran, Leo
2017-06-27 16:31               ` Borislav Petkov
2017-06-27 16:42                 ` Duran, Leo
2017-06-27 16:45                   ` Borislav Petkov
2017-06-27 17:04                     ` Duran, Leo
2017-06-27 16:19           ` Thomas Gleixner [this message]
2017-06-27 16:34             ` Duran, Leo
2017-06-27 15:55         ` Suravee Suthikulpanit
2017-06-27 16:16           ` Borislav Petkov
2017-07-05 15:50       ` Peter Zijlstra
2017-06-27  6:40 ` [PATCH 2/2] x86/CPU/AMD: Use L3 Cache info from CPUID to determine LLC ID Suravee Suthikulpanit

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