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From: <Conor.Dooley@microchip.com>
To: <krzysztof.kozlowski@linaro.org>,
	<Nagasuresh.Relli@microchip.com>, <broonie@kernel.org>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>
Cc: <linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<Valentina.FernandezAlanis@microchip.com>
Subject: Re: [PATCH v3 2/4] spi: dt-binding: add coreqspi as a fallback for mpfs-qspi
Date: Fri, 5 Aug 2022 08:44:39 +0000	[thread overview]
Message-ID: <c2256f4b-95cd-aa9b-f839-8f54e2ba8d5e@microchip.com> (raw)
In-Reply-To: <d94704b7-8a21-9eed-68e8-53221a08d677@linaro.org>

On 05/08/2022 09:12, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On 05/08/2022 09:34, Conor.Dooley@microchip.com wrote:
>> On 05/08/2022 07:49, Krzysztof Kozlowski wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> On 05/08/2022 07:30, Naga Sureshkumar Relli wrote:
>>>> diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
>>>> index a47d4923b51b..84d32c1a4d60 100644
>>>> --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
>>>> +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
>>>> @@ -18,10 +18,12 @@ allOf:
>>>>
>>>>    properties:
>>>>      compatible:
>>>> -    enum:
>>>> -      - microchip,mpfs-spi
>>>> -      - microchip,mpfs-qspi
>>>> -      - microchip,coreqspi-rtl-v2 # FPGA QSPI
>>>> +   oneOf:
>>>> +    - items:
>>>> +        - const: microchip,mpfs-qspi
>>>> +        - const: microchip,coreqspi-rtl-v2
>>>
>>> Eh, this does not make sense after looking at your driver...
>>
>> What is wrong with explicitly binding the driver to both of the
>> compatible strings? The "hard" peripheral in the SoC part of the
>> FPGA is a superset of version 2 of the coreQSPI IP so the fallback
>> used in the binding here makes sense to me. coreQSPI can be
>> instantiated in the FPGA fabric and used there, so it needs a
>> compatible of its own.
>>
>> That brings me back to the original point question, why not
>> explicitly bind the driver to both of the compatible strings it
>> is known to work for?
> 
> There is nothing particularly bad with matching to both of compatibles.
> It is valid code. There are however questions/issues with that:
> 
> 1. It is redundant. I did not look too much at the driver, but none of
> the of_device_id entries have some driver data to differentiate,
> therefore - for the driver - the devices are identical. If they are
> identical and according to binding compatible, use less code and just
> one compatible.

Right. Then the binding is correct and the driver should only bind
against "microchip,coreqspi-rtl-v2".

> 
> 2. Otherwise, maybe the devices are not actually fully compatible?
> That's the second problem. If one writes binding like that and codes it
> in driver differently, it looks like it was not investigated really and
> I ask questions...
> 
> Best regards,
> Krzysztof


  reply	other threads:[~2022-08-05  8:44 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-05  5:30 [PATCH v3 0/4] Add support for Microchip QSPI controller Naga Sureshkumar Relli
2022-08-05  5:30 ` [PATCH v3 1/4] spi: dt-binding: document microchip coreQSPI Naga Sureshkumar Relli
2022-08-05  6:46   ` Krzysztof Kozlowski
2022-08-05  5:30 ` [PATCH v3 2/4] spi: dt-binding: add coreqspi as a fallback for mpfs-qspi Naga Sureshkumar Relli
2022-08-05  6:47   ` Krzysztof Kozlowski
2022-08-05  6:49   ` Krzysztof Kozlowski
2022-08-05  7:34     ` Conor.Dooley
2022-08-05  8:12       ` Krzysztof Kozlowski
2022-08-05  8:44         ` Conor.Dooley [this message]
2022-08-05  8:47           ` Krzysztof Kozlowski
2022-08-05 14:14   ` Rob Herring
2022-08-05  5:30 ` [PATCH v3 3/4] spi: microchip-core-qspi: Add support for microchip fpga qspi controllers Naga Sureshkumar Relli
2022-08-05  6:50   ` Krzysztof Kozlowski
2022-08-05  5:30 ` [PATCH v3 4/4] MAINTAINERS: add qspi to Polarfire SoC entry Naga Sureshkumar Relli
2022-08-05  6:50   ` Krzysztof Kozlowski
2022-08-05 11:04     ` Mark Brown
2022-08-05 11:05   ` Mark Brown
2022-08-05 12:07     ` Conor.Dooley
2022-08-05 12:11       ` Mark Brown
2022-08-05  9:14 ` [PATCH v3 0/4] Add support for Microchip QSPI controller Conor.Dooley

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