From: Dave Hansen <dave.hansen@intel.com>
To: "Woodhouse, David" <dwmw@amazon.co.uk>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"tim.c.chen@linux.intel.com" <tim.c.chen@linux.intel.com>,
"arjan@linux.intel.com" <arjan@linux.intel.com>,
"Raslan, KarimAllah" <karahmed@amazon.de>,
"peterz@infradead.org" <peterz@infradead.org>,
"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"ak@linux.intel.com" <ak@linux.intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"bp@alien8.de" <bp@alien8.de>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"gregkh@linux-foundation.org" <gregkh@linux-foundation.org>
Subject: Re: [PATCH v2 2/5] x86/cpufeatures: Add Intel feature bits for Speculation Control
Date: Tue, 23 Jan 2018 17:28:35 -0800 [thread overview]
Message-ID: <c5cf14cc-5fc0-c397-89d5-53d7f1b95aa7@intel.com> (raw)
In-Reply-To: <1516757037.13558.65.camel@amazon.co.uk>
On 01/23/2018 05:23 PM, Woodhouse, David wrote:
> On Tue, 2018-01-23 at 10:43 -0800, Dave Hansen wrote:
...
>>> /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
>>> #define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* AVX-512 Neural Network Instructions */
>>> #define X86_FEATURE_AVX512_4FMAPS (18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
>>> +#define X86_FEATURE_SPEC_CTRL (18*32+26) /* Speculation Control (IBRS + IBPB) */
>>> +#define X86_FEATURE_STIBP (18*32+27) /* Single Thread Indirect Branch Predictors */
>>> +#define X86_FEATURE_ARCH_CAPABILITIES (18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
>> Should we be adding flags (STIBP) for which we currently have no user in
>> the kernel?
> They're in an existing word (now) so it costs us absolutely nothing to
> do so. And they'll be exposed to KVM guests in imminent patches if
> nothing else.
Doesn't just defining it here generate something in the tables that then
get exported in /proc/cpuinfo? That's far from our most strict ABI, but
a single #define here can be seen by users IIRC.
next prev parent reply other threads:[~2018-01-24 1:28 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-23 16:52 [PATCH v2 0/5] Basic Speculation Control feature support David Woodhouse
2018-01-23 16:52 ` [PATCH v2 1/5] x86/cpufeatures: Add CPUID_7_EDX CPUID leaf David Woodhouse
2018-01-23 16:52 ` [PATCH v2 2/5] x86/cpufeatures: Add Intel feature bits for Speculation Control David Woodhouse
2018-01-23 18:43 ` Dave Hansen
2018-01-24 1:23 ` Woodhouse, David
2018-01-24 1:28 ` Dave Hansen [this message]
2018-01-24 8:13 ` Woodhouse, David
2018-01-23 16:52 ` [PATCH v2 3/5] x86/cpufeatures: Add AMD " David Woodhouse
2018-01-24 8:39 ` Kirill A. Shutemov
2018-01-24 8:40 ` David Woodhouse
2018-01-23 16:52 ` [PATCH v2 4/5] x86/msr: Add definitions for new speculation control MSRs David Woodhouse
2018-01-23 18:27 ` Dave Hansen
2018-01-23 18:31 ` Greg KH
2018-01-23 18:48 ` Woodhouse, David
2018-01-23 16:52 ` [PATCH v2 5/5] x86/pti: Do not enable PTI on fixed Intel processors David Woodhouse
2018-01-23 18:12 ` Andi Kleen
2018-01-24 1:21 ` David Woodhouse
2018-01-23 18:40 ` Dave Hansen
2018-01-24 1:27 ` David Woodhouse
2018-01-23 18:41 ` Dave Hansen
2018-01-23 18:44 ` Woodhouse, David
2018-01-23 18:45 ` Alan Cox
2018-01-23 19:02 ` Andrew Cooper
2018-01-23 20:45 ` Alan Cox
2018-01-23 20:38 ` Linus Torvalds
2018-01-23 20:50 ` David Woodhouse
2018-01-24 16:25 ` David Woodhouse
2018-01-24 17:07 ` Alan Cox
2018-01-24 17:42 ` David Woodhouse
2018-01-24 18:40 ` Alan Cox
2018-01-24 18:59 ` David Woodhouse
2018-01-24 19:37 ` David Woodhouse
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