From: "Woodhouse, David" <dwmw@amazon.co.uk>
To: "gregkh@linux-foundation.org" <gregkh@linux-foundation.org>,
"dave.hansen@intel.com" <dave.hansen@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"tim.c.chen@linux.intel.com" <tim.c.chen@linux.intel.com>,
"arjan@linux.intel.com" <arjan@linux.intel.com>,
"Raslan, KarimAllah" <karahmed@amazon.de>,
"peterz@infradead.org" <peterz@infradead.org>,
"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"ak@linux.intel.com" <ak@linux.intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"bp@alien8.de" <bp@alien8.de>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>
Subject: Re: [PATCH v2 4/5] x86/msr: Add definitions for new speculation control MSRs
Date: Tue, 23 Jan 2018 18:48:58 +0000 [thread overview]
Message-ID: <1516733338.9521.166.camel@amazon.co.uk> (raw)
In-Reply-To: <20180123183109.GA12453@kroah.com>
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On Tue, 2018-01-23 at 19:31 +0100, Greg KH wrote:
> On Tue, Jan 23, 2018 at 10:27:24AM -0800, Dave Hansen wrote:
> >
> > On 01/23/2018 08:52 AM, David Woodhouse wrote:
> > >
> > > +#define MSR_IA32_ARCH_CAPABILITIES 0x0000010a
> > > +#define ARCH_CAP_RDCL_NO (1 << 0) /* Not susceptible to Meltdown */
> > > +#define ARCH_CAP_IBRS_ALL (1 << 1) /* Enhanced IBRS support */
> > Do we want to spell out the silly Intel acronym? I don't know how we
> > fit it on the right side, but I do think we need to do it _somewhere_.
> > We need the code to stand on its own to some degree and not subject the
> > masses to reading the spec to understand the code.
>
> Yes please, take pity on us :)
The comment says 'Not susceptible to Meltdown', and it's used in a
context where it disabled the X86_CPU_BUG_MELTDOWN bit. I think that's
a *bit* of a hint about what it does.
Expanding the silly Intel acronym doesn't give you any useful
information except perhaps which pointless bits of word soup they
happened to string together in the spec.
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Amazon Web Services UK Limited. Registered in England and Wales with registration number 08650665 and which has its registered office at 60 Holborn Viaduct, London EC1A 2FD, United Kingdom.
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next prev parent reply other threads:[~2018-01-23 18:48 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-23 16:52 [PATCH v2 0/5] Basic Speculation Control feature support David Woodhouse
2018-01-23 16:52 ` [PATCH v2 1/5] x86/cpufeatures: Add CPUID_7_EDX CPUID leaf David Woodhouse
2018-01-23 16:52 ` [PATCH v2 2/5] x86/cpufeatures: Add Intel feature bits for Speculation Control David Woodhouse
2018-01-23 18:43 ` Dave Hansen
2018-01-24 1:23 ` Woodhouse, David
2018-01-24 1:28 ` Dave Hansen
2018-01-24 8:13 ` Woodhouse, David
2018-01-23 16:52 ` [PATCH v2 3/5] x86/cpufeatures: Add AMD " David Woodhouse
2018-01-24 8:39 ` Kirill A. Shutemov
2018-01-24 8:40 ` David Woodhouse
2018-01-23 16:52 ` [PATCH v2 4/5] x86/msr: Add definitions for new speculation control MSRs David Woodhouse
2018-01-23 18:27 ` Dave Hansen
2018-01-23 18:31 ` Greg KH
2018-01-23 18:48 ` Woodhouse, David [this message]
2018-01-23 16:52 ` [PATCH v2 5/5] x86/pti: Do not enable PTI on fixed Intel processors David Woodhouse
2018-01-23 18:12 ` Andi Kleen
2018-01-24 1:21 ` David Woodhouse
2018-01-23 18:40 ` Dave Hansen
2018-01-24 1:27 ` David Woodhouse
2018-01-23 18:41 ` Dave Hansen
2018-01-23 18:44 ` Woodhouse, David
2018-01-23 18:45 ` Alan Cox
2018-01-23 19:02 ` Andrew Cooper
2018-01-23 20:45 ` Alan Cox
2018-01-23 20:38 ` Linus Torvalds
2018-01-23 20:50 ` David Woodhouse
2018-01-24 16:25 ` David Woodhouse
2018-01-24 17:07 ` Alan Cox
2018-01-24 17:42 ` David Woodhouse
2018-01-24 18:40 ` Alan Cox
2018-01-24 18:59 ` David Woodhouse
2018-01-24 19:37 ` David Woodhouse
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