From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: "Mukunda,Vijendar" <vijendar.mukunda@amd.com>, broonie@kernel.org
Cc: alsa-devel@alsa-project.org, Basavaraj.Hiregoudar@amd.com,
Sunil-kumar.Dommati@amd.com, Mastan.Katragadda@amd.com,
Arungopal.kondaveeti@amd.com, mario.limonciello@amd.com,
Liam Girdwood <lgirdwood@gmail.com>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Syed Saba Kareem <Syed.SabaKareem@amd.com>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2 2/9] ASoC: amd: ps: handle SoundWire interrupts in acp pci driver
Date: Tue, 23 May 2023 09:34:56 -0500 [thread overview]
Message-ID: <d1baccf7-c689-fc40-d616-855c253021fc@linux.intel.com> (raw)
In-Reply-To: <2e8d3af4-7d54-becf-1084-c9b07a3436d0@amd.com>
>>> static void acp63_disable_interrupts(void __iomem *acp_base)
>>> @@ -102,23 +103,55 @@ static irqreturn_t acp63_irq_handler(int irq, void *dev_id)
>>> {
>>> struct acp63_dev_data *adata;
>>> struct pdm_dev_data *ps_pdm_data;
>>> - u32 val;
>>> + struct amd_sdw_manager *amd_manager;
>>> + u32 ext_intr_stat, ext_intr_stat1;
>>> + u16 irq_flag = 0;
>>> u16 pdev_index;
>>>
>>> adata = dev_id;
>>> if (!adata)
>>> return IRQ_NONE;
>>> + ext_intr_stat = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>>> + if (ext_intr_stat & ACP_SDW0_STAT) {
>>> + writel(ACP_SDW0_STAT, adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>> [1]
>>
>> this is confusing, if this is w1c, should this be:
>>
>> writel(ext_intr_stat, adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>>
>> Otherwise you may be clearing fields that have not been set?
> As per our register spec, writing zero to register fields doesn't
> have any effect. Only writing 1 to register bit will clear that
> interrupt.
> We are handling bit by bit irq check and clearing the irq mask
> based on irq bit and take an action related to that particular irq
> bit.
Right, maybe an explanation in the commit message would help.
next prev parent reply other threads:[~2023-05-23 18:24 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230522133122.166841-1-Vijendar.Mukunda@amd.com>
2023-05-22 13:31 ` [PATCH V2 1/9] ASoC: amd: ps: create platform devices based on acp config Vijendar Mukunda
2023-05-22 16:16 ` Pierre-Louis Bossart
2023-05-23 6:25 ` Mukunda,Vijendar
2023-05-23 14:29 ` Pierre-Louis Bossart
2023-05-24 7:02 ` Mukunda,Vijendar
2023-05-22 13:31 ` [PATCH V2 2/9] ASoC: amd: ps: handle SoundWire interrupts in acp pci driver Vijendar Mukunda
2023-05-22 16:26 ` Pierre-Louis Bossart
2023-05-23 6:49 ` Mukunda,Vijendar
2023-05-23 14:34 ` Pierre-Louis Bossart [this message]
2023-05-24 7:01 ` Mukunda,Vijendar
2023-05-22 13:31 ` [PATCH V2 3/9] ASoC: amd: ps: add SoundWire dma driver Vijendar Mukunda
2023-05-22 16:34 ` Pierre-Louis Bossart
2023-05-23 7:11 ` Mukunda,Vijendar
2023-05-23 14:48 ` Pierre-Louis Bossart
2023-05-24 11:37 ` Mukunda,Vijendar
2023-05-25 11:43 ` Mukunda,Vijendar
2023-05-22 13:31 ` [PATCH V2 4/9] ASoC: amd: ps: add SoundWire dma driver dma ops Vijendar Mukunda
2023-05-22 16:39 ` Pierre-Louis Bossart
2023-05-23 5:41 ` Mukunda,Vijendar
2023-05-22 13:31 ` [PATCH V2 5/9] ASoC: amd: ps: add support for SoundWire DMA interrupts Vijendar Mukunda
2023-05-22 18:12 ` Pierre-Louis Bossart
2023-05-23 7:36 ` Mukunda,Vijendar
2023-05-23 15:00 ` Pierre-Louis Bossart
2023-05-24 7:45 ` Mukunda,Vijendar
2023-05-31 7:28 ` Mukunda,Vijendar
2023-05-31 13:53 ` Pierre-Louis Bossart
2023-06-05 11:24 ` Mukunda,Vijendar
2023-05-22 13:31 ` [PATCH V2 6/9] ASoC: amd: ps: add pm ops support for SoundWire dma driver Vijendar Mukunda
2023-05-22 18:20 ` Pierre-Louis Bossart
2023-05-23 10:53 ` Mukunda,Vijendar
2023-05-23 15:03 ` Pierre-Louis Bossart
2023-05-22 13:31 ` [PATCH V2 7/9] ASoC: amd: ps: enable SoundWire dma driver build Vijendar Mukunda
2023-05-22 13:31 ` [PATCH V2 8/9] ASoC: amd: update comments in Kconfig file Vijendar Mukunda
2023-05-22 13:31 ` [PATCH V2 9/9] ASoC: amd: ps: Add SoundWire specific checks in pci driver in pm ops Vijendar Mukunda
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