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* [PATCH 0/3] Intel Platform Monitoring Technology
@ 2020-05-05  1:32 David E. Box
  2020-05-05  1:32 ` [PATCH 1/3] pci: Add Designated Vendor Specific Capability David E. Box
                   ` (5 more replies)
  0 siblings, 6 replies; 59+ messages in thread
From: David E. Box @ 2020-05-05  1:32 UTC (permalink / raw)
  Cc: David E. Box, linux-kernel

Intel Platform Monitoring Technology (PMT) is an architecture for
enumerating and accessing hardware monitoring capabilities on a device.
With customers increasingly asking for hardware telemetry, engineers not
only have to figure out how to measure and collect data, but also how to
deliver it and make it discoverable. The latter may be through some device
specific method requiring device specific tools to collect the data. This
in turn requires customers to manage a suite of different tools in order to
collect the differing assortment of monitoring data on their systems.  Even
when such information can be provided in kernel drivers, they may require
constant maintanence to update register mappings as they change with
firmware updates and new versions of hardware. PMT provides a solution for
discovering and reading telemetry from a device through a hardware agnostic
framework that allows for updates to systems without requiring patches to
the kernel or software tools.

PMT defines several capabilities to support collecting monitoring data from
hardware. All are discoverable as separate instances of the PCIE Designated
Vendor extended capability (DVSEC) with the Intel vendor code. The DVSEC ID
field uniquely identifies the capability. Each DVSEC also provides a BAR
offset to a header that defines capability-specific attributes, including
GUID, feature type, offset and length, as well as configuration settings
where applicable. The GUID uniquely identifies the register space of any
monitor data exposed by the capability. The GUID is associated with an XML
file from the vendor that describes the mapping of the register space along
with properties of the monitor data. This allows vendors to perform
firmware updates that can change the mapping (e.g. add new metrics) without
requiring any changes to drivers or software tools. The new mapping is
confirmed by an updated GUID, read from the hardware, which software uses
with a new XML.

The current capabilities defined by PMT are Telemetry, Watcher, and
Crashlog.  The Telemetry capability provides access to a continuous block
of read only data. The Watcher capability provides access to hardware
sampling and tracing features. Crashlog provides access to device crash
dumps.  While there is some relationship between capabilities (Watcher can
be configured to sample from the Telemetry data set) each exists as stand
alone features with no dependency on any other. The design therefore splits
them into individual, capability specific drivers. MFD is used to create
platform devices for each capability so that they may be managed by their
own driver. The PMT architecture is (for the most part) agnostic to the
type of device it can collect from. Devices nodes are consequently generic
in naming, e.g. /dev/telem<n> and /dev/smplr<n>. Each capability driver
creates a class to manage the list of devices supporting it.  Software can
see which devices support a PMT feature by perusing each device file
underneath the class in sysfs. It can additionally see if a particluar
device supports a PMT feature by seeing if that device contains a pointer
to a PMT class in its device folder.

This patch set provides support for the PMT framework, along with support
for Telemetry on Tiger Lake.

Patch 1 - adds the Designated Vendor PCI Extended Capability. The PMT
	  feature is discoverable as an Intel DVSEC capabilitity.

Patch 2 - an MFD driver that creates cells for each PMT capability found on
	  a PCI device. This supports SoC platforms that expose PMT
	  capabilities under a PMT dedicated PCI device id.

Patch 3 - adds support for the PMT Telemetry feature.

To: bhelgaas@google.com,
    andy@infradead.org,
    alexander.h.duyck@intel.com
Cc: linux-kernel@vger.kernel.org,
    linux-pci@vger.kernel.org

*** BLURB HERE ***

David E. Box (3):
  pci: Add Designated Vendor Specific Capability
  mfd: Intel Platform Monitoring Technology support
  platform/x86: Intel PMT Telemetry capability driver

 .../ABI/testing/sysfs-class-intel_pmt_telem   |  46 +++
 MAINTAINERS                                   |   6 +
 drivers/mfd/Kconfig                           |  10 +
 drivers/mfd/Makefile                          |   1 +
 drivers/mfd/intel_pmt.c                       | 174 +++++++++
 drivers/platform/x86/Kconfig                  |  10 +
 drivers/platform/x86/Makefile                 |   1 +
 drivers/platform/x86/intel_pmt_telem.c        | 356 ++++++++++++++++++
 drivers/platform/x86/intel_pmt_telem.h        |  20 +
 include/linux/intel-dvsec.h                   |  44 +++
 include/uapi/linux/pci_regs.h                 |   5 +
 11 files changed, 673 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-class-intel_pmt_telem
 create mode 100644 drivers/mfd/intel_pmt.c
 create mode 100644 drivers/platform/x86/intel_pmt_telem.c
 create mode 100644 drivers/platform/x86/intel_pmt_telem.h
 create mode 100644 include/linux/intel-dvsec.h

-- 
2.20.1


^ permalink raw reply	[flat|nested] 59+ messages in thread
* [PATCH V3 0/3] PCI: Add basic Compute eXpress Link DVSEC decode
@ 2020-05-20 18:06 Sean V Kelley
  2020-05-20 18:06 ` [PATCH V3 1/3] PCI: Add defines for Designated Vendor-Specific Capability Sean V Kelley
  0 siblings, 1 reply; 59+ messages in thread
From: Sean V Kelley @ 2020-05-20 18:06 UTC (permalink / raw)
  To: bhelgaas; +Cc: linux-pci, linux-kernel, Sean V Kelley

Changes since v2 [1]:

- Provide comment about what PCI_CXL_LOCK does.
- Use "cxl" in place of "pos" where appropriate to make code more descriptive.
- Remove unnecessary extra check for pci_is_pcie(dev).
- Remove reshuffling of pci_read_config_word() and put them in the right place
when first added.
- Make inline stubs consistent in format locally.
(Bjorn Helgaas)
- Add return to inline stubs to fix warning.
- Refreshed David's patch (V2)

[1] https://lore.kernel.org/linux-pci/20200518163523.1225643-1-sean.v.kelley@linux.intel.com/

This patch series implements basic Designated Vendor-Specific Extended
Capabilities (DVSEC) decode for Compute eXpress Link devices, a new CPU
interconnect building upon PCIe. As a basis for the CXL support it provides
PCI init handling for detection, decode, and caching of CXL device
capabilities.  Moreover, it makes use of the DVSEC Vendor ID and DVSEC ID so
as to identify a CXL capable device. (PCIe r5.0, sec 7.9.6.2)

DocLink: https://www.computeexpresslink.org/

For your reference, a parallel series of patches have been submitted to enable
lspci decode of CXL DVSEC and may be tracked.

Link: https://lore.kernel.org/linux-pci/20200511174618.10589-1-sean.v.kelley@linux.intel.com/

This patch makes use of pending DVSEC related header additions and the
first patch of that series is included here. It can be sorted out when the
upstream merge is done.

Link: https://lore.kernel.org/linux-pci/20200508021844.6911-2-david.e.box@linux.intel.com/

Sample dmesg output of a CXL Type 3 device (CXL.io, CXL.mem):
[    2.997177] pci 0000:6b:00.0: CXL: Cache- IO+ Mem+ Viral- HDMCount 1
[    2.997188] pci 0000:6b:00.0: CXL: cap ctrl status ctrl2 status2 lock
[    2.997201] pci 0000:6b:00.0: CXL: 001e 0002 0000 0000 0000 0000

David E. Box (1):
  PCI: Add defines for Designated Vendor-Specific Capability

Sean V Kelley (2):
  PCI: Add basic Compute eXpress Link DVSEC decode
  PCI: Add helpers to enable/disable CXL.mem and CXL.cache

 drivers/pci/Kconfig           |   9 ++
 drivers/pci/Makefile          |   1 +
 drivers/pci/cxl.c             | 176 ++++++++++++++++++++++++++++++++++
 drivers/pci/pci.h             |  15 +++
 drivers/pci/probe.c           |   1 +
 include/linux/pci.h           |   3 +
 include/uapi/linux/pci_regs.h |   5 +
 7 files changed, 210 insertions(+)
 create mode 100644 drivers/pci/cxl.c

--
2.26.2


^ permalink raw reply	[flat|nested] 59+ messages in thread

end of thread, other threads:[~2020-08-11 14:50 UTC | newest]

Thread overview: 59+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-05  1:32 [PATCH 0/3] Intel Platform Monitoring Technology David E. Box
2020-05-05  1:32 ` [PATCH 1/3] pci: Add Designated Vendor Specific Capability David E. Box
2020-05-05  8:49   ` Andy Shevchenko
2020-05-05 15:00     ` David E. Box
2020-05-05 16:34   ` Bjorn Helgaas
2020-05-05  2:31 ` [PATCH 2/3] mfd: Intel Platform Monitoring Technology support David E. Box
2020-05-05  2:31   ` [PATCH 3/3] platform/x86: Intel PMT Telemetry capability driver David E. Box
2020-05-05 13:49     ` Andy Shevchenko
2020-05-05 21:09       ` David E. Box
2020-05-08  2:33       ` David E. Box
2020-05-05  2:53   ` [PATCH 2/3] mfd: Intel Platform Monitoring Technology support Randy Dunlap
2020-05-05 14:55     ` David E. Box
2020-05-05  9:02   ` Andy Shevchenko
2020-05-05 15:15     ` David E. Box
2020-05-08  2:18 ` [PATCH v2 0/3] Intel Platform Monitoring Technology David E. Box
2020-05-08  9:59   ` Andy Shevchenko
2020-07-14  6:23   ` [PATCH V3 " David E. Box
2020-07-17 19:06     ` [PATCH V4 " David E. Box
2020-07-27 10:23       ` Andy Shevchenko
2020-07-27 16:29         ` David E. Box
2020-07-29 21:37       ` [PATCH V5 " David E. Box
2020-08-10 14:15         ` David E. Box
2020-08-10 14:42           ` Umesh A
2020-08-11  8:04           ` Lee Jones
2020-08-11 14:50             ` David E. Box
2020-07-29 21:37       ` [PATCH V5 1/3] PCI: Add defines for Designated Vendor-Specific Extended Capability David E. Box
2020-07-29 21:37       ` [PATCH V5 2/3] mfd: Intel Platform Monitoring Technology support David E. Box
2020-07-29 21:37       ` [PATCH V5 3/3] platform/x86: Intel PMT Telemetry capability driver David E. Box
2020-07-17 19:06     ` [PATCH V4 1/3] PCI: Add defines for Designated Vendor-Specific Extended Capability David E. Box
2020-07-17 20:11       ` Andy Shevchenko
2020-07-17 19:06     ` [PATCH V4 2/3] mfd: Intel Platform Monitoring Technology support David E. Box
2020-07-28  7:58       ` Lee Jones
2020-07-28 20:35         ` David E. Box
2020-07-29 22:59         ` Mark D Rustad
2020-07-30 17:53           ` David E. Box
2020-07-31  6:19           ` Lee Jones
2020-07-17 19:06     ` [PATCH V4 3/3] platform/x86: Intel PMT Telemetry capability driver David E. Box
2020-07-14  6:23   ` [PATCH V3 1/3] PCI: Add defines for Designated Vendor-Specific Capability David E. Box
2020-07-14  8:40     ` Andy Shevchenko
2020-07-16  2:55     ` Randy Dunlap
2020-07-16 15:07       ` Bjorn Helgaas
2020-07-16 15:07         ` Randy Dunlap
2020-07-16 17:18       ` Alexander Duyck
2020-07-16 18:31         ` David E. Box
2020-07-14  6:23   ` [PATCH V3 2/3] mfd: Intel Platform Monitoring Technology support David E. Box
2020-07-15  5:09     ` kernel test robot
2020-07-14  6:23   ` [PATCH V3 3/3] platform/x86: Intel PMT Telemetry capability driver David E. Box
2020-07-14  8:51     ` Andy Shevchenko
2020-07-15  7:39     ` Alexey Budankov
2020-07-15 23:59       ` David E. Box
2020-07-16  5:57         ` Alexey Budankov
2020-07-16  2:57     ` Randy Dunlap
2020-05-08  2:18 ` [PATCH v2 1/3] PCI: Add defines for Designated Vendor-Specific Capability David E. Box
2020-05-08  2:18 ` [PATCH v2 2/3] mfd: Intel Platform Monitoring Technology support David E. Box
2020-05-08  9:15   ` Andy Shevchenko
2020-05-08  2:18 ` [PATCH v2 3/3] platform/x86: Intel PMT Telemetry capability driver David E. Box
2020-05-08  9:57   ` Andy Shevchenko
2020-05-09 16:27     ` David E. Box
2020-05-20 18:06 [PATCH V3 0/3] PCI: Add basic Compute eXpress Link DVSEC decode Sean V Kelley
2020-05-20 18:06 ` [PATCH V3 1/3] PCI: Add defines for Designated Vendor-Specific Capability Sean V Kelley

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