* [PATCH 0/2] ASoC: ti: j721e-evm: Support for j7200 variant
@ 2020-09-10 7:54 Peter Ujfalusi
2020-09-10 7:54 ` [PATCH 1/2] ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb Peter Ujfalusi
2020-09-10 7:54 ` [PATCH 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio Peter Ujfalusi
0 siblings, 2 replies; 5+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 7:54 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: alsa-devel, devicetree, linux-kernel
Hi,
When j7200 SOM is connected to the CPB, the audio setup is a bit different:
Only 48KHz family have clock path, 44.1KHz is not supported.
Update the binding documentation and add support for the j7200 version of CPB
to the driver.
Regards,
Peter
---
Peter Ujfalusi (2):
ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb
ASoC: ti: j721e-evm: Add support for j7200-cpb audio
.../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++-----
sound/soc/ti/j721e-evm.c | 11 +++
2 files changed, 81 insertions(+), 22 deletions(-)
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb
2020-09-10 7:54 [PATCH 0/2] ASoC: ti: j721e-evm: Support for j7200 variant Peter Ujfalusi
@ 2020-09-10 7:54 ` Peter Ujfalusi
2020-09-10 7:54 ` [PATCH 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio Peter Ujfalusi
1 sibling, 0 replies; 5+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 7:54 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: alsa-devel, devicetree, linux-kernel
j721e or j7200 SOM can be attached to the same Common Processor Board (CPB)
With the j7200 SOM only the 48KHz family parent clock is available and
McASP0 is used for the audio.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
.../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++-----
1 file changed, 70 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
index d52cfbeb2d07..805da4d6a88e 100644
--- a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
+++ b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
@@ -18,18 +18,25 @@ description: |
PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
different HSDIVIDER.
- Clocking setup for 48KHz family:
- PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
- |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+ Clocking setup for j721e:
+ 48KHz family:
+ PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
+ |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
- Clocking setup for 44.1KHz family:
- PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
- |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+ 44.1KHz family:
+ PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
+ |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+
+ Clocking setup for j7200:
+ 48KHz family:
+ PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk
+ |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
properties:
compatible:
- items:
- - const: ti,j721e-cpb-audio
+ enum:
+ - ti,j721e-cpb-audio
+ - ti,j7200-cpb-audio
model:
$ref: /schemas/types.yaml#/definitions/string
@@ -44,22 +51,12 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
clocks:
- items:
- - description: AUXCLK clock for McASP used by CPB audio
- - description: Parent for CPB_McASP auxclk (for 48KHz)
- - description: Parent for CPB_McASP auxclk (for 44.1KHz)
- - description: SCKI clock for the pcm3168a codec on CPB
- - description: Parent for CPB_SCKI clock (for 48KHz)
- - description: Parent for CPB_SCKI clock (for 44.1KHz)
+ minItems: 4
+ maxItems: 6
clock-names:
- items:
- - const: cpb-mcasp-auxclk
- - const: cpb-mcasp-auxclk-48000
- - const: cpb-mcasp-auxclk-44100
- - const: cpb-codec-scki
- - const: cpb-codec-scki-48000
- - const: cpb-codec-scki-44100
+ minItems: 4
+ maxItems: 6
required:
- compatible
@@ -71,6 +68,57 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,j721e-cpb-audio
+
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ items:
+ - description: AUXCLK clock for McASP used by CPB audio
+ - description: Parent for CPB_McASP auxclk (for 48KHz)
+ - description: Parent for CPB_McASP auxclk (for 44.1KHz)
+ - description: SCKI clock for the pcm3168a codec on CPB
+ - description: Parent for CPB_SCKI clock (for 48KHz)
+ - description: Parent for CPB_SCKI clock (for 44.1KHz)
+
+ clock-names:
+ items:
+ - const: cpb-mcasp-auxclk
+ - const: cpb-mcasp-auxclk-48000
+ - const: cpb-mcasp-auxclk-44100
+ - const: cpb-codec-scki
+ - const: cpb-codec-scki-48000
+ - const: cpb-codec-scki-44100
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,j7200-cpb-audio
+
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ items:
+ - description: AUXCLK clock for McASP used by CPB audio
+ - description: Parent for CPB_McASP auxclk (for 48KHz)
+ - description: SCKI clock for the pcm3168a codec on CPB
+ - description: Parent for CPB_SCKI clock (for 48KHz)
+
+ clock-names:
+ items:
+ - const: cpb-mcasp-auxclk
+ - const: cpb-mcasp-auxclk-48000
+ - const: cpb-codec-scki
+ - const: cpb-codec-scki-48000
+
examples:
- |+
sound {
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio
2020-09-10 7:54 [PATCH 0/2] ASoC: ti: j721e-evm: Support for j7200 variant Peter Ujfalusi
2020-09-10 7:54 ` [PATCH 1/2] ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb Peter Ujfalusi
@ 2020-09-10 7:54 ` Peter Ujfalusi
[not found] ` <202009101750.MT0BQY74%lkp@intel.com>
1 sibling, 1 reply; 5+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 7:54 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: alsa-devel, devicetree, linux-kernel
When j7200 SOM is attached to the CPB we only have parent clock for 48KHz
family and the rate of the parent clock is 2359296000Hz.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
sound/soc/ti/j721e-evm.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c
index cb074af47a7d..f66674fd5f64 100644
--- a/sound/soc/ti/j721e-evm.c
+++ b/sound/soc/ti/j721e-evm.c
@@ -525,6 +525,14 @@ static const struct j721e_audio_match_data j721e_cpb_ivi_data = {
},
};
+static const struct j721e_audio_match_data j7200_cpb_data = {
+ .board_type = J721E_BOARD_CPB,
+ .num_links = 2, /* CPB pcm3168a */
+ .pll_rates = {
+ [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */
+ },
+};
+
static const struct of_device_id j721e_audio_of_match[] = {
{
.compatible = "ti,j721e-cpb-audio",
@@ -532,6 +540,9 @@ static const struct of_device_id j721e_audio_of_match[] = {
}, {
.compatible = "ti,j721e-cpb-ivi-audio",
.data = &j721e_cpb_ivi_data,
+ }, {
+ .compatible = "ti,j7200-cpb-audio",
+ .data = &j7200_cpb_data,
},
{ },
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-09-10 12:31 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2020-09-10 7:54 ` [PATCH 1/2] ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb Peter Ujfalusi
2020-09-10 7:54 ` [PATCH 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio Peter Ujfalusi
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2020-09-10 11:48 ` Peter Ujfalusi
2020-09-10 12:27 ` Peter Ujfalusi
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