Re: [PATCH 4/4] riscv: entry: consolidate general regs saving into save_gp

From: Guo Ren <guoren@kernel.org>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Albert Ou <aou@eecs.berkeley.edu>,
	Nathan Chancellor <nathan@kernel.org>,
	 Nick Desaulniers <ndesaulniers@google.com>,
	linux-riscv@lists.infradead.org,  linux-kernel@vger.kernel.org,
	llvm@lists.linux.dev
Subject: Re: [PATCH 4/4] riscv: entry: consolidate general regs saving into save_gp
Date: Mon, 26 Sep 2022 07:29:58 +0800	[thread overview]
Message-ID: <CAJF2gTT+NuLOfzOqm2bLy4-AK7z1M-nb17zgQKVqyz9uxAg8LQ@mail.gmail.com> (raw)
In-Reply-To: <20220925175356.681-5-jszhang@kernel.org>

Acked-by: Guo Ren <kernel.org>

For the save & restore pair, I also suggest adding restore_gp.

On Mon, Sep 26, 2022 at 2:03 AM Jisheng Zhang <jszhang@kernel.org> wrote:
>
> Consolidate the saving GPs(except sp and tp into save_gp macro.
> No functional change.
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>  arch/riscv/kernel/entry.S | 85 ++++++++++++++-------------------------
>  1 file changed, 31 insertions(+), 54 deletions(-)
>
> diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
> index 442d93beffcf..04e11d257ad6 100644
> --- a/arch/riscv/kernel/entry.S
> +++ b/arch/riscv/kernel/entry.S
> @@ -14,31 +14,8 @@
>  #include <asm/asm-offsets.h>
>  #include <asm/errata_list.h>
>
> -ENTRY(handle_exception)
> -       /*
> -        * If coming from userspace, preserve the user thread pointer and load
> -        * the kernel thread pointer.  If we came from the kernel, the scratch
> -        * register will contain 0, and we should continue on the current TP.
> -        */
> -       csrrw tp, CSR_SCRATCH, tp
> -       bnez tp, _save_context
> -
> -_restore_kernel_tpsp:
> -       csrr tp, CSR_SCRATCH
> -       REG_S sp, TASK_TI_KERNEL_SP(tp)
> -
> -#ifdef CONFIG_VMAP_STACK
> -       addi sp, sp, -(PT_SIZE_ON_STACK)
> -       srli sp, sp, THREAD_SHIFT
> -       andi sp, sp, 0x1
> -       bnez sp, handle_kernel_stack_overflow
> -       REG_L sp, TASK_TI_KERNEL_SP(tp)
> -#endif
> -
> -_save_context:
> -       REG_S sp, TASK_TI_USER_SP(tp)
> -       REG_L sp, TASK_TI_KERNEL_SP(tp)
> -       addi sp, sp, -(PT_SIZE_ON_STACK)
> +       /* save all GPs except sp and tp */
> +       .macro save_gp
>         REG_S x1,  PT_RA(sp)
>         REG_S x3,  PT_GP(sp)
>         REG_S x5,  PT_T0(sp)
> @@ -68,6 +45,34 @@ _save_context:
>         REG_S x29, PT_T4(sp)
>         REG_S x30, PT_T5(sp)
>         REG_S x31, PT_T6(sp)
> +       .endm
> +
> +ENTRY(handle_exception)
> +       /*
> +        * If coming from userspace, preserve the user thread pointer and load
> +        * the kernel thread pointer.  If we came from the kernel, the scratch
> +        * register will contain 0, and we should continue on the current TP.
> +        */
> +       csrrw tp, CSR_SCRATCH, tp
> +       bnez tp, _save_context
> +
> +_restore_kernel_tpsp:
> +       csrr tp, CSR_SCRATCH
> +       REG_S sp, TASK_TI_KERNEL_SP(tp)
> +
> +#ifdef CONFIG_VMAP_STACK
> +       addi sp, sp, -(PT_SIZE_ON_STACK)
> +       srli sp, sp, THREAD_SHIFT
> +       andi sp, sp, 0x1
> +       bnez sp, handle_kernel_stack_overflow
> +       REG_L sp, TASK_TI_KERNEL_SP(tp)
> +#endif
> +
> +_save_context:
> +       REG_S sp, TASK_TI_USER_SP(tp)
> +       REG_L sp, TASK_TI_KERNEL_SP(tp)
> +       addi sp, sp, -(PT_SIZE_ON_STACK)
> +       save_gp
>
>         /*
>          * Disable user-mode memory access as it should only be set in the
> @@ -234,35 +239,7 @@ ENTRY(handle_kernel_stack_overflow)
>         addi sp, sp, -(PT_SIZE_ON_STACK)
>
>         //save context to overflow stack
> -       REG_S x1,  PT_RA(sp)
> -       REG_S x3,  PT_GP(sp)
> -       REG_S x5,  PT_T0(sp)
> -       REG_S x6,  PT_T1(sp)
> -       REG_S x7,  PT_T2(sp)
> -       REG_S x8,  PT_S0(sp)
> -       REG_S x9,  PT_S1(sp)
> -       REG_S x10, PT_A0(sp)
> -       REG_S x11, PT_A1(sp)
> -       REG_S x12, PT_A2(sp)
> -       REG_S x13, PT_A3(sp)
> -       REG_S x14, PT_A4(sp)
> -       REG_S x15, PT_A5(sp)
> -       REG_S x16, PT_A6(sp)
> -       REG_S x17, PT_A7(sp)
> -       REG_S x18, PT_S2(sp)
> -       REG_S x19, PT_S3(sp)
> -       REG_S x20, PT_S4(sp)
> -       REG_S x21, PT_S5(sp)
> -       REG_S x22, PT_S6(sp)
> -       REG_S x23, PT_S7(sp)
> -       REG_S x24, PT_S8(sp)
> -       REG_S x25, PT_S9(sp)
> -       REG_S x26, PT_S10(sp)
> -       REG_S x27, PT_S11(sp)
> -       REG_S x28, PT_T3(sp)
> -       REG_S x29, PT_T4(sp)
> -       REG_S x30, PT_T5(sp)
> -       REG_S x31, PT_T6(sp)
> +       save_gp
>
>         REG_L s0, TASK_TI_KERNEL_SP(tp)
>         csrr s1, CSR_STATUS
> --
> 2.34.1
>

--
Best Regards
 Guo Ren