From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Loic Poulain <loic.poulain@linaro.org>
Cc: mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, quic_krichai@quicinc.com
Subject: Re: [PATCH] bus: mhi: host: pci_generic: Add support for IP_SW0 channels
Date: Wed, 31 May 2023 11:55:50 +0530 [thread overview]
Message-ID: <20230531062550.GA7968@thinkpad> (raw)
In-Reply-To: <CAMZdPi_QRi_n7=Do_P6E3Xwk=zQ3nS3jpiFBNApCvWd4v=LSCw@mail.gmail.com>
On Sun, May 21, 2023 at 08:27:45PM +0200, Loic Poulain wrote:
> On Fri, 19 May 2023 at 15:58, Manivannan Sadhasivam
> <manivannan.sadhasivam@linaro.org> wrote:
> >
> > IP_SW0 channels are used to transfer data over the networking interface
> > between MHI endpoint and the host. Define the channels in the MHI v1
> > channel config along with dedicated event rings.
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
>
> Assuming we can extend the number of event rings (and dedicated irqs)
> without hitting any hardware limitation on the device side?
>
Not all endpoints support IP_SW0 channels. Only a few devices that intend to
transfer non-IP data payload supports it and those should take care of the
requirements.
- Mani
> Reviewed-by: Loic Poulain <loic.poulain@linaro.org>
>
>
>
> > ---
> > drivers/bus/mhi/host/pci_generic.c | 26 ++++++++++++++++++++++----
> > 1 file changed, 22 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
> > index db0a0b062d8e..70e37c490150 100644
> > --- a/drivers/bus/mhi/host/pci_generic.c
> > +++ b/drivers/bus/mhi/host/pci_generic.c
> > @@ -212,6 +212,19 @@ struct mhi_pci_dev_info {
> > .offload_channel = false, \
> > }
> >
> > +#define MHI_EVENT_CONFIG_SW_DATA(ev_ring, el_count) \
> > + { \
> > + .num_elements = el_count, \
> > + .irq_moderation_ms = 0, \
> > + .irq = (ev_ring) + 1, \
> > + .priority = 1, \
> > + .mode = MHI_DB_BRST_DISABLE, \
> > + .data_type = MHI_ER_DATA, \
> > + .hardware_event = false, \
> > + .client_managed = false, \
> > + .offload_channel = false, \
> > + }
> > +
> > #define MHI_EVENT_CONFIG_HW_DATA(ev_ring, el_count, ch_num) \
> > { \
> > .num_elements = el_count, \
> > @@ -237,8 +250,10 @@ static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = {
> > MHI_CHANNEL_CONFIG_DL_AUTOQUEUE(21, "IPCR", 8, 0),
> > MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0),
> > MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0),
> > - MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 2),
> > - MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 3),
> > + MHI_CHANNEL_CONFIG_UL(46, "IP_SW0", 64, 2),
> > + MHI_CHANNEL_CONFIG_DL(47, "IP_SW0", 64, 3),
> > + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 4),
> > + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 5),
> > };
> >
> > static struct mhi_event_config modem_qcom_v1_mhi_events[] = {
> > @@ -246,9 +261,12 @@ static struct mhi_event_config modem_qcom_v1_mhi_events[] = {
> > MHI_EVENT_CONFIG_CTRL(0, 64),
> > /* DIAG dedicated event ring */
> > MHI_EVENT_CONFIG_DATA(1, 128),
> > + /* Software channels dedicated event ring */
> > + MHI_EVENT_CONFIG_SW_DATA(2, 64),
> > + MHI_EVENT_CONFIG_SW_DATA(3, 64),
> > /* Hardware channels request dedicated hardware event rings */
> > - MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100),
> > - MHI_EVENT_CONFIG_HW_DATA(3, 2048, 101)
> > + MHI_EVENT_CONFIG_HW_DATA(4, 1024, 100),
> > + MHI_EVENT_CONFIG_HW_DATA(5, 2048, 101)
> > };
> >
> > static const struct mhi_controller_config modem_qcom_v1_mhiv_config = {
> > --
> > 2.25.1
> >
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2023-05-31 6:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-19 13:58 [PATCH] bus: mhi: host: pci_generic: Add support for IP_SW0 channels Manivannan Sadhasivam
2023-05-21 18:27 ` Loic Poulain
2023-05-31 6:25 ` Manivannan Sadhasivam [this message]
2023-05-31 6:30 ` Manivannan Sadhasivam
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