[PATCH net-next 0/3] net: dsa: microchip: add KSZ9893 switch support

[PATCH net-next 0/3] net: dsa: microchip: add KSZ9893 switch support

[Tristram.Ha]

From: Tristram Ha <Tristram.Ha@microchip.com>

This series of patches is to modify the KSZ9477 DSA driver to support
running KSZ9893 and other switches in the KSZ9477 family.

The KSZ9893 switch is similar to KSZ9477 except the ingress tail tag has
1 byte instead of 2 bytes.  The XMII register that governs the MAC
communication also has different register definitions.

Tristram Ha (3):
  dt-bindings: net: dsa: document additional Microchip KSZ9477 family
    switches
  net: dsa: microchip: add KSZ9893 switch support
  net: dsa: microchip: add other KSZ9477 switch variants

 Documentation/devicetree/bindings/net/dsa/ksz.txt |  43 +++
 drivers/net/dsa/microchip/ksz9477.c               | 337 +++++++++++++++++++++-
 drivers/net/dsa/microchip/ksz9477_spi.c           |   7 +-
 drivers/net/dsa/microchip/ksz_common.c            |   8 +-
 include/net/dsa.h                                 |   1 +
 net/dsa/dsa.c                                     |   2 +
 net/dsa/dsa_priv.h                                |   1 +
 net/dsa/tag_ksz.c                                 |  34 +++
 8 files changed, 415 insertions(+), 18 deletions(-)

-- 
1.9.1

[PATCH net-next 1/3] dt-bindings: net: dsa: document additional Microchip KSZ9477 family switches

[Tristram.Ha]

From: Tristram Ha <Tristram.Ha@microchip.com>

Document additional Microchip KSZ9477 family switches.

Show how KSZ8565 switch should be configured as the host port is port 7
instead of port 5.

Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com>
---
 Documentation/devicetree/bindings/net/dsa/ksz.txt | 43 +++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/dsa/ksz.txt b/Documentation/devicetree/bindings/net/dsa/ksz.txt
index 8d58c2a..b5fec1f 100644
--- a/Documentation/devicetree/bindings/net/dsa/ksz.txt
+++ b/Documentation/devicetree/bindings/net/dsa/ksz.txt
@@ -7,6 +7,11 @@ Required properties:
   of the following:
   - "microchip,ksz9477"
   - "microchip,ksz9897"
+  - "microchip,ksz9896"
+  - "microchip,ksz9567"
+  - "microchip,ksz8565"
+  - "microchip,ksz9893"
+  - "microchip,ksz9563"
 
 Optional properties:
 
@@ -73,4 +78,42 @@ Ethernet switch connected via SPI to the host, CPU port wired to eth0:
 				};
 			};
 		};
+		ksz8565: ksz8565@0 {
+			compatible = "microchip,ksz8565";
+			reg = <0>;
+
+			spi-max-frequency = <44000000>;
+			spi-cpha;
+			spi-cpol;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+					label = "lan1";
+				};
+				port@1 {
+					reg = <1>;
+					label = "lan2";
+				};
+				port@2 {
+					reg = <2>;
+					label = "lan3";
+				};
+				port@3 {
+					reg = <3>;
+					label = "lan4";
+				};
+				port@4 {
+					reg = <6>;
+					label = "cpu";
+					ethernet = <&eth0>;
+					fixed-link {
+						speed = <1000>;
+						full-duplex;
+					};
+				};
+			};
+		};
 	};
-- 
1.9.1

[PATCH net-next 2/3] net: dsa: microchip: add KSZ9893 switch support

[Tristram.Ha]

From: Tristram Ha <Tristram.Ha@microchip.com>

Add KSZ9893 switch support in KSZ9477 driver.  This switch is similar to
KSZ9477 except the ingress tail tag has 1 byte instead of 2 bytes.  The
XMII register that governs how the host port communicates with the MAC
also has different register definitions.

Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com>
---
 drivers/net/dsa/microchip/ksz9477.c     | 244 ++++++++++++++++++++++++++++++--
 drivers/net/dsa/microchip/ksz9477_spi.c |   4 +-
 drivers/net/dsa/microchip/ksz_common.c  |   4 +-
 include/net/dsa.h                       |   1 +
 net/dsa/dsa.c                           |   2 +
 net/dsa/dsa_priv.h                      |   1 +
 net/dsa/tag_ksz.c                       |  34 +++++
 7 files changed, 274 insertions(+), 16 deletions(-)

diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
index 03de50e..3bb548a 100644
--- a/drivers/net/dsa/microchip/ksz9477.c
+++ b/drivers/net/dsa/microchip/ksz9477.c
@@ -18,6 +18,11 @@
 #include "ksz9477_reg.h"
 #include "ksz_common.h"
 
+/* Used with variable features to indicate capabilities. */
+#define GBIT_SUPPORT			BIT(0)
+#define NEW_XMII			BIT(1)
+#define IS_9893				BIT(2)
+
 static const struct {
 	int index;
 	char string[ETH_GSTRING_LEN];
@@ -328,7 +333,12 @@ static void ksz9477_port_init_cnt(struct ksz_device *dev, int port)
 static enum dsa_tag_protocol ksz9477_get_tag_protocol(struct dsa_switch *ds,
 						      int port)
 {
-	return DSA_TAG_PROTO_KSZ9477;
+	enum dsa_tag_protocol proto = DSA_TAG_PROTO_KSZ9477;
+	struct ksz_device *dev = ds->priv;
+
+	if (dev->features & IS_9893)
+		proto = DSA_TAG_PROTO_KSZ9893;
+	return proto;
 }
 
 static int ksz9477_phy_read16(struct dsa_switch *ds, int addr, int reg)
@@ -353,7 +363,7 @@ static int ksz9477_phy_read16(struct dsa_switch *ds, int addr, int reg)
 			val = 0x796d;
 			break;
 		case MII_PHYSID1:
-			val = 0x0022;
+			val = KSZ9477_ID_HI;
 			break;
 		case MII_PHYSID2:
 			val = 0x1631;
@@ -389,6 +399,10 @@ static int ksz9477_phy_write16(struct dsa_switch *ds, int addr, int reg,
 	/* No real PHY after this. */
 	if (addr >= dev->phy_port_cnt)
 		return 0;
+
+	/* No gigabit support.  Do not write to this register. */
+	if (!(dev->features & GBIT_SUPPORT) && reg == MII_CTRL1000)
+		return 0;
 	ksz_pwrite16(dev, addr, 0x100 + (reg << 1), val);
 
 	return 0;
@@ -998,11 +1012,156 @@ static void ksz9477_port_mirror_del(struct dsa_switch *ds, int port,
 static void ksz9477_phy_setup(struct ksz_device *dev, int port,
 			      struct phy_device *phy)
 {
-	if (port < dev->phy_port_cnt) {
-		/* The MAC actually cannot run in 1000 half-duplex mode. */
+	/* Only apply to port with PHY. */
+	if (port >= dev->phy_port_cnt)
+		return;
+
+	/* The MAC actually cannot run in 1000 half-duplex mode. */
+	phy_remove_link_mode(phy,
+			     ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
+
+	/* PHY does not support gigabit. */
+	if (!(dev->features & GBIT_SUPPORT))
 		phy_remove_link_mode(phy,
-				     ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
+				     ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
+}
+
+static bool ksz9477_get_gbit(struct ksz_device *dev, u8 data)
+{
+	bool gbit;
+
+	if (dev->features & NEW_XMII)
+		gbit = !(data & PORT_MII_NOT_1GBIT);
+	else
+		gbit = !!(data & PORT_MII_1000MBIT_S1);
+	return gbit;
+}
+
+static void ksz9477_set_gbit(struct ksz_device *dev, bool gbit, u8 *data)
+{
+	if (dev->features & NEW_XMII) {
+		if (gbit)
+			*data &= ~PORT_MII_NOT_1GBIT;
+		else
+			*data |= PORT_MII_NOT_1GBIT;
+	} else {
+		if (gbit)
+			*data |= PORT_MII_1000MBIT_S1;
+		else
+			*data &= ~PORT_MII_1000MBIT_S1;
+	}
+}
+
+static int ksz9477_get_xmii(struct ksz_device *dev, u8 data)
+{
+	int mode;
+
+	if (dev->features & NEW_XMII) {
+		switch (data & PORT_MII_SEL_M) {
+		case PORT_MII_SEL:
+			mode = 0;
+			break;
+		case PORT_RMII_SEL:
+			mode = 1;
+			break;
+		case PORT_GMII_SEL:
+			mode = 2;
+			break;
+		default:
+			mode = 3;
+		}
+	} else {
+		switch (data & PORT_MII_SEL_M) {
+		case PORT_MII_SEL_S1:
+			mode = 0;
+			break;
+		case PORT_RMII_SEL_S1:
+			mode = 1;
+			break;
+		case PORT_GMII_SEL_S1:
+			mode = 2;
+			break;
+		default:
+			mode = 3;
+		}
+	}
+	return mode;
+}
+
+static void ksz9477_set_xmii(struct ksz_device *dev, int mode, u8 *data)
+{
+	u8 xmii;
+
+	if (dev->features & NEW_XMII) {
+		switch (mode) {
+		case 0:
+			xmii = PORT_MII_SEL;
+			break;
+		case 1:
+			xmii = PORT_RMII_SEL;
+			break;
+		case 2:
+			xmii = PORT_GMII_SEL;
+			break;
+		default:
+			xmii = PORT_RGMII_SEL;
+			break;
+		}
+	} else {
+		switch (mode) {
+		case 0:
+			xmii = PORT_MII_SEL_S1;
+			break;
+		case 1:
+			xmii = PORT_RMII_SEL_S1;
+			break;
+		case 2:
+			xmii = PORT_GMII_SEL_S1;
+			break;
+		default:
+			xmii = PORT_RGMII_SEL_S1;
+			break;
+		}
+	}
+	*data &= ~PORT_MII_SEL_M;
+	*data |= xmii;
+}
+
+static phy_interface_t ksz9477_get_interface(struct ksz_device *dev, int port)
+{
+	phy_interface_t interface;
+	bool gbit;
+	int mode;
+	u8 data8;
+
+	if (port < dev->phy_port_cnt)
+		return PHY_INTERFACE_MODE_NA;
+	ksz_pread8(dev, port, REG_PORT_XMII_CTRL_1, &data8);
+	gbit = ksz9477_get_gbit(dev, data8);
+	mode = ksz9477_get_xmii(dev, data8);
+	switch (mode) {
+	case 2:
+		interface = PHY_INTERFACE_MODE_GMII;
+		if (gbit)
+			break;
+	case 0:
+		interface = PHY_INTERFACE_MODE_MII;
+		break;
+	case 1:
+		interface = PHY_INTERFACE_MODE_RMII;
+		break;
+	default:
+		interface = PHY_INTERFACE_MODE_RGMII;
+		if (data8 & PORT_RGMII_ID_EG_ENABLE)
+			interface = PHY_INTERFACE_MODE_RGMII_TXID;
+		if (data8 & PORT_RGMII_ID_IG_ENABLE) {
+			interface = PHY_INTERFACE_MODE_RGMII_RXID;
+			if (data8 & PORT_RGMII_ID_EG_ENABLE)
+				interface = PHY_INTERFACE_MODE_RGMII_ID;
+		}
+		break;
 	}
+	return interface;
 }
 
 static void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)
@@ -1051,24 +1210,25 @@ static void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)
 
 		/* configure MAC to 1G & RGMII mode */
 		ksz_pread8(dev, port, REG_PORT_XMII_CTRL_1, &data8);
-		data8 &= ~PORT_MII_NOT_1GBIT;
-		data8 &= ~PORT_MII_SEL_M;
 		switch (dev->interface) {
 		case PHY_INTERFACE_MODE_MII:
-			data8 |= PORT_MII_NOT_1GBIT;
-			data8 |= PORT_MII_SEL;
+			ksz9477_set_xmii(dev, 0, &data8);
+			ksz9477_set_gbit(dev, false, &data8);
 			p->phydev.speed = SPEED_100;
 			break;
 		case PHY_INTERFACE_MODE_RMII:
-			data8 |= PORT_MII_NOT_1GBIT;
-			data8 |= PORT_RMII_SEL;
+			ksz9477_set_xmii(dev, 1, &data8);
+			ksz9477_set_gbit(dev, false, &data8);
 			p->phydev.speed = SPEED_100;
 			break;
 		case PHY_INTERFACE_MODE_GMII:
-			data8 |= PORT_GMII_SEL;
+			ksz9477_set_xmii(dev, 2, &data8);
+			ksz9477_set_gbit(dev, true, &data8);
 			p->phydev.speed = SPEED_1000;
 			break;
 		default:
+			ksz9477_set_xmii(dev, 3, &data8);
+			ksz9477_set_gbit(dev, true, &data8);
 			data8 &= ~PORT_RGMII_ID_IG_ENABLE;
 			data8 &= ~PORT_RGMII_ID_EG_ENABLE;
 			if (dev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
@@ -1077,7 +1237,6 @@ static void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)
 			if (dev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
 			    dev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
 				data8 |= PORT_RGMII_ID_EG_ENABLE;
-			data8 |= PORT_RGMII_SEL;
 			p->phydev.speed = SPEED_1000;
 			break;
 		}
@@ -1115,10 +1274,25 @@ static void ksz9477_config_cpu_port(struct dsa_switch *ds)
 
 	for (i = 0; i < dev->port_cnt; i++) {
 		if (dsa_is_cpu_port(ds, i) && (dev->cpu_ports & (1 << i))) {
+			phy_interface_t interface;
+
 			dev->cpu_port = i;
 			dev->host_mask = (1 << dev->cpu_port);
 			dev->port_mask |= dev->host_mask;
 
+			/* Read from XMII register to determine host port
+			 * interface.  If set specifically in device tree
+			 * note the difference to help debugging.
+			 */
+			interface = ksz9477_get_interface(dev, i);
+			if (!dev->interface)
+				dev->interface = interface;
+			if (interface && interface != dev->interface)
+				dev_info(dev->dev,
+					 "use %s instead of %s\n",
+					  phy_modes(dev->interface),
+					  phy_modes(interface));
+
 			/* enable cpu port */
 			ksz9477_port_setup(dev, i, true);
 			p = &dev->ports[dev->cpu_port];
@@ -1172,6 +1346,9 @@ static int ksz9477_setup(struct dsa_switch *ds)
 	ksz9477_cfg32(dev, REG_SW_QM_CTRL__4, UNICAST_VLAN_BOUNDARY,
 		      true);
 
+	/* Do not work correctly with tail tagging. */
+	ksz_cfg(dev, REG_SW_MAC_CTRL_0, SW_CHECK_LENGTH, false);
+
 	/* accept packet up to 2000bytes */
 	ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_LEGAL_PACKET_DISABLE, true);
 
@@ -1230,6 +1407,8 @@ static u32 ksz9477_get_port_addr(int port, int offset)
 static int ksz9477_switch_detect(struct ksz_device *dev)
 {
 	u8 data8;
+	u8 id_hi;
+	u8 id_lo;
 	u32 id32;
 	int ret;
 
@@ -1247,11 +1426,40 @@ static int ksz9477_switch_detect(struct ksz_device *dev)
 	ret = ksz_read32(dev, REG_CHIP_ID0__1, &id32);
 	if (ret)
 		return ret;
+	ret = ksz_read8(dev, REG_GLOBAL_OPTIONS, &data8);
+	if (ret)
+		return ret;
 
 	/* Number of ports can be reduced depending on chip. */
 	dev->mib_port_cnt = TOTAL_PORT_NUM;
 	dev->phy_port_cnt = 5;
 
+	/* Default capability is gigabit capable. */
+	dev->features = GBIT_SUPPORT;
+
+	id_hi = (u8)(id32 >> 16);
+	id_lo = (u8)(id32 >> 8);
+	if ((id_lo & 0xf) == 3) {
+		/* Chip is from KSZ9893 design. */
+		dev->features |= IS_9893;
+
+		/* Chip does not support gigabit. */
+		if (data8 & SW_QW_ABLE)
+			dev->features &= ~GBIT_SUPPORT;
+		dev->mib_port_cnt = 3;
+		dev->phy_port_cnt = 2;
+	} else {
+		/* Chip uses new XMII register definitions. */
+		dev->features |= NEW_XMII;
+
+		/* Chip does not support gigabit. */
+		if (!(data8 & SW_GIGABIT_ABLE))
+			dev->features &= ~GBIT_SUPPORT;
+	}
+
+	/* Change chip id to known ones so it can be matched against them. */
+	id32 = (id_hi << 16) | (id_lo << 8);
+
 	dev->chip_id = id32;
 
 	return 0;
@@ -1286,6 +1494,15 @@ struct ksz_chip_data {
 		.cpu_ports = 0x7F,	/* can be configured as cpu port */
 		.port_cnt = 7,		/* total physical port count */
 	},
+	{
+		.chip_id = 0x00989300,
+		.dev_name = "KSZ9893",
+		.num_vlans = 4096,
+		.num_alus = 4096,
+		.num_statics = 16,
+		.cpu_ports = 0x07,	/* can be configured as cpu port */
+		.port_cnt = 3,		/* total port count */
+	},
 };
 
 static int ksz9477_switch_init(struct ksz_device *dev)
@@ -1333,7 +1550,6 @@ static int ksz9477_switch_init(struct ksz_device *dev)
 		if (!dev->ports[i].mib.counters)
 			return -ENOMEM;
 	}
-	dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
 
 	return 0;
 }
diff --git a/drivers/net/dsa/microchip/ksz9477_spi.c b/drivers/net/dsa/microchip/ksz9477_spi.c
index d757ba1..7517862 100644
--- a/drivers/net/dsa/microchip/ksz9477_spi.c
+++ b/drivers/net/dsa/microchip/ksz9477_spi.c
@@ -2,7 +2,7 @@
 /*
  * Microchip KSZ9477 series register access through SPI
  *
- * Copyright (C) 2017-2018 Microchip Technology Inc.
+ * Copyright (C) 2017-2019 Microchip Technology Inc.
  */
 
 #include <asm/unaligned.h>
@@ -155,6 +155,8 @@ static void ksz9477_spi_shutdown(struct spi_device *spi)
 static const struct of_device_id ksz9477_dt_ids[] = {
 	{ .compatible = "microchip,ksz9477" },
 	{ .compatible = "microchip,ksz9897" },
+	{ .compatible = "microchip,ksz9893" },
+	{ .compatible = "microchip,ksz9563" },
 	{},
 };
 MODULE_DEVICE_TABLE(of, ksz9477_dt_ids);
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
index 9328b88..39dace8 100644
--- a/drivers/net/dsa/microchip/ksz_common.c
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -453,7 +453,9 @@ int ksz_switch_register(struct ksz_device *dev,
 	if (ret)
 		return ret;
 
-	dev->interface = PHY_INTERFACE_MODE_MII;
+	/* Host port interface will be self detected, or specifically set in
+	 * device tree.
+	 */
 	if (dev->dev->of_node) {
 		ret = of_get_phy_mode(dev->dev->of_node);
 		if (ret >= 0)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index e8ac5b3..ae480bb 100644
--- a/include/net/dsa.h
+++ b/include/net/dsa.h
@@ -38,6 +38,7 @@ enum dsa_tag_protocol {
 	DSA_TAG_PROTO_EDSA,
 	DSA_TAG_PROTO_GSWIP,
 	DSA_TAG_PROTO_KSZ9477,
+	DSA_TAG_PROTO_KSZ9893,
 	DSA_TAG_PROTO_LAN9303,
 	DSA_TAG_PROTO_MTK,
 	DSA_TAG_PROTO_QCA,
diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c
index aee909b..36de4f2 100644
--- a/net/dsa/dsa.c
+++ b/net/dsa/dsa.c
@@ -57,6 +57,7 @@ static struct sk_buff *dsa_slave_notag_xmit(struct sk_buff *skb,
 #endif
 #ifdef CONFIG_NET_DSA_TAG_KSZ9477
 	[DSA_TAG_PROTO_KSZ9477] = &ksz9477_netdev_ops,
+	[DSA_TAG_PROTO_KSZ9893] = &ksz9893_netdev_ops,
 #endif
 #ifdef CONFIG_NET_DSA_TAG_LAN9303
 	[DSA_TAG_PROTO_LAN9303] = &lan9303_netdev_ops,
@@ -93,6 +94,7 @@ const char *dsa_tag_protocol_to_str(const struct dsa_device_ops *ops)
 #endif
 #ifdef CONFIG_NET_DSA_TAG_KSZ9477
 		[DSA_TAG_PROTO_KSZ9477] = "ksz9477",
+		[DSA_TAG_PROTO_KSZ9893] = "ksz9893",
 #endif
 #ifdef CONFIG_NET_DSA_TAG_LAN9303
 		[DSA_TAG_PROTO_LAN9303] = "lan9303",
diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h
index c6caa58..093b7d1 100644
--- a/net/dsa/dsa_priv.h
+++ b/net/dsa/dsa_priv.h
@@ -216,6 +216,7 @@ static inline struct dsa_port *dsa_slave_to_port(const struct net_device *dev)
 
 /* tag_ksz.c */
 extern const struct dsa_device_ops ksz9477_netdev_ops;
+extern const struct dsa_device_ops ksz9893_netdev_ops;
 
 /* tag_lan9303.c */
 extern const struct dsa_device_ops lan9303_netdev_ops;
diff --git a/net/dsa/tag_ksz.c b/net/dsa/tag_ksz.c
index 927e9c8..de246c9 100644
--- a/net/dsa/tag_ksz.c
+++ b/net/dsa/tag_ksz.c
@@ -16,6 +16,7 @@
 
 /* Typically only one byte is used for tail tag. */
 #define KSZ_EGRESS_TAG_LEN		1
+#define KSZ_INGRESS_TAG_LEN		1
 
 static struct sk_buff *ksz_common_xmit(struct sk_buff *skb,
 				       struct net_device *dev, int len)
@@ -141,3 +142,36 @@ static struct sk_buff *ksz9477_rcv(struct sk_buff *skb, struct net_device *dev,
 	.rcv	= ksz9477_rcv,
 	.overhead = KSZ9477_INGRESS_TAG_LEN,
 };
+
+#define KSZ9893_TAIL_TAG_OVERRIDE	BIT(5)
+#define KSZ9893_TAIL_TAG_LOOKUP		BIT(6)
+
+static struct sk_buff *ksz9893_xmit(struct sk_buff *skb,
+				    struct net_device *dev)
+{
+	struct dsa_port *dp = dsa_slave_to_port(dev);
+	struct sk_buff *nskb;
+	u8 *addr;
+	u8 *tag;
+
+	nskb = ksz_common_xmit(skb, dev, KSZ_INGRESS_TAG_LEN);
+	if (!nskb)
+		return NULL;
+
+	/* Tag encoding */
+	tag = skb_put(nskb, KSZ_INGRESS_TAG_LEN);
+	addr = skb_mac_header(nskb);
+
+	*tag = BIT(dp->index);
+
+	if (is_link_local_ether_addr(addr))
+		*tag |= KSZ9893_TAIL_TAG_OVERRIDE;
+
+	return nskb;
+}
+
+const struct dsa_device_ops ksz9893_netdev_ops = {
+	.xmit	= ksz9893_xmit,
+	.rcv	= ksz9477_rcv,
+	.overhead = KSZ_INGRESS_TAG_LEN,
+};
-- 
1.9.1

[PATCH net-next 3/3] net: dsa: microchip: add other KSZ9477 switch variants

[Tristram.Ha]

From: Tristram Ha <Tristram.Ha@microchip.com>

Add other switches in KSZ9477 family.

KSZ9896 is a switch with 6 ports; the last one is typically used to
connect to MAC.
KSZ9567 is same as KSZ9897 but with 1588 PTP capability.
KSZ8567 is same as KSZ9567 but without gigabit capability.
KSZ9563 is same as KSZ9893 but with 1588 PTP capability.
KSZ8563 is same as KSZ9563 but without gigabit capability.
KSZ8565 is a switch with 5 ports; however, port 7 has to be used to
connect to MAC.  This chip can only be set through device tree.

Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com>
---
 drivers/net/dsa/microchip/ksz9477.c     | 93 ++++++++++++++++++++++++++++++++-
 drivers/net/dsa/microchip/ksz9477_spi.c |  3 ++
 drivers/net/dsa/microchip/ksz_common.c  |  4 ++
 3 files changed, 98 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
index 3bb548a..81e7c2f 100644
--- a/drivers/net/dsa/microchip/ksz9477.c
+++ b/drivers/net/dsa/microchip/ksz9477.c
@@ -1264,6 +1264,32 @@ static void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)
 		ksz_pread16(dev, port, REG_PORT_PHY_INT_ENABLE, &data16);
 }
 
+#define KSZ_CHIP_NAME_SIZE		18
+
+static char *ksz9477_chip_names[KSZ_CHIP_NAME_SIZE] = {
+	"Microchip KSZ9477",
+	"Microchip KSZ9897",
+	"Microchip KSZ9896",
+	"Microchip KSZ9567",
+	"Microchip KSZ8567",
+	"Microchip KSZ8565",
+	"Microchip KSZ9893",
+	"Microchip KSZ9563",
+	"Microchip KSZ8563",
+};
+
+enum {
+	KSZ9477_SW_CHIP,
+	KSZ9897_SW_CHIP,
+	KSZ9896_SW_CHIP,
+	KSZ9567_SW_CHIP,
+	KSZ8567_SW_CHIP,
+	KSZ8565_SW_CHIP,
+	KSZ9893_SW_CHIP,
+	KSZ9563_SW_CHIP,
+	KSZ8563_SW_CHIP,
+};
+
 static void ksz9477_config_cpu_port(struct dsa_switch *ds)
 {
 	struct ksz_device *dev = ds->priv;
@@ -1314,7 +1340,8 @@ static void ksz9477_config_cpu_port(struct dsa_switch *ds)
 		p->vid_member = (1 << i);
 		p->member = dev->port_mask;
 		ksz9477_port_stp_state_set(ds, i, BR_STATE_DISABLED);
-		p->on = 1;
+		if (!dsa_is_unused_port(ds, i))
+			p->on = 1;
 		if (i < dev->phy_port_cnt)
 			p->phy = 1;
 		if (dev->chip_id == 0x00947700 && i == 6) {
@@ -1406,6 +1433,7 @@ static u32 ksz9477_get_port_addr(int port, int offset)
 
 static int ksz9477_switch_detect(struct ksz_device *dev)
 {
+	int chip = -1;
 	u8 data8;
 	u8 id_hi;
 	u8 id_lo;
@@ -1448,6 +1476,12 @@ static int ksz9477_switch_detect(struct ksz_device *dev)
 			dev->features &= ~GBIT_SUPPORT;
 		dev->mib_port_cnt = 3;
 		dev->phy_port_cnt = 2;
+		if (!(data8 & SW_AVB_ABLE))
+			chip = KSZ9893_SW_CHIP;
+		else if (data8 & SW_QW_ABLE)
+			chip = KSZ8563_SW_CHIP;
+		else
+			chip = KSZ9563_SW_CHIP;
 	} else {
 		/* Chip uses new XMII register definitions. */
 		dev->features |= NEW_XMII;
@@ -1455,6 +1489,37 @@ static int ksz9477_switch_detect(struct ksz_device *dev)
 		/* Chip does not support gigabit. */
 		if (!(data8 & SW_GIGABIT_ABLE))
 			dev->features &= ~GBIT_SUPPORT;
+		if ((id_lo & 0xf) == 6)
+			dev->mib_port_cnt = 6;
+		if (id_hi == FAMILY_ID_94)
+			chip = KSZ9477_SW_CHIP;
+		else if (id_hi == FAMILY_ID_98 && id_lo == CHIP_ID_97)
+			chip = KSZ9897_SW_CHIP;
+		else if (id_hi == FAMILY_ID_98 && id_lo == CHIP_ID_96)
+			chip = KSZ9896_SW_CHIP;
+		else if (id_hi == FAMILY_ID_95 && id_lo == CHIP_ID_67)
+			chip = KSZ9567_SW_CHIP;
+		else if (id_hi == FAMILY_ID_85 && id_lo == CHIP_ID_67)
+			chip = KSZ8567_SW_CHIP;
+		if (id_lo == CHIP_ID_67) {
+			id_hi = FAMILY_ID_98;
+			id_lo = CHIP_ID_97;
+		} else if (id_lo == CHIP_ID_66) {
+			id_hi = FAMILY_ID_98;
+			id_lo = CHIP_ID_96;
+		}
+	}
+	if (dev->dev->of_node) {
+		char name[80];
+
+		/* KSZ8565 chip can only be set through device tree. */
+		if (!of_modalias_node(dev->dev->of_node, name, sizeof(name))) {
+			if (!strcmp(name, "ksz8565")) {
+				chip = KSZ8565_SW_CHIP;
+				id_hi = FAMILY_ID_98;
+				id_lo = 0x95;
+			}
+		}
 	}
 
 	/* Change chip id to known ones so it can be matched against them. */
@@ -1462,6 +1527,10 @@ static int ksz9477_switch_detect(struct ksz_device *dev)
 
 	dev->chip_id = id32;
 
+	/* Update switch device name to matched chip. */
+	if (chip >= 0)
+		dev->name = ksz9477_chip_names[chip];
+
 	return 0;
 }
 
@@ -1495,6 +1564,15 @@ struct ksz_chip_data {
 		.port_cnt = 7,		/* total physical port count */
 	},
 	{
+		.chip_id = 0x00989600,
+		.dev_name = "KSZ9896",
+		.num_vlans = 4096,
+		.num_alus = 4096,
+		.num_statics = 16,
+		.cpu_ports = 0x3F,	/* can be configured as cpu port */
+		.port_cnt = 6,		/* total port count */
+	},
+	{
 		.chip_id = 0x00989300,
 		.dev_name = "KSZ9893",
 		.num_vlans = 4096,
@@ -1503,6 +1581,15 @@ struct ksz_chip_data {
 		.cpu_ports = 0x07,	/* can be configured as cpu port */
 		.port_cnt = 3,		/* total port count */
 	},
+	{
+		.chip_id = 0x00989500,
+		.dev_name = "KSZ8565",
+		.num_vlans = 4096,
+		.num_alus = 4096,
+		.num_statics = 16,
+		.cpu_ports = 0x4F,	/* can be configured as cpu port */
+		.port_cnt = 7,		/* total port count */
+	},
 };
 
 static int ksz9477_switch_init(struct ksz_device *dev)
@@ -1515,7 +1602,8 @@ static int ksz9477_switch_init(struct ksz_device *dev)
 		const struct ksz_chip_data *chip = &ksz9477_switch_chips[i];
 
 		if (dev->chip_id == chip->chip_id) {
-			dev->name = chip->dev_name;
+			if (!dev->name)
+				dev->name = chip->dev_name;
 			dev->num_vlans = chip->num_vlans;
 			dev->num_alus = chip->num_alus;
 			dev->num_statics = chip->num_statics;
@@ -1531,6 +1619,7 @@ static int ksz9477_switch_init(struct ksz_device *dev)
 		return -ENODEV;
 
 	dev->port_mask = (1 << dev->port_cnt) - 1;
+	dev->port_mask &= dev->cpu_ports;
 
 	dev->reg_mib_cnt = SWITCH_COUNTER_NUM;
 	dev->mib_cnt = TOTAL_SWITCH_COUNTER_NUM;
diff --git a/drivers/net/dsa/microchip/ksz9477_spi.c b/drivers/net/dsa/microchip/ksz9477_spi.c
index 7517862..878dd64 100644
--- a/drivers/net/dsa/microchip/ksz9477_spi.c
+++ b/drivers/net/dsa/microchip/ksz9477_spi.c
@@ -155,6 +155,9 @@ static void ksz9477_spi_shutdown(struct spi_device *spi)
 static const struct of_device_id ksz9477_dt_ids[] = {
 	{ .compatible = "microchip,ksz9477" },
 	{ .compatible = "microchip,ksz9897" },
+	{ .compatible = "microchip,ksz9896" },
+	{ .compatible = "microchip,ksz9567" },
+	{ .compatible = "microchip,ksz8565" },
 	{ .compatible = "microchip,ksz9893" },
 	{ .compatible = "microchip,ksz9563" },
 	{},
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
index 39dace8..826e046 100644
--- a/drivers/net/dsa/microchip/ksz_common.c
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -84,6 +84,10 @@ static void ksz_mib_read_work(struct work_struct *work)
 
 	for (i = 0; i < dev->mib_port_cnt; i++) {
 		p = &dev->ports[i];
+
+		/* Port is not being used. */
+		if (!p->on)
+			continue;
 		mib = &p->mib;
 		mutex_lock(&mib->cnt_mutex);
 
-- 
1.9.1

Re: [PATCH net-next 3/3] net: dsa: microchip: add other KSZ9477 switch variants

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 4368 bytes --]

Hi Tristram,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on net-next/master]

url:    https://github.com/0day-ci/linux/commits/Tristram-Ha-microchip-com/net-dsa-microchip-add-KSZ9893-switch-support/20190227-141333
config: i386-randconfig-x009-201908 (attached as .config)
compiler: gcc-8 (Debian 8.2.0-20) 8.2.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/net/dsa/microchip/ksz9477.c: In function 'ksz9477_switch_detect':
>> drivers/net/dsa/microchip/ksz9477.c:1516:8: error: implicit declaration of function 'of_modalias_node'; did you mean 'of_match_node'? [-Werror=implicit-function-declaration]
      if (!of_modalias_node(dev->dev->of_node, name, sizeof(name))) {
           ^~~~~~~~~~~~~~~~
           of_match_node
   cc1: some warnings being treated as errors

vim +1516 drivers/net/dsa/microchip/ksz9477.c

  1433	
  1434	static int ksz9477_switch_detect(struct ksz_device *dev)
  1435	{
  1436		int chip = -1;
  1437		u8 data8;
  1438		u8 id_hi;
  1439		u8 id_lo;
  1440		u32 id32;
  1441		int ret;
  1442	
  1443		/* turn off SPI DO Edge select */
  1444		ret = ksz_read8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, &data8);
  1445		if (ret)
  1446			return ret;
  1447	
  1448		data8 &= ~SPI_AUTO_EDGE_DETECTION;
  1449		ret = ksz_write8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, data8);
  1450		if (ret)
  1451			return ret;
  1452	
  1453		/* read chip id */
  1454		ret = ksz_read32(dev, REG_CHIP_ID0__1, &id32);
  1455		if (ret)
  1456			return ret;
  1457		ret = ksz_read8(dev, REG_GLOBAL_OPTIONS, &data8);
  1458		if (ret)
  1459			return ret;
  1460	
  1461		/* Number of ports can be reduced depending on chip. */
  1462		dev->mib_port_cnt = TOTAL_PORT_NUM;
  1463		dev->phy_port_cnt = 5;
  1464	
  1465		/* Default capability is gigabit capable. */
  1466		dev->features = GBIT_SUPPORT;
  1467	
  1468		id_hi = (u8)(id32 >> 16);
  1469		id_lo = (u8)(id32 >> 8);
  1470		if ((id_lo & 0xf) == 3) {
  1471			/* Chip is from KSZ9893 design. */
  1472			dev->features |= IS_9893;
  1473	
  1474			/* Chip does not support gigabit. */
  1475			if (data8 & SW_QW_ABLE)
  1476				dev->features &= ~GBIT_SUPPORT;
  1477			dev->mib_port_cnt = 3;
  1478			dev->phy_port_cnt = 2;
  1479			if (!(data8 & SW_AVB_ABLE))
  1480				chip = KSZ9893_SW_CHIP;
  1481			else if (data8 & SW_QW_ABLE)
  1482				chip = KSZ8563_SW_CHIP;
  1483			else
  1484				chip = KSZ9563_SW_CHIP;
  1485		} else {
  1486			/* Chip uses new XMII register definitions. */
  1487			dev->features |= NEW_XMII;
  1488	
  1489			/* Chip does not support gigabit. */
  1490			if (!(data8 & SW_GIGABIT_ABLE))
  1491				dev->features &= ~GBIT_SUPPORT;
  1492			if ((id_lo & 0xf) == 6)
  1493				dev->mib_port_cnt = 6;
  1494			if (id_hi == FAMILY_ID_94)
  1495				chip = KSZ9477_SW_CHIP;
  1496			else if (id_hi == FAMILY_ID_98 && id_lo == CHIP_ID_97)
  1497				chip = KSZ9897_SW_CHIP;
  1498			else if (id_hi == FAMILY_ID_98 && id_lo == CHIP_ID_96)
  1499				chip = KSZ9896_SW_CHIP;
  1500			else if (id_hi == FAMILY_ID_95 && id_lo == CHIP_ID_67)
  1501				chip = KSZ9567_SW_CHIP;
  1502			else if (id_hi == FAMILY_ID_85 && id_lo == CHIP_ID_67)
  1503				chip = KSZ8567_SW_CHIP;
  1504			if (id_lo == CHIP_ID_67) {
  1505				id_hi = FAMILY_ID_98;
  1506				id_lo = CHIP_ID_97;
  1507			} else if (id_lo == CHIP_ID_66) {
  1508				id_hi = FAMILY_ID_98;
  1509				id_lo = CHIP_ID_96;
  1510			}
  1511		}
  1512		if (dev->dev->of_node) {
  1513			char name[80];
  1514	
  1515			/* KSZ8565 chip can only be set through device tree. */
> 1516			if (!of_modalias_node(dev->dev->of_node, name, sizeof(name))) {
  1517				if (!strcmp(name, "ksz8565")) {
  1518					chip = KSZ8565_SW_CHIP;
  1519					id_hi = FAMILY_ID_98;
  1520					id_lo = 0x95;
  1521				}
  1522			}
  1523		}
  1524	
  1525		/* Change chip id to known ones so it can be matched against them. */
  1526		id32 = (id_hi << 16) | (id_lo << 8);
  1527	
  1528		dev->chip_id = id32;
  1529	
  1530		/* Update switch device name to matched chip. */
  1531		if (chip >= 0)
  1532			dev->name = ksz9477_chip_names[chip];
  1533	
  1534		return 0;
  1535	}
  1536	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 31591 bytes --]

Re: [PATCH net-next 1/3] dt-bindings: net: dsa: document additional Microchip KSZ9477 family switches

[Andrew Lunn]

On Tue, Feb 26, 2019 at 03:37:43PM -0800, Tristram.Ha@microchip.com wrote:
> +				port@3 {
> +					reg = <3>;
> +					label = "lan4";
> +				};
> +				port@4 {
> +					reg = <6>;

Hi Tristram

The number after the @ must be the same as the register. So this needs
to be port@6.

   Andrew

> +					label = "cpu";
> +					ethernet = <&eth0>;
> +					fixed-link {
> +						speed = <1000>;
> +						full-duplex;
> +					};
> +				};
> +			};
> +		};
>  	};
> -- 
> 1.9.1
> 

Re: [PATCH net-next 2/3] net: dsa: microchip: add KSZ9893 switch support

[Andrew Lunn]

>  static int ksz9477_phy_read16(struct dsa_switch *ds, int addr, int reg)
> @@ -353,7 +363,7 @@ static int ksz9477_phy_read16(struct dsa_switch *ds, int addr, int reg)
>  			val = 0x796d;
>  			break;
>  		case MII_PHYSID1:
> -			val = 0x0022;
> +			val = KSZ9477_ID_HI;
>  			break;
>  		case MII_PHYSID2:
>  			val = 0x1631;

Hi Tristram

This seems like an unrelated change, so should be in a separate
patch. And if you change PHYID1, it would also make sense to change
PHYID2 to a #define.


Please split the tagging changes into a patch of there own.

       Andrew

Re: [PATCH net-next 3/3] net: dsa: microchip: add other KSZ9477 switch variants

[Andrew Lunn]

> +	if (dev->dev->of_node) {
> +		char name[80];
> +
> +		/* KSZ8565 chip can only be set through device tree. */
> +		if (!of_modalias_node(dev->dev->of_node, name, sizeof(name))) {
> +			if (!strcmp(name, "ksz8565")) {
> +				chip = KSZ8565_SW_CHIP;
> +				id_hi = FAMILY_ID_98;
> +				id_lo = 0x95;
> +			}
> +		}

of_device_is_compatible() seems like a better call use use.

	  Andrew

Re: [PATCH net-next 3/3] net: dsa: microchip: add other KSZ9477 switch variants

[Andrew Lunn]

On Tue, Feb 26, 2019 at 03:37:45PM -0800, Tristram.Ha@microchip.com wrote:
> From: Tristram Ha <Tristram.Ha@microchip.com>
> 
> Add other switches in KSZ9477 family.
> 
> KSZ9896 is a switch with 6 ports; the last one is typically used to
> connect to MAC.
> KSZ9567 is same as KSZ9897 but with 1588 PTP capability.
> KSZ8567 is same as KSZ9567 but without gigabit capability.
> KSZ9563 is same as KSZ9893 but with 1588 PTP capability.
> KSZ8563 is same as KSZ9563 but without gigabit capability.
> KSZ8565 is a switch with 5 ports; however, port 7 has to be used to
> connect to MAC.  This chip can only be set through device tree.
> 
> Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com>
> ---
>  drivers/net/dsa/microchip/ksz9477.c     | 93 ++++++++++++++++++++++++++++++++-
>  drivers/net/dsa/microchip/ksz9477_spi.c |  3 ++
>  drivers/net/dsa/microchip/ksz_common.c  |  4 ++
>  3 files changed, 98 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
> index 3bb548a..81e7c2f 100644
> --- a/drivers/net/dsa/microchip/ksz9477.c
> +++ b/drivers/net/dsa/microchip/ksz9477.c
> @@ -1264,6 +1264,32 @@ static void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)
>  		ksz_pread16(dev, port, REG_PORT_PHY_INT_ENABLE, &data16);
>  }
>  
> +#define KSZ_CHIP_NAME_SIZE		18
> +
> +static char *ksz9477_chip_names[KSZ_CHIP_NAME_SIZE] = {
> +	"Microchip KSZ9477",

This looks wrong. You are defining an array of 18 elements, not an
array of pointers to 18 byte chars.


> +	"Microchip KSZ9897",
> +	"Microchip KSZ9896",
> +	"Microchip KSZ9567",
> +	"Microchip KSZ8567",
> +	"Microchip KSZ8565",
> +	"Microchip KSZ9893",
> +	"Microchip KSZ9563",
> +	"Microchip KSZ8563",
> +};
> +
> +enum {
> +	KSZ9477_SW_CHIP,
> +	KSZ9897_SW_CHIP,
> +	KSZ9896_SW_CHIP,
> +	KSZ9567_SW_CHIP,
> +	KSZ8567_SW_CHIP,
> +	KSZ8565_SW_CHIP,
> +	KSZ9893_SW_CHIP,
> +	KSZ9563_SW_CHIP,
> +	KSZ8563_SW_CHIP,
> +};

There should be a one-to-one mapping between this enum and the array
above. You can make this clear using Designated Initializers.

> +
>  static void ksz9477_config_cpu_port(struct dsa_switch *ds)
>  {
>  	struct ksz_device *dev = ds->priv;
> @@ -1314,7 +1340,8 @@ static void ksz9477_config_cpu_port(struct dsa_switch *ds)
>  		p->vid_member = (1 << i);
>  		p->member = dev->port_mask;
>  		ksz9477_port_stp_state_set(ds, i, BR_STATE_DISABLED);
> -		p->on = 1;
> +		if (!dsa_is_unused_port(ds, i))
> +			p->on = 1;
>  		if (i < dev->phy_port_cnt)
>  			p->phy = 1;
>  		if (dev->chip_id == 0x00947700 && i == 6) {
> @@ -1406,6 +1433,7 @@ static u32 ksz9477_get_port_addr(int port, int offset)
>  
>  static int ksz9477_switch_detect(struct ksz_device *dev)
>  {
> +	int chip = -1;
>  	u8 data8;
>  	u8 id_hi;
>  	u8 id_lo;
> @@ -1448,6 +1476,12 @@ static int ksz9477_switch_detect(struct ksz_device *dev)
>  			dev->features &= ~GBIT_SUPPORT;
>  		dev->mib_port_cnt = 3;
>  		dev->phy_port_cnt = 2;
> +		if (!(data8 & SW_AVB_ABLE))
> +			chip = KSZ9893_SW_CHIP;
> +		else if (data8 & SW_QW_ABLE)
> +			chip = KSZ8563_SW_CHIP;
> +		else
> +			chip = KSZ9563_SW_CHIP;
>  	} else {
>  		/* Chip uses new XMII register definitions. */
>  		dev->features |= NEW_XMII;
> @@ -1455,6 +1489,37 @@ static int ksz9477_switch_detect(struct ksz_device *dev)
>  		/* Chip does not support gigabit. */
>  		if (!(data8 & SW_GIGABIT_ABLE))
>  			dev->features &= ~GBIT_SUPPORT;
> +		if ((id_lo & 0xf) == 6)
> +			dev->mib_port_cnt = 6;

> +		if (id_hi == FAMILY_ID_94)
> +			chip = KSZ9477_SW_CHIP;
> +		else if (id_hi == FAMILY_ID_98 && id_lo == CHIP_ID_97)
> +			chip = KSZ9897_SW_CHIP;
> +		else if (id_hi == FAMILY_ID_98 && id_lo == CHIP_ID_96)
> +			chip = KSZ9896_SW_CHIP;
> +		else if (id_hi == FAMILY_ID_95 && id_lo == CHIP_ID_67)
> +			chip = KSZ9567_SW_CHIP;
> +		else if (id_hi == FAMILY_ID_85 && id_lo == CHIP_ID_67)
> +			chip = KSZ8567_SW_CHIP;
> +		if (id_lo == CHIP_ID_67) {
> +			id_hi = FAMILY_ID_98;
> +			id_lo = CHIP_ID_97;
> +		} else if (id_lo == CHIP_ID_66) {
> +			id_hi = FAMILY_ID_98;
> +			id_lo = CHIP_ID_96;
> +		}

Maybe add a mask to ksz_chip_data table, so you can mask id_low,
id_high and then compare against chip_id?

> @@ -1495,6 +1564,15 @@ struct ksz_chip_data {
>  		.port_cnt = 7,		/* total physical port count */
>  	},
>  	{
> +		.chip_id = 0x00989600,
> +		.dev_name = "KSZ9896",
> +		.num_vlans = 4096,
> +		.num_alus = 4096,
> +		.num_statics = 16,
> +		.cpu_ports = 0x3F,	/* can be configured as cpu port */
> +		.port_cnt = 6,		/* total port count */
> +	},

  Andrew