From: Ido Schimmel <idosch@idosch.org>
To: netdev@vger.kernel.org
Cc: davem@davemloft.net, richardcochran@gmail.com, jiri@mellanox.com,
shalomt@mellanox.com, petrm@mellanox.com, mlxsw@mellanox.com,
Ido Schimmel <idosch@mellanox.com>
Subject: [PATCH net-next 3/9] mlxsw: pci: Query free running clock PCI BAR and offsets
Date: Mon, 3 Jun 2019 15:12:38 +0300 [thread overview]
Message-ID: <20190603121244.3398-4-idosch@idosch.org> (raw)
In-Reply-To: <20190603121244.3398-1-idosch@idosch.org>
From: Shalom Toledo <shalomt@mellanox.com>
Query free running clock PCI BAR and offsets during the pci_init.
Signed-off-by: Shalom Toledo <shalomt@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/pci.c | 32 ++++++++++++++++++++
drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | 3 ++
2 files changed, 35 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c
index b40455f8293d..6acb9bbfdf89 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/pci.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c
@@ -102,6 +102,7 @@ struct mlxsw_pci_queue_type_group {
struct mlxsw_pci {
struct pci_dev *pdev;
u8 __iomem *hw_addr;
+ u64 free_running_clock_offset;
struct mlxsw_pci_queue_type_group queues[MLXSW_PCI_QUEUE_TYPE_COUNT];
u32 doorbell_offset;
struct mlxsw_core *core;
@@ -1414,6 +1415,15 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
mlxsw_pci->doorbell_offset =
mlxsw_cmd_mbox_query_fw_doorbell_page_offset_get(mbox);
+ if (mlxsw_cmd_mbox_query_fw_fr_rn_clk_bar_get(mbox) != 0) {
+ dev_err(&pdev->dev, "Unsupported free running clock BAR queried from hw\n");
+ err = -EINVAL;
+ goto err_fr_rn_clk_bar;
+ }
+
+ mlxsw_pci->free_running_clock_offset =
+ mlxsw_cmd_mbox_query_fw_free_running_clock_offset_get(mbox);
+
num_pages = mlxsw_cmd_mbox_query_fw_fw_pages_get(mbox);
err = mlxsw_pci_fw_area_init(mlxsw_pci, mbox, num_pages);
if (err)
@@ -1469,6 +1479,7 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
err_boardinfo:
mlxsw_pci_fw_area_fini(mlxsw_pci);
err_fw_area_init:
+err_fr_rn_clk_bar:
err_doorbell_page_bar:
err_iface_rev:
err_query_fw:
@@ -1672,6 +1683,24 @@ static int mlxsw_pci_cmd_exec(void *bus_priv, u16 opcode, u8 opcode_mod,
return err;
}
+static u32 mlxsw_pci_read_frc_h(void *bus_priv)
+{
+ struct mlxsw_pci *mlxsw_pci = bus_priv;
+ u64 frc_offset;
+
+ frc_offset = mlxsw_pci->free_running_clock_offset;
+ return mlxsw_pci_read32(mlxsw_pci, FREE_RUNNING_CLOCK_H(frc_offset));
+}
+
+static u32 mlxsw_pci_read_frc_l(void *bus_priv)
+{
+ struct mlxsw_pci *mlxsw_pci = bus_priv;
+ u64 frc_offset;
+
+ frc_offset = mlxsw_pci->free_running_clock_offset;
+ return mlxsw_pci_read32(mlxsw_pci, FREE_RUNNING_CLOCK_L(frc_offset));
+}
+
static const struct mlxsw_bus mlxsw_pci_bus = {
.kind = "pci",
.init = mlxsw_pci_init,
@@ -1679,6 +1708,8 @@ static const struct mlxsw_bus mlxsw_pci_bus = {
.skb_transmit_busy = mlxsw_pci_skb_transmit_busy,
.skb_transmit = mlxsw_pci_skb_transmit,
.cmd_exec = mlxsw_pci_cmd_exec,
+ .read_frc_h = mlxsw_pci_read_frc_h,
+ .read_frc_l = mlxsw_pci_read_frc_l,
.features = MLXSW_BUS_F_TXRX | MLXSW_BUS_F_RESET,
};
@@ -1740,6 +1771,7 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
mlxsw_pci->bus_info.device_kind = driver_name;
mlxsw_pci->bus_info.device_name = pci_name(mlxsw_pci->pdev);
mlxsw_pci->bus_info.dev = &pdev->dev;
+ mlxsw_pci->bus_info.read_frc_capable = true;
mlxsw_pci->id = id;
err = mlxsw_core_bus_device_register(&mlxsw_pci->bus_info,
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
index 8648ca171254..e57e42e2d2b2 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
@@ -43,6 +43,9 @@
#define MLXSW_PCI_DOORBELL(offset, type_offset, num) \
((offset) + (type_offset) + (num) * 4)
+#define MLXSW_PCI_FREE_RUNNING_CLOCK_H(offset) (offset)
+#define MLXSW_PCI_FREE_RUNNING_CLOCK_L(offset) ((offset) + 4)
+
#define MLXSW_PCI_CQS_MAX 96
#define MLXSW_PCI_EQS_COUNT 2
#define MLXSW_PCI_EQ_ASYNC_NUM 0
--
2.20.1
next prev parent reply other threads:[~2019-06-03 12:13 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-03 12:12 [PATCH net-next 0/9] mlxsw: Add support for physical hardware clock Ido Schimmel
2019-06-03 12:12 ` [PATCH net-next 1/9] mlxsw: cmd: Free running clock PCI BAR and offsets via query firmware Ido Schimmel
2019-06-03 12:12 ` [PATCH net-next 2/9] mlxsw: core: Add a new interface for reading the hardware free running clock Ido Schimmel
2019-06-03 12:12 ` Ido Schimmel [this message]
2019-06-03 12:12 ` [PATCH net-next 4/9] mlxsw: reg: Add Management UTC Register Ido Schimmel
2019-06-04 14:17 ` Richard Cochran
2019-06-05 11:30 ` Shalom Toledo
2019-06-05 17:23 ` Richard Cochran
2019-06-05 18:55 ` Shalom Toledo
2019-06-06 2:37 ` Richard Cochran
2019-06-06 9:11 ` Shalom Toledo
2019-06-06 10:12 ` Petr Machata
2019-06-03 12:12 ` [PATCH net-next 5/9] mlxsw: reg: Add Management Pulse Per Second Register Ido Schimmel
2019-06-03 12:12 ` [PATCH net-next 6/9] ptp: ptp_clock: Publish scaled_ppm_to_ppb Ido Schimmel
2019-06-04 14:21 ` Richard Cochran
2019-06-05 11:46 ` Shalom Toledo
2019-06-03 12:12 ` [PATCH net-next 7/9] mlxsw: spectrum_ptp: Add implementation for physical hardware clock operations Ido Schimmel
2019-06-04 14:28 ` Richard Cochran
2019-06-05 6:30 ` Jiri Pirko
2019-06-05 17:24 ` Richard Cochran
2019-06-05 11:44 ` Shalom Toledo
2019-06-05 17:40 ` Richard Cochran
2019-06-05 19:28 ` Shalom Toledo
2019-06-06 2:43 ` Richard Cochran
2019-06-06 8:50 ` Shalom Toledo
2019-06-06 8:57 ` Shalom Toledo
2019-06-04 17:03 ` Richard Cochran
2019-06-05 9:00 ` Petr Machata
2019-06-05 17:31 ` Richard Cochran
2019-06-06 10:21 ` Petr Machata
2019-06-03 12:12 ` [PATCH net-next 8/9] mlxsw: spectrum: PTP physical hardware clock initialization Ido Schimmel
2019-06-03 12:12 ` [PATCH net-next 9/9] selftests: ptp: Add Physical Hardware Clock test Ido Schimmel
2019-06-04 17:05 ` Richard Cochran
2019-06-07 11:15 ` Vladimir Oltean
2019-06-08 10:44 ` Vladimir Oltean
2019-06-11 13:54 ` Shalom Toledo
2019-06-03 17:35 ` [PATCH net-next 0/9] mlxsw: Add support for physical hardware clock David Miller
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190603121244.3398-4-idosch@idosch.org \
--to=idosch@idosch.org \
--cc=davem@davemloft.net \
--cc=idosch@mellanox.com \
--cc=jiri@mellanox.com \
--cc=mlxsw@mellanox.com \
--cc=netdev@vger.kernel.org \
--cc=petrm@mellanox.com \
--cc=richardcochran@gmail.com \
--cc=shalomt@mellanox.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).