From: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
To: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
"David S. Miller" <davem@davemloft.net>
Cc: Rasmus Villemoes <Rasmus.Villemoes@prevas.se>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: [PATCH net-next v4 02/10] net: dsa: mv88e6xxx: introduce support for two chips using direct smi addressing
Date: Tue, 4 Jun 2019 07:34:24 +0000 [thread overview]
Message-ID: <20190604073412.21743-3-rasmus.villemoes@prevas.dk> (raw)
In-Reply-To: <20190604073412.21743-1-rasmus.villemoes@prevas.dk>
The 88e6250 (as well as 6220, 6071, 6070, 6020) do not support
multi-chip (indirect) addressing. However, one can still have two of
them on the same mdio bus, since the device only uses 16 of the 32
possible addresses, either addresses 0x00-0x0F or 0x10-0x1F depending
on the ADDR4 pin at reset [since ADDR4 is internally pulled high, the
latter is the default].
In order to prepare for supporting the 88e6250 and friends, introduce
mv88e6xxx_info::dual_chip to allow having a non-zero sw_addr while
still using direct addressing.
Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
---
drivers/net/dsa/mv88e6xxx/chip.h | 6 ++++++
drivers/net/dsa/mv88e6xxx/smi.c | 25 ++++++++++++++++++++++++-
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
index faa3fa889f19..74777c3bc313 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
@@ -112,6 +112,12 @@ struct mv88e6xxx_info {
* when it is non-zero, and use indirect access to internal registers.
*/
bool multi_chip;
+ /* Dual-chip Addressing Mode
+ * Some chips respond to only half of the 32 SMI addresses,
+ * allowing two to coexist on the same SMI interface.
+ */
+ bool dual_chip;
+
enum dsa_tag_protocol tag_protocol;
/* Mask for FromPort and ToPort value of PortVec used in ATU Move
diff --git a/drivers/net/dsa/mv88e6xxx/smi.c b/drivers/net/dsa/mv88e6xxx/smi.c
index 96f7d2685bdc..775f8d55a962 100644
--- a/drivers/net/dsa/mv88e6xxx/smi.c
+++ b/drivers/net/dsa/mv88e6xxx/smi.c
@@ -24,6 +24,10 @@
* When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing
* multiple devices to share the SMI interface. In this mode it responds to only
* 2 registers, used to indirectly access the internal SMI devices.
+ *
+ * Some chips use a different scheme: Only the ADDR4 pin is used for
+ * configuration, and the device responds to 16 of the 32 SMI
+ * addresses, allowing two to coexist on the same SMI interface.
*/
static int mv88e6xxx_smi_direct_read(struct mv88e6xxx_chip *chip,
@@ -76,6 +80,23 @@ static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_direct_ops = {
.write = mv88e6xxx_smi_direct_write,
};
+static int mv88e6xxx_smi_dual_direct_read(struct mv88e6xxx_chip *chip,
+ int dev, int reg, u16 *data)
+{
+ return mv88e6xxx_smi_direct_read(chip, chip->sw_addr + dev, reg, data);
+}
+
+static int mv88e6xxx_smi_dual_direct_write(struct mv88e6xxx_chip *chip,
+ int dev, int reg, u16 data)
+{
+ return mv88e6xxx_smi_direct_write(chip, chip->sw_addr + dev, reg, data);
+}
+
+static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_dual_direct_ops = {
+ .read = mv88e6xxx_smi_dual_direct_read,
+ .write = mv88e6xxx_smi_dual_direct_write,
+};
+
/* Offset 0x00: SMI Command Register
* Offset 0x01: SMI Data Register
*/
@@ -144,7 +165,9 @@ static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_indirect_ops = {
int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,
struct mii_bus *bus, int sw_addr)
{
- if (sw_addr == 0)
+ if (chip->info->dual_chip)
+ chip->smi_ops = &mv88e6xxx_smi_dual_direct_ops;
+ else if (sw_addr == 0)
chip->smi_ops = &mv88e6xxx_smi_direct_ops;
else if (chip->info->multi_chip)
chip->smi_ops = &mv88e6xxx_smi_indirect_ops;
--
2.20.1
next prev parent reply other threads:[~2019-06-04 7:35 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-04 7:34 [PATCH net-next v4 00/10] net: dsa: mv88e6xxx: support for mv88e6250 Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 01/10] net: dsa: mv88e6xxx: add mv88e6250_g1_ieee_pri_map Rasmus Villemoes
2019-06-04 7:34 ` Rasmus Villemoes [this message]
2019-06-04 7:34 ` [PATCH net-next v4 03/10] net: dsa: mv88e6xxx: prepare mv88e6xxx_g1_atu_op() for the mv88e6250 Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 04/10] net: dsa: mv88e6xxx: implement vtu_getnext and vtu_loadpurge for mv88e6250 Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 05/10] net: dsa: mv88e6xxx: implement watchdog_ops " Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 06/10] net: dsa: mv88e6xxx: implement port_set_speed " Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 07/10] net: dsa: mv88e6xxx: implement port_link_state " Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 08/10] net: dsa: mv88e6xxx: add support " Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 09/10] dt-bindings: net: dsa: marvell: add "marvell,mv88e6250" compatible string Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 10/10] net: dsa: mv88e6xxx: refactor mv88e6352_g1_reset Rasmus Villemoes
2019-06-05 3:11 ` [PATCH net-next v4 00/10] net: dsa: mv88e6xxx: support for mv88e6250 David Miller
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