From: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
To: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
"David S. Miller" <davem@davemloft.net>
Cc: Rasmus Villemoes <Rasmus.Villemoes@prevas.se>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: [PATCH net-next v4 03/10] net: dsa: mv88e6xxx: prepare mv88e6xxx_g1_atu_op() for the mv88e6250
Date: Tue, 4 Jun 2019 07:34:25 +0000 [thread overview]
Message-ID: <20190604073412.21743-4-rasmus.villemoes@prevas.dk> (raw)
In-Reply-To: <20190604073412.21743-1-rasmus.villemoes@prevas.dk>
All the currently supported chips have .num_databases either 256 or
4096, so this patch does not change behaviour for any of those. The
mv88e6250, however, has .num_databases == 64, and it does not put the
upper two bits in ATU control 13:12, but rather in ATU Operation
9:8. So change the logic to prepare for supporting mv88e6250.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
---
drivers/net/dsa/mv88e6xxx/global1_atu.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dsa/mv88e6xxx/global1_atu.c b/drivers/net/dsa/mv88e6xxx/global1_atu.c
index ea243840ee0f..1ae680bc0eff 100644
--- a/drivers/net/dsa/mv88e6xxx/global1_atu.c
+++ b/drivers/net/dsa/mv88e6xxx/global1_atu.c
@@ -94,7 +94,7 @@ static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
if (err)
return err;
} else {
- if (mv88e6xxx_num_databases(chip) > 16) {
+ if (mv88e6xxx_num_databases(chip) > 64) {
/* ATU DBNum[7:4] are located in ATU Control 15:12 */
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,
&val);
@@ -106,6 +106,9 @@ static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
val);
if (err)
return err;
+ } else if (mv88e6xxx_num_databases(chip) > 16) {
+ /* ATU DBNum[5:4] are located in ATU Operation 9:8 */
+ op |= (fid & 0x30) << 4;
}
/* ATU DBNum[3:0] are located in ATU Operation 3:0 */
--
2.20.1
next prev parent reply other threads:[~2019-06-04 7:35 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-04 7:34 [PATCH net-next v4 00/10] net: dsa: mv88e6xxx: support for mv88e6250 Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 01/10] net: dsa: mv88e6xxx: add mv88e6250_g1_ieee_pri_map Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 02/10] net: dsa: mv88e6xxx: introduce support for two chips using direct smi addressing Rasmus Villemoes
2019-06-04 7:34 ` Rasmus Villemoes [this message]
2019-06-04 7:34 ` [PATCH net-next v4 04/10] net: dsa: mv88e6xxx: implement vtu_getnext and vtu_loadpurge for mv88e6250 Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 05/10] net: dsa: mv88e6xxx: implement watchdog_ops " Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 06/10] net: dsa: mv88e6xxx: implement port_set_speed " Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 07/10] net: dsa: mv88e6xxx: implement port_link_state " Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 08/10] net: dsa: mv88e6xxx: add support " Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 09/10] dt-bindings: net: dsa: marvell: add "marvell,mv88e6250" compatible string Rasmus Villemoes
2019-06-04 7:34 ` [PATCH net-next v4 10/10] net: dsa: mv88e6xxx: refactor mv88e6352_g1_reset Rasmus Villemoes
2019-06-05 3:11 ` [PATCH net-next v4 00/10] net: dsa: mv88e6xxx: support for mv88e6250 David Miller
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