From: Hau <hau@realtek.com>
To: Heiner Kallweit <hkallweit1@gmail.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
nic_swsd <nic_swsd@realtek.com>,
"kuba@kernel.org" <kuba@kernel.org>,
"grundler@chromium.org" <grundler@chromium.org>
Subject: RE: [PATCH net] r8169: fix rtl8125b dmar pte write access not set error
Date: Thu, 13 Oct 2022 06:04:30 +0000 [thread overview]
Message-ID: <5eda67bb8f16473fb575b6a470d3592c@realtek.com> (raw)
In-Reply-To: <3ffdaa0d-4a3d-dd2c-506c-d10b5297f430@gmail.com>
> On 12.10.2022 09:59, Hau wrote:
> >>
> >> On 04.10.2022 10:10, Chunhao Lin wrote:
> >>> When close device, rx will be enabled if wol is enabeld. When open
> >>> device it will cause rx to dma to wrong address after pci_set_master().
> >>>
> >>> In this patch, driver will disable tx/rx when close device. If wol
> >>> is eanbled only enable rx filter and disable rxdv_gate to let
> >>> hardware can receive packet to fifo but not to dma it.
> >>>
> >>> Fixes: 120068481405 ("r8169: fix failing WoL")
> >>> Signed-off-by: Chunhao Lin <hau@realtek.com>
> >>> ---
> >>> drivers/net/ethernet/realtek/r8169_main.c | 14 +++++++-------
> >>> 1 file changed, 7 insertions(+), 7 deletions(-)
> >>>
> >>> diff --git a/drivers/net/ethernet/realtek/r8169_main.c
> >>> b/drivers/net/ethernet/realtek/r8169_main.c
> >>> index 1b7fdb4f056b..c09cfbe1d3f0 100644
> >>> --- a/drivers/net/ethernet/realtek/r8169_main.c
> >>> +++ b/drivers/net/ethernet/realtek/r8169_main.c
> >>> @@ -2239,6 +2239,9 @@ static void rtl_wol_enable_rx(struct
> >> rtl8169_private *tp)
> >>> if (tp->mac_version >= RTL_GIGA_MAC_VER_25)
> >>> RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) |
> >>> AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
> >>> +
> >>> + if (tp->mac_version >= RTL_GIGA_MAC_VER_40)
> >>> + RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~RXDV_GATED_EN);
> >>
> >> Is this correct anyway? Supposedly you want to set this bit to disable DMA.
> >>
> > If wol is enabled, driver need to disable hardware rxdv_gate for receiving
> packets.
> >
> OK, I see. But why disable it here? I see no scenario where rxdv_gate would
> be enabled when we get here.
>
rxdv_gate will be enabled in rtl8169_cleanup(). When suspend or close and wol is enabled
driver will call rtl8169_down() -> rtl8169_cleanup()-> rtl_prepare_power_down()-> rtl_wol_enable_rx().
So disabled rxdv_gate in rtl_wol_enable_rx() for receiving packets.
------Please consider the environment before printing this e-mail.
next prev parent reply other threads:[~2022-10-13 6:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-04 8:10 [PATCH net] r8169: fix rtl8125b dmar pte write access not set error Chunhao Lin
2022-10-04 20:14 ` Heiner Kallweit
2022-10-05 5:44 ` Hau
2022-10-05 16:29 ` Heiner Kallweit
2022-10-06 14:23 ` Hau
2022-10-08 21:53 ` Heiner Kallweit
2022-10-09 7:45 ` Heiner Kallweit
2022-10-12 7:59 ` Hau
2022-10-12 19:33 ` Heiner Kallweit
2022-10-13 6:04 ` Hau [this message]
2022-10-15 8:18 ` Heiner Kallweit
2022-10-17 17:23 ` Hau
2022-10-17 19:38 ` Heiner Kallweit
2022-10-20 18:01 ` Hau
2022-10-24 18:02 ` Hau
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