From: Asmaa Mnebhi <Asmaa@mellanox.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: David Thompson <dthompson@mellanox.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"davem@davemloft.net" <davem@davemloft.net>,
"kuba@kernel.org" <kuba@kernel.org>,
Jiri Pirko <jiri@mellanox.com>
Subject: RE: [PATCH net-next] Add Mellanox BlueField Gigabit Ethernet driver
Date: Fri, 31 Jul 2020 21:38:26 +0000 [thread overview]
Message-ID: <VI1PR05MB4110ACD3FE86FD3DF5F59D84DA4E0@VI1PR05MB4110.eurprd05.prod.outlook.com> (raw)
In-Reply-To: <20200731195458.GA1843538@lunn.ch>
> -----Original Message-----
> From: Andrew Lunn <andrew@lunn.ch>
> Sent: Friday, July 31, 2020 3:55 PM
> To: Asmaa Mnebhi <Asmaa@mellanox.com>
> Cc: David Thompson <dthompson@mellanox.com>;
> netdev@vger.kernel.org; davem@davemloft.net; kuba@kernel.org; Jiri
> Pirko <jiri@mellanox.com>
> Subject: Re: [PATCH net-next] Add Mellanox BlueField Gigabit Ethernet
> driver
>
> On Fri, Jul 31, 2020 at 06:54:04PM +0000, Asmaa Mnebhi wrote:
>
> Hi Asmaa
>
> Please don't send HTML obfusticated emails to mailing lists.
My apologies!
>
> > > +static int mlxbf_gige_mdio_read(struct mii_bus *bus, int phy_add,
> > > +int
> >
> > > +phy_reg) {
> >
> > > + struct mlxbf_gige *priv = bus->priv;
> >
> > > + u32 cmd;
> >
> > > + u32 ret;
> >
> > > +
> >
> > > + /* If the lock is held by something else, drop the request.
> >
> > > + * If the lock is cleared, that means the busy bit was cleared.
> >
> > > + */
> >
> >
> >
> > How can this happen? The mdio core has a mutex which prevents parallel
> access?
> >
> >
> >
> > This is a HW Lock. It is an actual register. So another HW entity can
> > be holding that lock and reading/changing the values in the HW registers.
>
> You have not explains how that can happen? Is there something in the driver
> i missed which takes a backdoor to read/write MDIO transactions?
Ah ok! There is a HW entity (called YU) within the BlueField which is connected to the PHY device.
I think the YU is what you are calling "backdoor" here. The YU contains several registers which control reads/writes
To the PHY. So it is like an extra layer for reading MDIO registers. One of the YU registers is the gateway register (aka GW or
MLXBF_GIGE_MDIO_GW_OFFSET in the code). If the GW register's LOCK bit is not cleared, we cannot write anything to the actual PHY MDIO registers.
Did I answer your question?
>
> > > + ret = mlxbf_gige_mdio_poll_bit(priv,
> > > + MLXBF_GIGE_MDIO_GW_LOCK_MASK);
> >
> > > + if (ret)
> >
> > > + return -EBUSY;
> >
> >
> >
> > PHY drivers are not going to like that. They are not going to retry.
> > What is likely to happen is that phylib moves into the ERROR state,
> > and the PHY driver grinds to a halt.
> >
> >
> >
> > This is a fairly quick HW transaction. So I don’t think it would cause
> > and issue for the PHY drivers. In this case, we use the micrel
> > KSZ9031. We haven’t seen issues.
>
> So you have happy to debug hard to find and reproduce issues when it does
> happen? Or would you like to spend a little bit of time now and just prevent
> it happening at all?
I think I misunderstood your comment. Did you ask why we are polling here? Or that we shouldn't be returning -EBUSY?
>
> Andrew
next prev parent reply other threads:[~2020-07-31 21:38 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-29 18:29 [PATCH net-next] Add Mellanox BlueField Gigabit Ethernet driver David Thompson
2020-07-29 19:41 ` David Thompson
2020-07-29 20:31 ` David Miller
2020-07-29 20:49 ` Jakub Kicinski
2020-07-30 4:03 ` kernel test robot
2020-07-31 17:42 ` Andrew Lunn
[not found] ` <VI1PR05MB4110070900CF42CB3E18983EDA4E0@VI1PR05MB4110.eurprd05.prod.outlook.com>
2020-07-31 19:54 ` Andrew Lunn
2020-07-31 21:38 ` Asmaa Mnebhi [this message]
2020-08-01 1:14 ` Andrew Lunn
2020-08-03 14:23 ` Asmaa Mnebhi
2020-08-11 19:53 ` Asmaa Mnebhi
2020-08-11 20:06 ` Andrew Lunn
2020-08-12 20:37 ` Asmaa Mnebhi
2020-08-12 21:34 ` Andrew Lunn
2020-07-31 18:37 ` Andrew Lunn
2020-08-28 14:29 ` Asmaa Mnebhi
2020-07-31 18:38 ` Andrew Lunn
2020-08-28 14:24 ` Asmaa Mnebhi
2020-08-28 14:36 ` Andrew Lunn
2020-07-31 18:41 ` Andrew Lunn
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