From: Thomas Gleixner <tglx@linutronix.de>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Logan Gunthorpe <logang@deltatee.com>,
LKML <linux-kernel@vger.kernel.org>,
Bjorn Helgaas <helgaas@kernel.org>, Marc Zygnier <maz@kernel.org>,
Alex Williamson <alex.williamson@redhat.com>,
Kevin Tian <kevin.tian@intel.com>,
Megha Dey <megha.dey@intel.com>, Ashok Raj <ashok.raj@intel.com>,
linux-pci@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jon Mason <jdmason@kudzu.us>, Dave Jiang <dave.jiang@intel.com>,
Allen Hubbe <allenbh@gmail.com>,
linux-ntb@googlegroups.com, linux-s390@vger.kernel.org,
Heiko Carstens <hca@linux.ibm.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
x86@kernel.org, Joerg Roedel <jroedel@suse.de>,
iommu@lists.linux-foundation.org,
Kalle Valo <kvalo@codeaurora.org>
Subject: Re: [patch 21/32] NTB/msi: Convert to msi_on_each_desc()
Date: Mon, 06 Dec 2021 16:47:58 +0100 [thread overview]
Message-ID: <87fsr54tw1.ffs@tglx> (raw)
In-Reply-To: <20211206144344.GA4670@nvidia.com>
Jason,
On Mon, Dec 06 2021 at 10:43, Jason Gunthorpe wrote:
> On Sun, Dec 05, 2021 at 03:16:40PM +0100, Thomas Gleixner wrote:
>> > That's not really a good idea because dev->irqdomain is a generic
>> > mechanism and not restricted to the PCI use case. Special casing it for
>> > PCI is just wrong. Special casing it for all use cases just to please
>> > PCI is equally wrong. There is a world outside of PCI and x86.
>>
>> That argument is actually only partially correct.
>
> I'm not sure I understood your reply? I think we are both agreeing
> that dev->irqdomain wants to be a generic mechanism?
Yes. I managed to confuse myself there by being too paranoid about how
to distinguish things on platforms which need to support both ways, i.e.
x86 when XEN is enabled.
> I'd say that today we've special cased it to handle PCI. IMHO that is
> exactly what pci_msi_create_irq_domain() is doing - it replaces the
> chip ops with ops that can *ONLY* do PCI MSI and so dev->irqdomain
> becomes PCI only and non-generic.
Right. See above. That's why I went back to my notes, did some more
research ...
>> 2) Guest support is strictly opt-in
>>
>> The underlying architecture/subarchitecture specific irqdomain has
>> to detect at setup time (eventually early boot), whether the
>> underlying hypervisor supports it.
>>
>> The only reasonable way to support that is the availability of
>> interrupt remapping via vIOMMU, as we discussed before.
>
> This is talking about IMS specifically because of the legacy issue
> where the MSI addr/data pair inside a guest is often completely fake?
This is about IMS, right. PCI/MSI[x] is handled today because the writes
to the MSI/MSI-X message store can be trapped.
>> That does not work in all cases due to architecture and host
>> controller constraints, so we might end up with:
>>
>> VECTOR -> IOMMU -> SHIM -> PCI/[MSI/MSI-X/IMS] domains
>
> OK - I dont' know enough about the architecture/controller details to
> imagine what SHIM is, but if it allows keeping the PCI code as purely
> PCI code, then great
It's today part of the arch/subarch specific PCI/MSI domain to deal with
quirks above the IOMMU level. As we can't proliferate that into the new
endpoint domain, that needs to be done as a shim layer in between which
has no real other functionality than applying the quirks. Yes, it's all
pretty. Welcome to my wonderful world.
>> - The irqchip callbacks which can be implemented by these top
>> level domains are going to be restricted.
>
> OK - I think it is great that the driver will see a special ops struct
> that is 'ops for device's MSI addr/data pair storage'. It makes it
> really clear what it is
It will need some more than that, e.g. mask/unmask and as we discussed
quite some time ago something like the irq_buslock/unlock pair, so you
can handle updates to the state from thread context via a command queue
(IIRC).
>> - For the irqchip callbacks which are allowed/required the rules
>> vs. following down the hierarchy need to be defined and
>> enforced.
>
> The driver should be the ultimate origin of the interrupt so it is
> always end-point in the hierarchy, opposite the CPU?
>
> I would hope the driver doesn't have an exposure to hierarchy?
No.
> So we have a new concept: 'device MSI storage ops'
>
> Put them along with the xarray holding the msi_descs and you've got my
> msi_table :)
Hehe.
>> Sorry Jason, no tables for you. :)
>
> How does the driver select with 'device MSI storage ops' it is
> requesting a MSI for ?
Via some cookie, reference whatever as discussed in the other
mail. We'll bikeshed the naming once I get there :)
>> 1) I'm going to post part 1-3 of the series once more with the fallout
>> and review comments addressed.
>
> OK, I didn't see anything in there that was making anything harder in
> this direction
It's helping to keep the existing stuff including the !irqdomain parts
sufficiently self contained so I can actually change the inner workings
of msi domains without going back to any of these places (hopefully).
>> 5) Implement an IMS user.
>>
>> The obvious candidate which should be halfways accessible is the
>> ath11 PCI driver which falls into that category.
>
> Aiiee:
Yes.
> drivers/net/wireless/ath/ath11k/pci.c: ab_pci->msi_ep_base_data = msi_desc->msg.data;
That's only one part of it. Look how the address is retrieved.
Thanks,
tglx
next prev parent reply other threads:[~2021-12-06 15:48 UTC|newest]
Thread overview: 141+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-27 1:23 [patch 00/32] genirq/msi, PCI/MSI: Spring cleaning - Part 2 Thomas Gleixner
2021-11-27 1:23 ` [patch 01/32] genirq/msi: Move descriptor list to struct msi_device_data Thomas Gleixner
2021-11-27 12:19 ` Greg Kroah-Hartman
2021-11-27 1:23 ` [patch 02/32] genirq/msi: Add mutex for MSI list protection Thomas Gleixner
2021-11-27 1:23 ` [patch 03/32] genirq/msi: Provide msi_domain_alloc/free_irqs_descs_locked() Thomas Gleixner
2021-11-27 1:23 ` [patch 04/32] genirq/msi: Provide a set of advanced MSI accessors and iterators Thomas Gleixner
2021-11-28 1:00 ` Jason Gunthorpe
2021-11-28 19:22 ` Thomas Gleixner
2021-11-29 9:26 ` Thomas Gleixner
2021-11-29 14:01 ` Jason Gunthorpe
2021-11-29 14:46 ` Thomas Gleixner
2021-11-27 1:23 ` [patch 05/32] genirq/msi: Provide msi_alloc_msi_desc() and a simple allocator Thomas Gleixner
2021-11-27 1:23 ` [patch 06/32] genirq/msi: Provide domain flags to allocate/free MSI descriptors automatically Thomas Gleixner
2021-11-27 1:23 ` [patch 07/32] genirq/msi: Count the allocated MSI descriptors Thomas Gleixner
2021-11-27 12:19 ` Greg Kroah-Hartman
2021-11-27 19:22 ` Thomas Gleixner
2021-11-27 19:45 ` Thomas Gleixner
2021-11-28 11:07 ` Greg Kroah-Hartman
2021-11-28 19:23 ` Thomas Gleixner
2021-11-27 1:23 ` [patch 08/32] PCI/MSI: Protect MSI operations Thomas Gleixner
2021-11-27 1:23 ` [patch 09/32] PCI/MSI: Use msi_add_msi_desc() Thomas Gleixner
2021-11-27 1:23 ` [patch 10/32] PCI/MSI: Let core code free MSI descriptors Thomas Gleixner
2021-11-27 1:23 ` [patch 11/32] PCI/MSI: Use msi_on_each_desc() Thomas Gleixner
2021-11-27 1:23 ` [patch 12/32] x86/pci/xen: Use msi_for_each_desc() Thomas Gleixner
2021-11-27 1:23 ` [patch 13/32] xen/pcifront: Rework MSI handling Thomas Gleixner
2021-11-27 1:23 ` [patch 14/32] s390/pci: Rework MSI descriptor walk Thomas Gleixner
2021-11-29 10:31 ` Niklas Schnelle
2021-11-29 13:04 ` Thomas Gleixner
2021-11-27 1:23 ` [patch 15/32] powerpc/4xx/hsta: Rework MSI handling Thomas Gleixner
2021-11-27 1:23 ` [patch 16/32] powerpc/cell/axon_msi: Convert to msi_on_each_desc() Thomas Gleixner
2021-11-27 1:23 ` [patch 17/32] powerpc/pasemi/msi: Convert to msi_on_each_dec() Thomas Gleixner
2021-11-27 1:23 ` [patch 18/32] powerpc/fsl_msi: Use msi_for_each_desc() Thomas Gleixner
2021-11-27 1:23 ` [patch 19/32] powerpc/mpic_u3msi: Use msi_for_each-desc() Thomas Gleixner
2021-11-27 1:24 ` [patch 20/32] PCI: hv: Rework MSI handling Thomas Gleixner
2021-11-27 1:24 ` [patch 21/32] NTB/msi: Convert to msi_on_each_desc() Thomas Gleixner
2021-11-29 18:21 ` Logan Gunthorpe
2021-11-29 20:51 ` Thomas Gleixner
2021-11-29 22:27 ` Logan Gunthorpe
2021-11-29 22:50 ` Dave Jiang
2021-11-29 23:31 ` Jason Gunthorpe
2021-11-29 23:52 ` Logan Gunthorpe
2021-11-30 0:01 ` Jason Gunthorpe
2021-11-30 0:29 ` Thomas Gleixner
2021-11-30 19:21 ` Logan Gunthorpe
2021-11-30 19:48 ` Thomas Gleixner
2021-11-30 20:14 ` Logan Gunthorpe
2021-11-30 20:28 ` Jason Gunthorpe
2021-11-30 21:23 ` Thomas Gleixner
2021-12-01 0:17 ` Jason Gunthorpe
2021-12-01 10:16 ` Thomas Gleixner
2021-12-01 13:00 ` Jason Gunthorpe
2021-12-01 17:35 ` Thomas Gleixner
2021-12-01 18:14 ` Jason Gunthorpe
2021-12-01 18:46 ` Logan Gunthorpe
2021-12-01 20:21 ` Thomas Gleixner
2021-12-02 0:01 ` Thomas Gleixner
2021-12-02 13:55 ` Jason Gunthorpe
2021-12-02 14:23 ` Greg Kroah-Hartman
2021-12-02 14:45 ` Jason Gunthorpe
2021-12-02 19:25 ` Thomas Gleixner
2021-12-02 20:00 ` Jason Gunthorpe
2021-12-02 22:31 ` Thomas Gleixner
2021-12-03 0:37 ` Jason Gunthorpe
2021-12-03 15:07 ` Thomas Gleixner
2021-12-03 16:41 ` Jason Gunthorpe
2021-12-04 14:20 ` Thomas Gleixner
2021-12-05 14:16 ` Thomas Gleixner
2021-12-06 14:43 ` Jason Gunthorpe
2021-12-06 15:47 ` Thomas Gleixner [this message]
2021-12-06 17:00 ` Jason Gunthorpe
2021-12-06 20:28 ` Thomas Gleixner
2021-12-06 21:06 ` Jason Gunthorpe
2021-12-06 22:21 ` Thomas Gleixner
2021-12-06 14:19 ` Jason Gunthorpe
2021-12-06 15:06 ` Thomas Gleixner
2021-12-09 6:26 ` Tian, Kevin
2021-12-09 9:03 ` Thomas Gleixner
2021-12-09 12:17 ` Tian, Kevin
2021-12-09 15:57 ` Thomas Gleixner
2021-12-10 7:37 ` Tian, Kevin
2021-12-09 5:41 ` Tian, Kevin
2021-12-09 5:47 ` Jason Wang
2021-12-01 16:28 ` Dave Jiang
2021-12-01 18:41 ` Thomas Gleixner
2021-12-01 18:47 ` Dave Jiang
2021-12-01 20:25 ` Thomas Gleixner
2021-12-01 21:21 ` Dave Jiang
2021-12-01 21:44 ` Thomas Gleixner
2021-12-01 21:49 ` Dave Jiang
2021-12-01 22:03 ` Thomas Gleixner
2021-12-01 22:53 ` Dave Jiang
2021-12-01 23:57 ` Thomas Gleixner
2021-12-09 5:23 ` Tian, Kevin
2021-12-09 8:37 ` Thomas Gleixner
2021-12-09 12:31 ` Tian, Kevin
2021-12-09 16:21 ` Jason Gunthorpe
2021-12-09 20:32 ` Thomas Gleixner
2021-12-09 20:58 ` Jason Gunthorpe
2021-12-09 22:09 ` Thomas Gleixner
2021-12-10 0:26 ` Thomas Gleixner
2021-12-10 7:29 ` Tian, Kevin
2021-12-10 12:13 ` Thomas Gleixner
2021-12-11 8:06 ` Tian, Kevin
2021-12-10 12:39 ` Jason Gunthorpe
2021-12-10 19:00 ` Thomas Gleixner
2021-12-11 7:44 ` Tian, Kevin
2021-12-11 13:04 ` Thomas Gleixner
2021-12-12 1:56 ` Tian, Kevin
2021-12-12 20:55 ` Thomas Gleixner
2021-12-12 23:37 ` Jason Gunthorpe
2021-12-13 7:50 ` Tian, Kevin
2021-12-11 7:52 ` Tian, Kevin
2021-12-12 0:12 ` Thomas Gleixner
2021-12-12 2:14 ` Tian, Kevin
2021-12-12 20:50 ` Thomas Gleixner
2021-12-12 23:42 ` Jason Gunthorpe
2021-12-10 7:36 ` Tian, Kevin
2021-12-10 12:30 ` Jason Gunthorpe
2021-12-12 6:44 ` Mika Penttilä
2021-12-12 23:27 ` Jason Gunthorpe
2021-12-01 14:52 ` Thomas Gleixner
2021-12-01 15:11 ` Jason Gunthorpe
2021-12-01 18:37 ` Thomas Gleixner
2021-12-01 18:47 ` Jason Gunthorpe
2021-12-01 20:26 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 22/32] soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation Thomas Gleixner
2021-11-27 1:24 ` [patch 23/32] soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs() Thomas Gleixner
2021-11-27 1:24 ` [patch 24/32] bus: fsl-mc-msi: Simplify MSI descriptor handling Thomas Gleixner
2021-11-27 1:24 ` [patch 25/32] platform-msi: Let core code handle MSI descriptors Thomas Gleixner
2021-11-27 1:24 ` [patch 26/32] platform-msi: Simplify platform device MSI code Thomas Gleixner
2021-11-27 1:24 ` [patch 27/32] genirq/msi: Make interrupt allocation less convoluted Thomas Gleixner
2021-11-27 1:24 ` [patch 28/32] genirq/msi: Convert to new functions Thomas Gleixner
2021-11-27 1:24 ` [patch 29/32] genirq/msi: Mop up old interfaces Thomas Gleixner
2021-11-27 1:24 ` [patch 30/32] genirq/msi: Add abuse prevention comment to msi header Thomas Gleixner
2021-11-27 1:24 ` [patch 31/32] genirq/msi: Simplify sysfs handling Thomas Gleixner
2021-11-27 12:32 ` Greg Kroah-Hartman
2021-11-27 19:31 ` Thomas Gleixner
2021-11-28 11:07 ` Greg Kroah-Hartman
2021-11-28 19:33 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 32/32] genirq/msi: Convert storage to xarray Thomas Gleixner
2021-11-27 12:33 ` Greg Kroah-Hartman
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